The configurable core supports multiple high-bandwidth video and communications links in a single device to transfer high-quality, real-time video from two or more cameras or processing units to in-vehicle displays. This highly integrated connectivity solution is targeted at infotainment and driver assistance applications.APIX is the latest Gigabit/s Pixel Link interface from Xilinx Alliance partner Inova Semiconductors, providing point-to-point connectivity designed for minimal electro-magnetic interference (EMI) and maximum transmission distances.
With the APIX IP core now available for Xilinx's newest line of XA Spartan-6 FPGAs, automotive developers can integrate multiple transmit and receive APIX links with minimal engineering overhead. In addition to high-bandwidth video, the APIX link allows for full duplex communication and power can be transmitted over just one cable to further streamline connectivity.
The APIX core is a software configurable IP block that can be adapted to application-specific bandwidth, video interface, and control signal requirements with adjustable driver characteristics, selectable operating modes, and spread spectrum-clocking capabilities.
The APIX IP utilizes the multi-gigabit transceiver (MGT) hard blocks of the XA Spartan-6 FPGA to maximize performance and integration while reducing system cost. It is fully compatible with the standalone APIX INAP125T24 (transmitter) or INAP125R24 (receiver) devices, including the ASHELL automotive-specific communication protocol for secure data transmission over the full duplex sideband interface. The ASHELL option can be switched off, if not required.
The APIX core for XA Spartan-6 FPGAs is immediately available from Inova Semiconductors. APIX Transmitter and Receiver devices can be purchased separately.
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