Thursday, April 30, 2009

TI intros highly integrated clock generator family

BANGALORE, INDIA: Texas Instruments Inc. (TI) recently introduced three new precision clock generators that have a crystal input, replacing up to four discrete high-frequency crystal oscillators with a single device. These devices provide a more cost-efficient solution that saves up to 50 percent more board space than competing solutions today.

The CDCM61004 family improves system performance by achieving integrated RMS jitter of 500 fs, well suited for data communications equipment.

The CDCM61004 family eases board design by providing a fully integrated voltage-controlled oscillator (VCO) support for a wide output frequency range from 43.75 MHz to 683 MHz, allowing one device to cover multiple standards or multiple designs. The clock generators operate at less than 500 mW to enable high-density designs, offering up to 30 percent power savings.

Key features
* Input reference including the commonly used crystal frequencies such as 24.8832 MHz, 25 MHz, and 26.5625 MHz.
* On-chip VCO operates in frequency range 1.75 GHz to 2.05 GHz, supporting output from 43.75 MHz to 683 MHz.
* Input crystal bypass mode allows direct tuning on the reference.
* Output selectable between LVPECL, LVDS or 2-LVCMOS.

Key benefits
* Pin-compatible family allows the same hardware strapping.
* High integration and flexible I/O minimizes the number of components.
* Reduces board space and provides a cost-efficient solution.
* Low jitter improves overall system bit error rate performance.
* Low power enables high-density designs.

AMD marks 40th year as technology innovator

BANGALORE, INDIA: AMD today kicked off activities to recognize 40 years of innovation in the semiconductor industry and its important role as a catalyst for enabling next-generation solutions. May 1, 2009 will mark the official 40-year anniversary of AMD’s founding by Jerry Sanders and seven co-founders in 1969.

As part of the year-long anniversary celebration, the company is holding a series of contests in the US and Canada as a gesture of thanks to the dedicated customers who have been, and continue to be, key to AMD’s critical presence in the processor industry.

As a central hub for the contests and information about AMD’s history, the company also launched a site dedicated to the 40th anniversary, with a complete timeline of AMD milestones and full details about the upcoming contests. In coming weeks the site is also expected to feature employee and customer-generated anniversary content.

“Forty years in any industry is a major achievement, but doing so in the rapidly changing, competitive semiconductor business is an enduring testament to the dedication and talent of AMD employees and alumni,” said Dirk Meyer, AMD president and CEO. “As the world and technology markets have changed through the years, AMD has remained focused on enabling the next wave of applications that we expect to drive the industry. We mark our 40th year as a much different company; a company intensely focused on designing and developing new products and platforms that combine our unique graphics and microprocessor technologies to create compelling user experiences.”

During the past 40 years, AMD transformed itself from a second-source supplier that worked within the confines of other companies’ designs to a widely recognized innovation leader that has driven the market and kept competition alive in one of the world’s most important technology sectors. AMD takes great pride in the role of igniting next-generation technology solutions, as well as the ability to see where customer and end-user needs are headed next and then collaborate with the industry accordingly.

Unique “Fusion” Business Philosophy
AMD’s unique “Fusion” business philosophy is a key part of what sets us apart from competitors. Fusion is the competitive differentiator that enables AMD to consistently deliver relevant, breakthrough innovation -- time and time again. Fusion marries innovation with collaboration.

Far more than just the convergence of microprocessor and graphics technologies, Fusion is the process by which AMD and its technology partners can ignite next-generation solutions that change the way people work, live and play through an adaptive combination of technology integration, customer intimacy and industry impact.

Fusion is the process where customer needs and desires can bond with AMD’s own engineering passion and unique capabilities. To learn more about innovation and the next generation of breakthroughs, visit

Giving back
In the past 40 years, users and enthusiasts the world over have been integral in the development and marketplace adoption of AMD products. To thank AMD users and celebrate the anniversary, beginning today, AMD is launching a series of contests in the coming months to give back to its dedicated fans. In total, the contests will give away 80 prizes, and the lucky winners will take home some of the most innovative AMD products on the market today.

The first contest, beginning today, is aimed at the AMD enthusiast community who rely on AMD products for their graphics and processing needs. For this contest, participants who submit brief, creative videos wishing AMD a happy birthday can be entered for a chance to win one of AMD’s award-winning

Graphics cards that have received numerous positive reviews from top-notch enthusiast outlets such as Hot Hardware and HardOCP. The qualified entrants who submit the three best videos will be eligible to receive an ATI Radeon HD 4890 graphic card and 40 additional runners up will be eligible to receive an ATI Radeon HD 4650 Radeon graphics card.

Alternatively, fans can show off their AMD pride by submitting photos showing off how much they love AMD products. The top five submissions from eligible participants will win AMD’s fastest quad-core processor ever, the AMD Phenom II X4 955 Black Edition processor, which helps users unleash the maximum potential of their PCs by providing superior performance and efficiency at a price that’s hard to beat (AMD SSBP is $245).

In addition, eight other qualified participants will be eligible to receive an AMD Athlon 7850 processor, which gives users the performance they need to help maximize productivity and enhance their digital entertainment experience.

AMD will kick off two additional contests later this year, which are planned to give fans the opportunity to win AMD-powered notebook computers as well as popular gaming consoles like the ATI graphics-equipped Nintendo Wii and Xbox 360.

UMC to acquire He Jian foundry in China

TAIPEI, TAIWAN: United Microelectronics Corp. recently convened its 19th session, 10th term of its Board of Directors meeting. During the meeting, its board approved to propose the acquisition by UMC of the holding company of He Jian Technology (Suzhou) Co. Ltd. for resolution at the annual shareholders meeting.

Established in late 2001 as a semiconductor foundry business, He Jian operates an 8-inch fab in Suzhou, China with a monthly capacity of 41,000 wafers, He Jian has made significant inroads into the China market and has established strong relationships with local companies across the semiconductor supply chain. He Jian was profitable from 2005 to 2007 and its operating performance and financial condition remain promising.

UMC's core business has been in semiconductor foundry for many years. In order to facilitate UMC's global business reach beyond its current markets, to help expedite business growth, to increase profitability, to enhance shareholder value and to increase UMC's business competitiveness, UMC believes that a production base in China is key.

During the past six months, the global semiconductor market suffered in the significant financial crisis that led to a worldwide economic downturn. The net value and market value of many semiconductor companies were negatively impacted. Conversely, China's market was relatively strong during this period, attracting many customers that preferred the option of local production.

UMC viewed these circumstances as an opportunity to invigorate itself towards long-term growth. After considering the required manpower, capital and time required to build a new fab, which would exceed one year, UMC proposed the Acquisition. In addition to realizing the value of the 15 percent ownership interest in the indirect holding company of He Jian held in trust for UMC and promoting its shareholders' interest, UMC could acquire a fully built, fully staffed and fully operational production base at an attractive price.
UMC further anticipates that, by focusing on customer satisfaction, the strong foundation established by He Jian in China will lead to further gains in market share. For He Jian, as an independently operated semiconductor foundry company, the Acquisition is expected to accelerate market penetration and increase profitability as a result of being incorporated into UMC's world-class operations.

Under the terms of the definitive agreement governing the Acquisition, holders of shares of the holding company that indirectly own He Jian, but excluding the 15% ownership interest held in trust for UMC, are entitled to receive an aggregate consideration of approximately US$285 million. These holders may elect to receive payment in the form of cash or an equivalent value of UMC common stock or American Depositary Shares ("ADS"). The basis of the number of shares to be delivered will be calculated by using the arithmetic average closing value of UMC's common shares and ADSs during the 6-month period prior to, but excluding, April 29, 2009, the date of the Board of Directors' meeting.

Consummation of the Acquisition is subject to approvals from governmental authorities, the passage of appropriate resolutions of the shareholders of UMC and the holding company of He Jian and certain other customary conditions.

After the consummation of the Acquisition, UMC plans to integrate resources, reduce operating costs, and expand business scale, as well as to rapidly shorten the time required for establishing a production base in China. With China's current market still growing and the eventual overall semiconductor industry recovery, UMC expects to expand the potential to grow its long-term revenue and earnings. The expanded international presence of UMC will also enhance its global competitiveness in the rapidly developing semiconductor industry.

Nomura International (Hong Kong) Ltd, Taipei Branch, is the sole financial advisor to UMC on the acquisition.

Intel and KACST to establish Center of Excellence in Nanomanufacturing applications in Saudi Arabia

RIYADH, SAUDI ARABIA: Intel and King Abdul-Aziz City of Science and Technology (KACST), Kingdom of Saudi Arabia signed a collaborative research agreement to establish CENA, a world-class Center of Excellence in Nano-manufacturing Applications.

The agreement was signed by Prince Dr. Turki bin Saud bon Mohammed Al-Saud, Vice President for research institutes, KACST and Mr. Aziz Al-noghaither, Intel's Saudi Arabia country manager. The signing ceremony was also attended by Justin Rattner, Intel Vice President, Director of Corporate Technology Group and Chief Technology Officer, and Dr. Makarem Hussein, a senior principal with Intel Corporation and the Founding Director of CENA, KACST researchers and managers, and Intel employees in the Middle East, Turkey and Africa region (META).

The focus of CENA is to conduct leading-edge research on advanced nano-processing and fabrication technology, including MEMS/NEMS, nano-sensors/network, nano-devices, and synthesis and deposition of nano-structures. CENA will commence its activities in October 2010.

CENA is designed to foster collaboration between Intel Corporation, a global process technology leader, KACST, a leading research institution in the Kingdom, local Saudi industry and academic resources in Saudi Arabia and META. Establishing CENA is considered an important step towards growing Saudi Arabia's knowledge-based economy and boosting its competitiveness on both regional and international levels. It also demonstrates the Kingdom's dedication to enhancing graduate education, promoting advanced research and creating an adequate environment for innovation for researchers in the Kingdom and META region.

KACST is working on setting up a "clean room" and has allocated the facility investment and funds to make sure the center is equipped with the latest state-of-the-art technologies and tools. Intel, in turn, is providing the planning, and know-how through a dedicated group of founding Intel experts assigned to conduct research and guide students at CENA.

During 2010-2011, CENA will tap into the abundant talent pool in the Kingdom and region to hire 50 to 60 carefully-selected and highly-motivated graduate students. These students will be recruited from all over the Arab World and Turkey through a rigorous selection process. As CENA's research is multidisciplinary in nature, students in computer science, physics, chemistry, material sciences and many of the engineering disciplines are encouraged to apply and to make CENA their preferred center to conduct research in nano-manufacturing. It is imperative to note that CENA does not grant academic degrees but provides research venue and guidance for students to conduct research towards graduate degrees from their home institution.

Compared to those awarded by institutions in the USA and Europe, CENA scholarships provide a far more generous support for the student and his home institution advisor. Some of these scholarships will be awarded by KACST while the majority will be provided by visionary cultural organizations in the Arab World who share the belief in the vital need to bring an end to the "brain drain" phenomena from the region to secure future growth and economic development. The identity of these organizations will be announced at a later time.

"This agreement with Intel will pave the way to creating a rich environment in which researchers and talented scientists, not only from the Kingdom but from the Arab and Islamic region at large, to do their research in this filed and leverage the capabilities CENTA is set to provide." Said Prince Dr. Turki bin Saud bon Mohammed Al-Saud, Vice President for research institutes, KACST.

"We must acknowledge the Kingdom's leading role in promoting advanced technology research in the region and commend their decision, which stemmed from their sense of responsibility, in making CENA accessible to all researchers in the region", said Dr. Makarem Hussein.

Abdulaziz Al-Noghaither, Intel's general manager for Saudi Arabia highlighted the close relationship between Intel and KACST that has spanned many years and resulted in multiple joint initiatives in the fields of science and technology. Al-Noghaither also praised KACST vision of turning the Kingdom into a regional hub for science and research.

CENA is the second joint center Intel is setting up in the Kingdom with KACST. Intel and KACST last year announced plans for establishing wireless mobile services R&D lab, a first of its kind for Intel outside the USA, with the aim of fostering innovation in META in the fields of WiMAX and other wireless communication technologies.

Source: Zawya

Taiwan foundry selects ASM for High-k ALD

ALMERE, THE NETHERLANDS: ASM International N.V. announced that a Taiwanese foundry has selected ASM's Pulsar atomic layer deposition (ALD) tool for volume manufacturing of its 28nm node high-k gate dielectric process.

Additionally, the foundry will pursue process development activity with ASM for their advanced generation high-k gates. ASM will deliver additional Pulsar process modules during the second quarter of 2009 for the advanced node development program. The foundry has worked with ASM's ALD high-k and metal gate equipment over the past four years to develop its high-k gate process, which utilizes hafnium-based materials.

"Achieving a successful high-k manufacturing process for the 28 nm node is a testament to ASM's ability to integrate new materials into manufacturing," said Glen Wilk, business unit manager for transistor products at ASM. "Having qualified our high-k process demonstrates its readiness for manufacturing at the 28nm node, and we look forward to advanced developments that extend those same benefits to future nodes."

ASM's Pulsar was the first tool to be used in volume manufacturing of high-k gates, starting at the 45 nm node and now that lead is extending to the 28nm node. ASM's high-k gate films include multiple hafnium based oxides, with aluminum oxide and lanthanum oxide available as high-k cap layers for metal electrode work function tuning.

SAFC Hitech, Air Water extend high-end materials research services collaboration

ST. LOUIS, USA: SAFC Hitech, a business segment within SAFC, a member of the Sigma-Aldrich® Group, underlined its commitment to Japan's microelectronics industry by announcing it has extended its collaborative partnership with leading industrial and medical gas producer, Air Water Inc. (AWI).

Under the terms of the agreement, the two companies expect to continue to offer the Japan chip industry high quality collaborative research and development services in local state-of-the-art facilities.

The extended agreement builds upon the companies' foundations of providing performance chemicals to both the silicon and compound semiconductor markets in Japan, and offers IDMs and OEMs direct access to local, high-quality R&D facilities that can be used to develop highly advanced integrated circuits and the tools to build them.

Customer research programs will be supported at AWI's Matsumoto campus in the Nagano region of Japan. This site houses state-of-the-art laboratories and Class 1,000 clean rooms where a wide range of high purity gas and chemical related research is currently performed by AWI and SAFC Hitech. A highly collaborative approach is employed by the companies and enables research groups in Japan, the U.S.A. and the UK to discuss and comment upon newly developed data, which can be made available to customers on a confidential basis.

"The innovative, highly competitive nature of Japan's semiconductor market has proven to be a significant driver in pushing the microelectronics industry forward," commented Dr. Peter Heys, Research and Development Director at SAFC Hitech.

"Extending our excellent working relationship with AWI provides valuable development resources to this key strategic market, one that we believe will continue to lead advancement of chip technology. The highly skilled scientific teams of SAFC Hitech and AWI and the world class facilities in which they work have attracted a number of Japanese multinational IDMs and OEMs. We currently have numerous programs where a customer's research engineers work closely alongside SAFC and AWI researchers to collaborate on projects."

Development work conducted at the Matsumoto facility continues the drive to support Moore's Law of developing advanced semiconductors that integrate a greater concentration of transistors per unit area to offer increased functionality while consuming less power. Such advances are expected to be achieved at the molecular level by investigating and altering the chemistry and physics of the contents of key components in the device architecture to allow electrons to maximize their required functions.

AWI's research facility employs three Atomic Layer Deposition Reactors that can deposit single, atom-thin layers of film in a controlled sequence cycle using specially designed and 'fit for purpose' chemical precursors.

The facility hosts a Rapid Thermal Annealer to stabilize the crystal structure of the thin film formed and has advanced microscopy and ellipsometry equipment to examine surface topography and measure film thicknesses. An X-ray Diffractometer is available to measure the chemical composition and crystallographic structure of a film and an Inductively Coupled Plasma Optical Emission Spectrometer is in place to measure the qualitative and quantitative components of the material composition of newly deposited film.

Advanced electrical measurement equipment allows the researcher to establish I-V and C-V plots and thus establish the flow (or non-flow) of current through the surface of the films and their substrates.

Samsung and PDF Solutions to Enhance PDF Solutions’ YieldAware fault detection and classification solution

SAN JOSE, USA: PDF Solutions, Inc., the leading provider of yield improvement technologies and services for the IC manufacturing process life cycle, announced that it is collaborating with Samsung Electronics Corp. to further the enhancement of PDF Solutions’ YieldAware Fault Detection and Classification (YA-FDC) solution.

The improved YA-FDC solution is intended to reduce process variability in Samsung’s fabs by controlling process tool health with models that predict the impact of tool sensor signals on final product yield.

“We are very impressed with the YA-FDC solution that controls the undesirable factors of process tools by modeling fab-wide FDC signals with product yield, and we appreciate the opportunity to further the development of an improved system with PDF Solutions, one of the world’s leading commercial providers of yield enhancement solutions," said Dr. C.S. Choi, Executive Vice President of System LSI Division, Samsung Electronics. “We look forward to enhancements to the current system for tool management, as well as reductions in process variability due to the tool variations at leading-edge technology nodes."

“We are pleased to work with Samsung to extend the industry’s only comprehensive system to model the impact of FDC signals on product yield and performance," stated David Joseph, Chief Strategy Office of PDF Solutions. "The integrated offering is designed to tie tool parameter data with product yield information to improve product performance and reduce the cost of good die. The YA-FDC solution creates models that predict future product results from current wafer-by-wafer tool signals. Our work with Samsung is intended to help reduce variability in Samsung’s high volume fabs running its most advanced products."

Wednesday, April 29, 2009

Strontium Technology to kick start second service center in Delhi

NEW DELHI, INDIA: Strontium Technology, the No.1 PC memory maker of Singapore, announces today that it will open its 2nd service center in Delhi. The new service center will be in addition to the existing center at Pondicherry.

Vivian Singh, CEO, Strontium Singapore, said: ‘Strontium stands for the highest customer service and additional service center in Delhi will increase channel confidence and increase customer satisfaction. The service center will not only act as the point to provide no hassle warranty but also assist the distribution channel partners with technical support and field application issues.”

Strontium uses only “Major Brand” memory chips in manufacturing Strontium branded memory modules. "It is already well known to the Indian distribution channel that Major Brand chips like Hynix and Micron are tested very rigorously and memory modules manufactured by Strontium have low failure rate because Strontium uses only Major Brand chips", Singh said.

Ajay Kogta, Country Manager, India Sub-continent, said, "With the establishment of another service center in Delhi, we will be able to cut down the turn around time of our service from days to hours.”

“The center will be set up in or around Nehru Place, New Delhi for the easy access of our customers and partners in the Northern India. The center would be fully operational by the end of the current quarter,” Kogta added.

After successfully entering and establishing its marketing office in the Indian market, Strontium is establishing second service center for its customers. It justifies the company’s goal of becoming a long term and leading player in the Indian memory market.

TI supports ZigBee Alliance plan to integrate IP standards for smart energy apps

BANGALORE, INDIA: Texas Instruments Incorporated (TI) today announced the company’s strong endorsement of the ZigBee Alliance’s recent announcement to integrate Internet Protocol (IP) and open standards. The plan to incorporate global IT standards from the Internet Engineering Task Force (IETF) will allow continued growth of smart grid applications beyond the smart meter with the proven ZigBee Smart Energy public application profile.

“The ZigBee Alliance decision to expand its leading wireless networking standard to incorporate IP standards will solidify and accelerate developments and innovation of rapidly growing smart grid applications,” said Laurent Giai-Miniet, general manager of TI’s Low-Power RF business. “TI is a leading supplier in this market segment and will continue to invest in solutions for smart energy. TI is also the only supplier that can deliver solutions for ZigBee in all market segments with ZigBee PRO, RF4CE, Smart Energy profile and IP.”

“Our Energy Sector members have been looking for a coupling of ZigBee’s established, respected and mature wireless standards with native IP capabilities and IETF support,” said Bob Heile, chairman of the ZigBee Alliance. “This move addresses that need and will further position ZigBee as a leading solution for a variety of smart grid efforts underway around the world.”

TI’s commitment and investment in low-power wireless:
* TI has championed the evolution of all ZigBee software specifications, including ZigBee 04, ZigBee 06, ZigBee PRO and the recently announced ZigBee RF4CE
* As a ZigBee Alliance promoter, TI has been deeply involved in the technical development of the popular ZigBee Smart Energy public application profile
* TI has participated in ZigBee Smart Energy interoperability testing since inception and was among the first awarded Golden Unit status
* In 2008, TI joined the IPSO Alliance, which was formed to promote the Internet Protocol as the network technology of choice for connecting smart objects around the world
* TI has developed partnerships with IP-based third parties to provide solutions on TI platforms
* TI also supports open source IP-based software stack that enables the integration of IPV6-based applications, such as web servers

The incorporation of global IT standards from the IETF with the wide range of existing ZigBee public application profiles will empower the ZigBee user community to develop innovative solutions for wireless sensor networking devices and link them through a scalable utility IT network.

TI’s leading RF hardware and software expertise will be critical in the definition and development of the new specification. TI will continue to collaborate within the technical working groups and announce new and innovative products for smart grid applications.

AMD, FXLabs ally to erase sensory barrier between cinema and games

HYDERABAD, INDIA: Advanced Micro Devices (AMD) and FXLabs Studios Pvt. Ltd., India’s leading end-to-end game development company, announced a strategic technology alliance to foster game development in the country.

The association makes FXLabs the first Indian game development company to join forces with AMD to deliver a compelling gaming experience. As a part of the alliance, FXLabs will deploy the latest ATI FirePro series of workstation graphics technology for the development of upcoming games, provide a test base consisting of AMD Radeon series of consumer graphics processors and in addition, provide the technology expertise of its graphics engineers.

In June 2008, AMD demonstrated a milestone achievement in ultra-realism and interactive visual computing through the processing power of its teraflops graphics chip. The demonstration of what AMD termed, “Bollywood 2.0 experience”, eradicates the sensory barrier that separates today’s visionary content creators and the interactive experiences they desire to create for audiences around the world. The Bollywood 2.0 demo showed the fusion of dynamic real-time interactivity with convincing cinematic digital effects that appear to be real places and things captured on video.

This AMD advancement in processing technology can now begin combining with the artistic passion of top movie directors, visual effects companies and game developers worldwide to open the door for unprecedentedly engaging entertainment experiences.

Ramkumar Subramanian, sales and marketing vice president, AMD India, said: “Gaming consumers in India have begun to demand content that is near life-like and flawless. AMD is in the right position to provide the technology that drives this content with its platform combination of processor and graphics. In addition, through our technology alliance with FXLabs we expect to break the next frontier in gaming.”

Commenting on the partnership, FXLabs Founder & CEO, Sashi Reddi said: “Gaming in India has matured significantly over time and is driven by the demand for quality content with regional flavour. We are very happy to collaborate with AMD for their professional graphics series. I am confident that our developers can now scale their projects to superior quality levels.”

Speaking during the signing of the MoU, Janet Matsuda, Senior Director of Professional Graphics, AMD, said: “Graphics content developers demand superior performance and speed that does not hinder their creativity. AMD’s ATI FirePro series of graphics technology enables developers to create and innovate rather than having to wait for their computers to catch up. This provides The Ultimate Visual Experience to consumers.”

Toshiba, Nakaya and Amkor in JV MoU for system LSI assembly and test service

OITA & TOKYO, JAPAN & CHANDLER, USA: Nakaya Microdevices Corp. (NMD), Amkor Technology Inc. and Toshiba Corp. announced that they have signed a non-binding memorandum of understanding (MoU) expressing their intent to form a joint venture in Japan that will provide system LSI assembly and testing services.

The structure, terms and amounts of each party’s contributions and other support for the joint venture have not yet been determined. The commencement of joint venture operations is targeted for October 1, 2009 but is subject to the negotiation of definitive agreements, due diligence and the receipt of any necessary government approval.

Toshiba plans to transfer to the joint venture the system LSI back-end process operations of its Japan-based, wholly owned semiconductor packaging company, Toshiba LSI Package Solutions Corporation (TPACS), including TPACS’s Oita Works and its system LSI business at Fukuoka Works. Toshiba also plans to transfer to the joint venture wafer probing equipment installed at its Oita Operations and Kitakyushu Operations. It is anticipated that NMD will have a majority position in the joint venture business. Amkor is expected to provide its manufacturing expertise, sales support, technical assistance, planning and procurement services and other support to the joint venture.

This collaboration will support Toshiba Group in promoting an outsourcing system for the LSI back-end process, and in accelerating the comprehensive restructuring of its semiconductor business under the Action Program to improve profitability that the company announced in January this year. It will also allow NMD and Amkor to enhance and strengthen their relationships with a strategic customer and to further grow their respective semiconductor assembly and testing businesses.

NI intros PXI Express reconfigurable IF transceiver

AUSTIN, USA: National Instruments announced the NI PXIe-5641R RIO IF transceiver, the company's most recent device for RF test.

The NI PXIe-5641R is a dual-input, dual-output module that combines an intermediate frequency (IF) transceiver with reconfigurable I/O (RIO) capability using a Xilinx Virtex-5 SX95T field-programmable gate array (FPGA) and PXI Express technology.

With this new module, engineers can take advantage of the flexibility of the NI LabVIEW FPGA Module and the performance of PXI Express for applications such as RF test, software-defined radio, signal intelligence and communication system design.

With the NI PXIe-5641R IF transceiver, engineers have the ability to incorporate customized, real-time RF stimulus and response into their test, measurement and communication systems through user-programmable FPGAs on RIO hardware. The test hardware then becomes protocol-aware, dynamically changing measurements and stimuli based on the response of the device under test.

Protocol-aware or real-time test is beneficial in applications such as RFID tag testing, cellular base station emulation or any hardware-in-the-loop RF testing. For communications applications such as software-defined radio and signal intelligence, engineers can use FPGAs to prototype and implement new communication standards and perform real-time signal analysis and event detection.

The NI PXIe-5641R has two 14-bit, 100 MS/s analog-to-digital converters (ADCs) with built-in 20 MHz bandwidth digital downconverters (DDCs), and two 14-bit, 200 MS/s digital-to-analog converters (DACs) with built-in 20 MHz bandwidth digital upconverters (DUCs).

Because of these NI RF upconverters and downconverters, the NI PXIe-5641R can support RF frequencies up to 2.7 GHz, making the module ideal for spectral monitoring and signal intelligence as well as real-time RF test. Engineers can take full advantage of the NI PXIe-5641R by using the LabVIEW FPGA Module, which extends the LabVIEW graphical development environment to target NI RIO hardware.

Surprising gains in semicon sectors despite downturn

MOUNTAIN VIEW, USA: In spite of the downturn in communications semiconductor sales, some sectors revealed double-digit growth according to the latest market share numbers released by The Linley Group. Among the fastest growing product markets in 2008 were 10-Gigabit Ethernet NICs, switch fabrics, PON, and G.709/OTN.

"These findings support our forecast last year that even in a week economy, a number of growth opportunities still existed," said Joseph Byrne, senior analyst with The Linley Group. "We found that the five fastest growing companies in 2008 were AMCC, Broadcom, Intellon, PMC-Sierra, and Texas Instruments, with Broadcom growing across the board, particularly in Gigabit Ethernet and broadband."

Report highlights include:
* 10-Gigabit Ethernet NIC revenue grew 65 percent.
* Switch fabric revenue grew 49 percent.
* PON interface chip revenue grew 46 percent.
* G.709/OTN IC revenue grew 43 percent
* Double-digit growth was also reported in network processors (NPUs), voice-over-packet (VoP) processors, and embedded processors for storage systems.

Complete details are available in "Communications Semiconductor Market Share 2008" the latest report from The Linley Group, providing all new market-share data for more than 20 categories of wired communications semiconductors.

The report includes Ethernet products, broadband interface chips, embedded processors, network processors, interconnect chips, security accelerators, voice-over-packet (VoP) processors, FPGAs, and more. New in this edition are 10GbE controller chips for NIC and LAN on motherboard (LOM) applications, OTN chips, and 32-bit CPU IP.

Tuesday, April 28, 2009

GLOBALFOUNDRIES appoints new technology leader

SUNNYVALE, USA: GLOBALFOUNDRIES, the new leading-edge semiconductor foundry company formed by a joint venture between AMD and Advanced Technology Investment Co. (ATIC), announced the appointment of Gregg Bartlett as senior vice president of technology and research and development.

The move underscores GLOBALFOUNDRIES’ commitment to driving innovation in advanced process technology and providing chip designers with the resources to enhance the performance and efficiency of their products.

Bartlett comes to GLOBALFOUNDRIES with 25 years of experience in technical and management positions at Freescale Semiconductor and its predecessor, Motorola’s Semiconductor Products Sector. He succeeds Craig Sander, the R&D leader during the initial launch of GLOBALFOUNDRIES. Sander will now be handling a number of special projects, reporting directly to company CEO Doug Grose.

“Gregg brings a wealth of experience in both the collaborative development of advanced technology and its application to a variety of products,” said Grose, chief executive officer of GLOBALFOUNDRIES. “He also understands what it takes to transition from an internal supply chain to an independent, customer-focused company. Under Gregg’s stewardship, GLOBALFOUNDRIES will work to extend its technology leadership, raising the bar for the entire foundry industry and continuing to push semiconductor technology at the leading edge.”

Bartlett will relocate from Austin to upstate New York, where he will oversee GLOBALFOUNDRIES’ collaborative R&D activities with the IBM Alliance for industry-leading low-power and high-performance semiconductor process technology.

“The semiconductor industry is poised to greatly increase its reliance on foundries,” Bartlett said. “Yet this business model will succeed only if independent foundries can innovate and develop the most advanced technologies. GLOBALFOUNDRIES is just the catalyst to make this happen. For someone passionate about technology and bringing the right people together to move it forward, I can’t think of a better place to be.”

Bartlett most recently served as vice president of design technology at Freescale Semiconductor. His tenure emphasized collaborative R&D efforts, including representation of Freescale in the IBM Alliance and the Crolles 2 Alliance in Europe. He is the board chairman for the Semiconductor Research Corporation and a member of the Semiconductor Industry Association’s Technology Steering Committee, among others. Bartlett holds a B.S. in chemical engineering from Kansas State University.

Qualcomm to pay $891 million to Broadcom

USA: Qualcomm Inc. and Broadcom Corp. have entered into a settlement and multi-year patent agreement. The agreement will result in the dismissal with prejudice of all litigation between the companies, including all patent infringement claims in the International Trade Commission and US District Court in Santa Ana, as well as the withdrawal by Broadcom of its complaints to the European Commission and the Korea Fair Trade Commission.

Under the agreement, the companies have granted certain rights to each other under their respective patent portfolios. Qualcomm will pay Broadcom $891 million over a four-year period. The terms of this agreement will not result in any change to Qualcomm's 3G (e.g., CDMA2000, WCDMA and TD-SCDMA) and 4G (e.g., LTE and WiMAX) licensing revenue model.

The terms of the agreement include, among other elements:
* Broadcom and Qualcomm agree not to assert patents against each other for their respective integrated circuit products and certain other products and services;
* Broadcom agrees not to assert its patents against Qualcomm's customers for Qualcomm's integrated circuit products incorporated into cellular products;
* Qualcomm's customers do not receive rights to any of Broadcom's patents with respect to Qualcomm integrated circuit products incorporated into non-cellular products and equipment;
* Qualcomm agrees not to assert its patents against Broadcom's customers for Broadcom's integrated circuit products incorporated in non-cellular products;
* Broadcom customers do not receive rights to any of Qualcomm's patents with respect to Broadcom integrated circuit products incorporated into cellular products and equipment;

Qualcomm will pay Broadcom $891 million in cash over a period of four years, of which $200 million will be paid in the quarter ending June 30, 2009. The agreement does not provide for any other scheduled payments between the parties.

Other terms of the agreement are confidential.
"We believe that this resolution is positive for both Qualcomm and Broadcom, our customers, our partners and the overall industry," said Dr. Paul E. Jacobs, chairman and CEO of Qualcomm, and Scott A. McGregor, president and CEO of Broadcom.

"The settlement will allow us to direct our full attention and resources to continuing to innovate, improving our competitive position in this economic downturn, and growing demand for wireless products and services," Jacobs said. "I am pleased that we have achieved this important settlement. At a time when the wireless industry should be focused on moving forward, the agreement removes uncertainty for Qualcomm and its customers."

"Today's settlement allows both companies to move on with their business and compete in the semiconductor sector as two of its innovation leaders," McGregor said. "We have set aside our differences while addressing the needs of our customers, our shareholders and the industry. In addition, the companies have worked together to achieve their mutual goals of improving the competitive dynamics of the industry."

Monday, April 27, 2009

NEC and Renesas to integrate biz ops, establish world's third largest semicon firm

KAWASAKI & TOKYO, JAPAN: NEC Electronics Corp. Renesas Technology Corp., NEC Corp. Hitachi Ltd and Mitsubishi Electric Corp. today agreed to enter into negotiations to integrate business operations at NEC Electronics and Renesas.

1. Background and goals of business integration
NEC Electronics was established in 2002, separating from NEC, and Renesas was established in 2003, integrating semiconductor units at Hitachi and Mitsubishi Electric. Both as leading semiconductor companies, NEC Electronics and Renesas provide a wide variety of semiconductor solutions, primarily specializing in microcontroller units (MCUs). In light of fierce global competition in the semiconductor market, NEC Electronics and Renesas have agreed to explore the possibility of business integration in order to further strengthen their business foundations and technological assets while increasing corporate value through enhanced customer satisfaction.

By integrating the world’s two largest MCU suppliers, the new company will provide one of the most competitive MCU product lineups throughout the world.

NEC Electronics and Renesas both focus on the fast-growing field of system-on-chip (SoCs) products. NEC Electronics is a leading producer of SoCs for digital consumer electronics, while Renesas is a well established manufacturer of SoCs for mobile phones and automotive applications. By reinforcing the companies’ respective strengths and development resources the new company will provide globally competitive SoC products.

In terms of the discrete semiconductor business, both companies will define strategies to enhance the competitiveness of analog and discrete products that generate synergies with MCUs.

The new integrated company will have three major product groups, MCUs, SoCs, and discrete products, and will become the world’s third-largest semiconductor business. The new company will select and focus on the development of projects covering a diverse range of fields and will expand its comprehensive lineup of globally competitive products.

In order to address the ongoing challenges of the current economic downturn, NEC Electronics and Renesas will each execute structural reform plans in order to strengthen their business frameworks. Upon completion of these structural reforms, the two companies will integrate their operations to achieve synergies and boost profitability. This integration will result in the establishment of a powerful new semiconductor company that is capable of consistently achieving high earnings and maintaining the ability to withstand changing market conditions.

2. Corporate structure following integration
The preconditions for holding future negotiations are to integrate business operations on April 1, 2010, and to maintain public listing for the new company.

To ensure fairness and equitability, the ownership ratio of the integrated company will be decided and announced before the conclusion of the integration contract through negotiations between NEC Electronics and Renesas, based on scheduled due diligence. The new company will announce the company name, the location of its headquarters, the corporate representative, the board members, capitalization, total assets, and financial forecasts following the integration.

3. Schedule moving forward
NEC Electronics and Renesas plan to sign an agreement at the end of July, 2009 to integrate their business operations. The dates and details of the extraordinary general meetings of shareholders for NEC Electronics and Renesas to consider approval of the integration are to be announced following the signing of the agreement.

Implementation of the planned business integration is conditional upon authorization of the integration by the relevant government agencies.

Xilinx drives evolution of FPGA design with ISE Design Suite 11.1

SAN JOSE, USA: Xilinx today announced that it is now shipping ISE Design Suite 11.1, the industry's first FPGA design solution with fully interoperable domain-specific design flows and user-specific configurations for logic, digital signal processing (DSP), embedded processing, and system-level design.

The release of ISE Design Suite 11.1 is a major milestone in the delivery of targeted design platforms with simpler, smarter design methodologies for creating FPGA-based system-on-chip solutions targeting a wide variety of markets and applications.

This latest release of the award-winning ISE Design Suite from Xilinx pioneers new ground for delivering sophisticated FPGA design technologies to a user community that is extraordinarily diverse with four domain-specific design configurations: the Logic Edition, DSP Edition, Embedded Edition, and System Edition.

Each Edition provides a complete FPGA design flow tailored for the user profile (engineer persona) and domain-specific methodology and design environment requirements, enabling designers to focus their efforts on creating value-added, competitively differentiated product applications.

ISE Design Suite 11.1 also incorporates new features and ease-of-use enhancements to the base-level FPGA and domain-specific tools, technologies, and intellectual property (IP) components delivered with Xilinx targeted design platforms.

Introduced by Xilinx with its new Virtex-6 and Spartan-6 FPGA families, targeted design platforms provide embedded, DSP, and hardware designers alike with access to a wide array of silicon devices supported by open standards, common design flows, IP, development tools, and run-time platforms.

The ISE Design Suite 11.1 release shrinks development cycles up to 50 percent, reduces dynamic power consumption by 10 percent on average, and boosts tool performance by 2X for current generation Virtex-5 and Spartan-3 FPGA-based designs and enables early access customers to start designing with targeted design platforms based on the latest Virtex-6 and Spartan-6 devices.

"New FPGA users are coming from different design disciplines, and they approach design from their unique perspectives. It is no longer feasible to expect that one design flow or environment fits every designer's needs," said Tom Feist, senior marketing director for ISE Design Suite at Xilinx. "Our ISE 11.1 release addresses this reality, and provides the tools designers need with targeted design platforms that reflect the way they work, so they can go from concept to production in the fastest possible time. This domain-specific approach establishes a new interoperability benchmark for FPGA design tools that is backed by more than two years of R&D and extensive beta testing with early access customers."

Domain-optimized design configurations
Each ISE Design Suite 11.1 Edition provides a front-to-back design environment built on Xilinx exclusive technologies for design entry, synthesis, implementation, and verification with integration to industry-leading third-party synthesis and simulation solutions.

In this way, designers can select the configuration that is best suited to their methodology and Xilinx targeted design platform for the ultimate in productivity, fastest time to design completion, and optimal quality of results.

* ISE Design Suite Logic Edition is optimized for logic and connectivity designers with the Xilinx Base Targeted Design Platform, and includes: ISE Foundation, ISE Simulator, PlanAhead Design and Analysis Tool, ChipScope Pro Debug and Serial I/O Toolkit, extensive catalog of foundation IP, and bitstream generation/device programming utilities.

* ISE Design Suite DSP Edition is optimized for algorithm, system, and hardware developers with the Xilinx DSP Domain Targeted Design Platform, and includes: System Generator for DSP, AccelDSP(TM) Synthesis Tool and DSP-specific IP, plus all base-level FPGA design tools and technologies in the Logic Edition.

* ISE Design Suite Embedded Edition is optimized for embedded system designers (both hardware and software programmers) with the Xilinx Embedded Domain Targeted Design Platform, and includes: the Embedded Development Kit (EDK) with Platform Studio Design Suite, Software Developers Kit (SDK) now also available as a standalone product, embedded-specific IP including the MicroBlaze soft processor, plus all base-level FPGA design tools and technologies in the Logic Edition.

* ISE Design Suite System Edition is optimized for system designers with the Xilinx Connectivity Domain Targeted Design Platform, and includes: all the tools, technologies, and IP in the Logic Edition, DSP Edition and Embedded Edition.
Higher Productivity, Faster Design, Better Results

Xilinx has also improved inter-tool communication throughout the entire design process, created seamless interoperability between all design configurations, and adopted EDA industry-standard FLEXnet licensing solutions to deliver breakthrough performance, power and cost advantages with the ISE Design Suite 11.1 release.

Embedded and DSP flows are more tightly integrated to ease implementation of embedded, DSP, IP and custom blocks into a single system. Each step within the design flow is optimized to facilitate more "turns per day" (design iterations) with new multi-threaded place and route capabilities, SmartXplorer and ExploreAhead support for distributed processing techniques, and second generation SmartGuide technology delivering 2X faster compile and incremental run times to accelerate timing closure.

The ISE Design Suite 11.1 also features advanced power optimization algorithms and unparalleled design visibility with access to the full-featured PlanAhead Design and Analysis software for all Editions. Designers can more effectively evaluate, analyze, and optimize implementation results to achieve faster performance, greater device utilization, and higher design quality.

In addition, ISE Design Suite 11.1 users now have the added flexibility to tailor their installation and monitor usage. New floating licenses allow multiple users in multiple locations to access a single license in order to cost effectively support large or distributed design organizations and help reduce overall project costs.

Alternatively, node-locked licenses provide the option for limiting usage to a single machine.

Availability and pricing
The ISE Design Suite 11.1 with complete domain-specific editions supporting Virtex-5 and Spartan-3 FPGA families is immediately available. Support for Virtex-6 and Spartan-6 FPGAs is available through the ISE Design Suite 11.1 early access program with general public support to follow in the ISE Design Suite 11.2 release.

US list price for ISE Design Suite 11.1 node-locked license starts at: $2,995 for Logic Edition; $3,395 for Embedded Edition; $4,195 for DSP Edition; and $4,595 for System Edition. Flexible floating licensing options are also available. Customers can download full-featured 30-day evaluation versions of ISE Design Suite 11.1 Editions from the Xilinx web site at no charge.

Cadence's focus -- systems, low power, enterprise verification, mixed signal and advanced nodes

I recently had the opportunity of meeting up with Nimish Modi, Senior Vice President, Research and Development, Front-End Group, Cadence Design Systems, along with Rahul Arya, Marketing Director, Cadence Design Systems (I) Pvt. Ltd.

Modi provided a perspective on how solutions from the EDA sector help the electronic design industry improve productivity, predictability and reliability of design processes, especially verification. Design verification is the process of ensuring that a chip design meets its specifications.

According to him, today's product development ecosystem comprises of three driving forces -- productivity, predictability and reliability. "We are clearly at the core of product development. We have a very strong breadth and depth. There is a layer of solutions we have integrated with our product offerings," he added.

He highlighted that Cadence's solutions consist of integrated point tools, as well as recommended use models. It also has a very strong services offering.

Focus on five key areas
Currently, Cadence is focusing on five key areas -- systems, low power, enterprise verification, mixed signal and advanced nodes. "We have a solutions oriented approach across the board," Modi said.

On systems, it is key to focus on gaining more productivity. Modi said: "This can be done by raising the level of abstraction. The technologies available to address ESL have been around for a while, each one addressing a piece of the puzzle. The need is there for seeing tremendous improvements in that. Here, Cadence's C-to-Silicon Compiler comes in."

"The other piece is -- it has incremental synthesis capabilities. A third thing -- it is connected to the downstream flow. This is the foundation of our systems strategy," said Modi.

Coming to the systems design and verification strategy, the first component involves planning and management. "We have an enterprise manager," he added. Cadence has been a leader in the hardware assisted verification with rich VIP/SpeedBridge portfolio. It has enabled a move to TLM driven design and verification flow. Cadence also delivers unique system power exploration, estimation and optimization flow. It provides unique hardware/software co-verification capabilities (Incisive Software eXtensions) as well.

Low power strategy
On Cadence's low power strategy, Modi highlighted three components -- implementation, verification and design. "The innovation was the ability to create a power format to capture the design intent. We are committed to providing flow operability as well. We want customers to make use of advanced power management techniques," he added.

"We have the superior low power technology," he claimed, referring to the Power Forward Initiative (PFI). "Look at technology -- that is proven. The format is a means to the end. We are also working on providing more capabilities in the power exploration space. We are working under different aspects.

"You can do power analysis on the IP block; there's C-to-Slicon, which has power as a function; multi-supply voltage will be a component of our synthesis solution. All of these vectors are driving the power exploration space. Seventy percent of chips' power is determined at or before the RTL stage," said Modi.

Cadence has a closed loop verification methodology. At each stage, you can go back and make sure you can be consistent with what's there upfront.

Enterprise verification strategy
On enterprise verification, Cadence's approach is plan-to-closure. Predictability -- utilize executable plans and metrics that predict functional closure; productivity -- effectively deploy methodolgy driven multispecialist flows. with VIP and multiproduct automation; and quality -- reduce risk of functional bugs at tape-out at various project stages.

Modi added: "Our verification IP portfolio is also very critical. The depth of our portfolio is the broadest in the industry. In verfication, the actual TAM is growing. We are getting opportunities as well. Multi dimensions of enterprise verification are being taken care of by us."

Interesting that all EDA companies have focused on verification! Why now and why not earlier? Modi said: "We've been in this area for a while. We have pioneered the new approaches. The goal is: how do you know it is good enough to hit the tapeout button? Our goal is to raise the confidence of customers."

He added: "We are coming uo with a hybrid model. We are engaging with customers at this point of time. We came up with multi-language support in OVM. We have 30+ verification IP portfolios."

Trends in complex SoCs
Today, it is largely a mixed signal world. Mixed signal IC revenue has been increasing faster than the rest of the industry. It is driven by applications, including wireless devices, consumer and DTV, and automotive.

Modi said: "There is a genuine need to support natively analog behavioral models in a digital centric verification environment. Mixed signal is a larger percentagre of area and effort."

Coming down to advanced nodes, it is no surprise that Cadence definitely supports MCMM (multicorner and multimode). "It is part of our Encounter Digital Implementation System," added Modi.

LSI storage system boosts RoI with 8Gbps FC and full disk encryption

BANGALORE, INDIA: LSI Corp. announced enhancements to the Engenio 7900 Storage System which provide midrange storage area network (SAN) customers with a “future-proof” storage infrastructure designed to meet the demands of continuous data growth and evolving application, configuration and capacity requirements.

New LSI Engenio 7900 features and functionality include 8Gb/s Fibre Channel (8GFC) interfaces, which provide up to twice the bandwidth per channel between server and storage, and pay-as-you-grow scalability up to 448 drives for nearly double the capacity. SafeStore encryption services also have been added for comprehensive data-at-rest security using self-encrypting drives (SED), as well as a simplified management interface that doesn’t sacrifice control.

"Meeting enterprises' evolving infrastructure and application requirements is always a critical challenge for IT suppliers, but in these difficult economic times, IT executives also require solutions that protect IT investments," said Richard Villars, vice president of Storage System and IT Executive Strategies at IDC. "Solutions like the LSI Engenio 7900 that support 8Gb/s FC and advanced data encryption in a scalable platform provide a solid foundation for enterprises that need to deal with evolving storage demands."
8GFC technology with “future-proof” investment protection

The Engenio 7900 is one of the industry’s first enterprise-class midrange storage systems based on 8GFC technology. It combines 8GFC connectivity with industry-leading, mixed workload performance and configuration flexibility to meet the diverse application requirements of large-scale virtualization and consolidation implementations, high-performance computing and data warehousing environments.

The system’s 8GFC host cards eliminate the need to make trade-offs between system performance and server I/O slot conservation by reducing the number of host bus adapters (HBAs) per server and the number of overall ports in the Fibre Channel SAN infrastructure required to deliver comparable performance. This results in lower hardware acquisition and operational costs through fewer components and infrastructure simplification.

The system’s ability to auto-negotiate Fibre Channel links allows it to seamlessly integrate into an existing 2GFC or 4GFC infrastructure to provide customers in these environments with immediate performance and connectivity benefits. By utilizing existing infrastructure, the 7900 establishes a foundation for the future upgrade to 8GFC SAN environments.

Scalability also has been nearly doubled to address today’s exponential rate of data growth. With the ability to support up to 448 drives, the 7900 offers linear scalability to the levels needed to meet the most demanding performance and capacity requirements.
Comprehensive data-at-rest security without performance penalties

The 7900 adds SafeStore encryption services to address the rising costs of data breaches and public disclosure resulting from lost, misplaced or stolen hard drives, as well as routine activities such as servicing or decommissioning defective drives. In 2008, the litigation, remedy and lost revenue associated with data breaches cost companies an average of $6.6 million per incident.*

SafeStore helps organizations to minimize the risk of costly data exposure and meet new government regulations. It combines local key management and self-encrypting drives to effectively secure data throughout a drive’s lifecycle from initial installation to servicing, redeployment and final disposal. SafeStore provides a comprehensive data-at-rest solution that secures data contained on drives within the data center without sacrificing performance or ease of use.

The solution is fully integrated into LSI SANtricity Storage Manager software. Key management is transparent to day-to-day storage administration, making SEDs as easy to manage as traditional hard drives. With advanced features such as “instant secure erase,” a sub-second method for destroying all the data contained on an SED, regardless of drive capacity, SafeStore provides an even higher level of data erasure than traditional methods for re-provisioning and disposal of drives.

“Facing relentless data growth and a turbulent economic climate, businesses need storage solutions that reduce costs now and future-proof infrastructure investments,” said Vic Mahadevan, vice president of marketing and product management, Engenio Storage Group, LSI. “The Engenio 7900 allows users to immediately realize the performance and efficiency benefits of 8GFC technology while delivering the piece of mind that data is securely stored regardless of its physical or virtual location.”

Enhancements to the 7900 system also include a new GUI for the SANtricity Storage Manager software. The updated management interface provides an ideal combination of robustness and ease of use in a midrange system. It offers full-time system administrators complete configuration control and part-time administrators the simplicity of an intuitive interface that helps to ensure optimal storage utilization.

The LSI Engenio 7900 with 8GFC and SafeStore encryption services is immediately available to OEM customers. SafeStore encryption services will soon span LSI MegaRAID® adapters and additional Engenio storage systems, bringing the benefits of drive-level encryption and affordable data security to businesses of all sizes from -- SMBs to the enterprise.

Cypress unveils first SRAM on 65nm

SAN JOSE, USA: Cypress Semiconductor Corp. announced it is sampling the industry’s first Quad Data Rate (QDR) and Double Data Rate (DDR) SRAM devices on 65-nm linewidth.

The 72-Mbit QDRII, QDRII+, DDRII and DDRII+ memories leverage process technology developed with foundry partner UMC. The SRAMs feature the market’s fastest available clock speed of 550 MHz and a total data rate of 80Gbps in a 36-bit I/O width QDRII+ device, using half the power of 90nm SRAMs.

They are ideal for networking applications, including Internet core and edge routers, fixed and modular Ethernet switches, 3G base stations and secure routers, and also enhance the performance of medical imaging and military signal processing systems. The devices are pin compatible with 90nm SRAMs, enabling networking customers to increase performance and port density while maintaining the same board layout.

Compared with their 90nm predecessors, the 65nm QDR and DDR SRAMs lower input and output capacitance by 60 percent. The QDRII+ and DDRII+ devices have On-Die Termination (ODT), which improves signal integrity, reduces system cost and saves board space by eliminating external termination resistors. The 65nm devices use a Phase Locked Loop (PLL) instead of a Delay Locked Loop (DLL), which enables a 35 percent wider data valid window to reduce development time and cost for the customer.

“We continue to expand our Synchronous SRAM portfolio to broaden our target markets and grow market share,” said Dana Nazarian, Executive Vice President of the Memory and Imaging Division at Cypress. “Cypress is committed to supporting the SRAM market long-term and building on our leadership position.”

2011 peak year for SD DTT STB semicon: In-Stat

SCOTTSDALE, USA: The semiconductor opportunity in standard definition (SD) Digital Terrestrial TV (DTT) set-top boxes will peak in 2011 at nearly $500 million.

High-definition DTT STBs also offer a short-term spike in semiconductor opportunity. However, SD DTT STBs are the more sustainable opportunity for semiconductor manufacturers, reports In-Stat.

"The US analog shut-off is driving a surge of HD converter boxes in 2008 and 2009," says Gerry Kaufhold, In-Stat analyst. "However, this bubble will wane, while the SD DTT market continues to grow across a broader set of geographic markets."

Recent research by In-Stat found the following:
* Key component categories include the Demux/CPU/AV decoder and the MPEG-2 MP@HL/Graphics IC.
* The European DTT STB Market Value will peak in 2011 at $1.6 billion.
* On a European country basis, UK leads the market, followed by Spain, France, Germany, and then Italy.
* Total DTT STB unit shipments will peak at 44 million in 2009.
* Standard Definition DTT Set Top Box unit shipments will peak in 2011.

Smater portable medical devices with TI’s signal-chain-on-chip MCUs

BANGALORE, INDIA: To quickly and efficiently develop reliable, convenient and low-cost medical devices, engineers require microcontrollers (MCUs) that provide low power consumption, high performance and targeted peripheral integration. Addressing this need, Texas Instruments Incorporated (TI) today announced the new MSP430FG47x ultra-low power MCU series.

The FG47x MCUs offer on-chip integration of the complete signal chain, reducing design complexity and resulting in significant space and cost savings. These devices will help developers improve the quality and accessibility of healthcare through products such as blood glucose meters, digital thermometers, pulse oximeters and blood pressure/heart rate monitors.

MSP430FG47x key features and benefits
* Complete signal chain integrated on chip, consisting of two configurable op amps, 12-bit digital-to-analog converter (DAC), comparator and 16-bit analog-to-digital converter (ADC), reduces board space, bill of materials and time to market.
* 16-bit Sigma-Delta ADC for applications that require high-resolution signal conversion.
* 128-segment LCD driver with contrast control for convenient diagnostic display.
* Multiple memory options available: up to 60KB flash and 2KB RAM for easy programmability.
* Enhanced portability with ultra-low power consumption of the MSP430 MCUs, extending battery life to 20+ years.
* Integrated intelligent peripherals on MSP430 MCUs provide high performance and consume no power when not in operation.
* Two package options to meet various printed circuit board (PCB) size requirements: 80-pin QFP or 113-ball BGA, which measures only 7.1 x 7.1 mm.

The FG47x devices are the newest addition to TI’s broad MCU portfolio for medical applications. TI offers a full-range of embedded processing and complementary analog solutions that help designers create more flexible, affordable and convenient medical devices that improve diagnostics and increase accessibility. The ultra-low power consumption of TI’s MCU solutions enhances portability for easier monitoring and treatment of chronic conditions.

Xilinx rolls out ISE Design Suite 11 for targeted design platforms!

Xilinx has now started shipping its ISE Design Suite 11.1!Source: Xilinx

This is said to be the industry's first FPGA design solution with fully interoperable domain-specific design flows and user-specific configurations for logic, digital signal processing (DSP), embedded processing, and system-level design.

The ISE Design Suite 11.1 release is a major milestone in the delivery of targeted design platforms with simpler, smarter design methodologies for creating FPGA-based system-on-chip solutions targeting a wide variety of markets and applications.

Tom Feist, Senior Marketing Director, Xilinx Inc., said that the company has been driving the evolution of FPGA design with domain-specific development environment for targeted design platforms. The new ISE Design Suite 11.1 sets the industry standard for delivering FPGA design tools and intellectual property (IP) to embedded, DSP and logic designers.

"This is a series of announcements that Xilinx is working on. We are releasing the IC Design Suite 11, for now," he added. "Target design platform is a focus for Xilinx right now. We are working with Vita Consortium -- Vita 57." This is the FPGA I/O Mezzanine Card (FMC) standard, which aims to bring modularity to FPGA designs.

Meeting diverse requirements of FPGA design teams
Tailored for domain-specific methodologies, Xilinx's ISE Design Suite 11 has four configurations aligned to user-specific methodologies -- logic (VHDL/Verilog), embedded, DSP, or system design. It has the FLEXnet license management to better meet the design teams' needs.

It also delivers methodologies specific to each designer's needs. Each configuration delivers domain specific tools and IP, and accelerates designer productivity. The Suite narrows the focus to design differentiation, and not the design flow. Besides, it leverages the robust ecosystem of third party partners.

"The goal is to build a strong foundation with the targeted deisgn platform. Each edition of the Design Suite includes all of the tools/IPs needed to create, validate and implement," Feist added.

"We are introducing four different versions -- one for the logic designers; one for the embedded designers, one for the DSP desgners; and for system integrators," he said.

"The overall strategy is to increase designers' productivity. To drive this to the next level, we look at the development phase of our customers. FPGA design teams face different requirements. We need to provide methodologies that are working for each one of the individuals," Feist added. The goal being -- for each new tool, provide the IP and help validate the design.

More turns/day for designers
Overall, there are improvements for all designers, leading to more turns per day. There are improvements in the place-and-route algorithms. It delivers an average of 2X faster runtimes. The second generation SmartGuide provides an additional 2X improvement. The Design Suite also supports multi-threaded place and route.

Other improvements include: XST delivers an average of 2X faster synthesis runtime; improved support for SecureIP provides faster simulation PowerPC, MGT, and PCI hard IP blocks -- supports Mentor, Cadence and Synopsys simulators; 10 percent better dynamic power via place and route optimizations; and reduction of memory requirements by an average 28 of percent.

Feist clarified: "The 2X improvement in implementation is compared to 10.1, our previous release. The 2X improvement related to SmarGuide is relative to a full re-implementation. Also, the 10 percent better dynamic power via place-and-route optimizations is against the previous release."

The Xilinx ISE Design Suite has been positioned as a key enabler for targeted design platforms. It delivers optimized tool flows for each member of the design team. Thereby, it aims to boosts user productivity, improve quality of results, accelerate time to production, and enable designers to focus on differentiation.

Who would be the main users -- power or mainstream? Feist said: "This will be useful for power users as well. Even the pushbutton users will still need to do pin layout. We have tried to make this very intuitive. You can look at the different levels."

INSIDE Contactless @ Cards Asia 2009

AIX-EN-PROVENCE, FRANCE: INSIDE Contactless, a leading provider of advanced, open-standard contactless chip technologies, participated in the upcoming Cards Asia 2009 conference and exhibition. held from April 21st- 24th in Singapore.

They showcaseed the latest technology products comprising their range of NFCs and contactless payments. In addition, they presented on the future of multi-application contactless cards during the conference. INSIDE’s regular participation in Cards Asia 2009 demonstrates the company’s continuing commitment to the Asia Pacific region, and provides the company with the opportunity to continue building relationships with new and existing customers and partners as the market for mobile phone, banking and security applications evolves.

“As contactless payment cards have become well established in Asian bank card markets, the stage is now set for the next wave of converged applications, and new multi-application card products can provide users with greater differentiation and top-of-wallet ‘stickiness’ by allowing for a more personalized and valuable point of acceptance experience, said Goh Say Yeow, Asia president for INSIDE Contactless. “Converged payment, retail loyalty, transit fare collection, access and identification applications provide card users with the ability to precisely tailor the customer experience to meet their marketing objectives.”

INSIDE’s third-generation MicroRead chip, which was launched on February 6, 2008, provides the broadest range of Near Field Communication (NFC) options that enables numerous new contactless applications. Already in use by the major handset makers, the MicroRead suite combines third-generation silicon, a full set of interfaces, NFC software libraries and APIs, a field-proven reference design and robust standards support into a turnkey contactless reader solution.

The MicroPass intelligent payment platform is designed to power open standard contactless and dual-interface bank card payments along with other value-added applications in all global regions. Based upon a RISC architecture and optimized to the demanding requirements of contactless transactions, each of the MicroPass family of products is designed specifically to meet the demands of user organizations in the bank card payments, transit, ID and access control markets.

TI unites speed, efficiency with industry’s fastest dual, 14-bit ADC

BANGALORE, INDIA: Texas Instruments Inc. (TI) recently introduced a dual, 14-bit analog-to-digital converter (ADC) at 250 MSPS (mega samples per second) to deliver a premier combination of wide signal bandwidth, high dynamic performance and low power consumption.

The ADS62P49 achieves 73-dBFS signal-to-noise ratio (SNR) and 85-dBc spurious-free dynamic range (SFDR) at an input frequency of 60 MHz. With the industry’s fastest sample rate, the ADS62P49 provides increased signal bandwidth without compromising range and sensitivity in communications and defense imaging systems or accuracy in wide-band test and measurement equipment.

Apoorva Awasthy, Business Development Manager, Analog, Texas Instruments India said: "TI’s ADS62P49 device is well-suited for wireless communications, radar applications, and high-speed digitizers. This device is designed to solve customers’ challenges like the need for increased signal bandwidth and reduced thermal footprint in wireless base stations."

"Communications, defense and test design engineers are constantly challenged to create signal and data acquisition receivers with increasingly wide signal bandwidths that do not compromise overall system performance,” said Art George, senior vice president of TI’s High-Performance Analog business unit. “TI addresses these challenges with the ADS62P49 which delivers high-performance, compact, power-efficient designs and enables rapid deployment of 3G and 4G systems, software defined radios and spectrum analyzers."

Key features and benefits of ADS62P49
* Fastest dual, 14-bit ADC at 250 MSPS enables multi-channel, wide-bandwidth sampling without sacrificing dynamic performance, for enhanced accuracy in portable test equipment.
* Low power of 625 mW per channel reduces thermal footprint for increased system efficiency in high-density, multi-antenna base station receivers and software defined radios.
* Programmable gain and other user-selectable settings maximize design flexibility. Internal gain up to 6 dB in 1-dB steps allows customers to optimize SNR, SFDR and input swing based on the unique need of their applications. Designers can maximize SNR to enhance linearization effectiveness in digital pre-distortion (DPD) solutions, while SFDR can be increased and input drive reduced to improve small-signal analysis in defense and radio receiver applications.
* Complete signal chain with comprehensive evaluation tools suite speeds time to market. Complementary products include: DACs (DAC5682Z, DAC5688), amplifiers (THS4509), RF components (TRF3703, TRF3761), DPD transmit processors (GC5325), clock distribution circuits (CDCE72010) and digital signal processors (TMS320C674x).
* First in a series of four 12- and 14-bit dual channel ADCs with sample rates of 210 and 250 MSPS (ADS62P28, ADS62P29, ADS62P48). Pin-compatible to dual-channel ADS6000 family for easy upgrades in speed and resolution.

Big changes in probe card supplier shares due to 2008 IC market turmoil

SANTA CLARA, USA: VLSI Research Inc. has reported that the global economic downturn has had a seriously detrimental impact on the market for probe cards used for testing IC wafers during 2008, and that 2009 sales will be down even further.

Probe card revenues declined by 26.9 percent in 2008 compared to a 4.2 percent decline in IC sales. This weakness was driven largely by sharp cutbacks within the Memory sector. In 2009, sales of probe cards, including spares and service, are forecast to decline a further 24.5 percent to only US$0.77B, down from US$1.0B in 2008. This compares to nearly US$1.4B in revenues in 2007.

The 2008 probe card supplier ranking saw a number of changes, as those that rely heavily on the Memory market suffered declines. FormFactor (USA), Micronics Japan Co. (MJC - Japan), and JEM (Japan) maintained their lead at the top of the supplier ranking, while SV Probe (USA) climbed into the 4th position, up from 5th in 2007. Technoprobe (Italy) jumped to 5th place from 7th last year.

Over the coming five years probe card revenues are not expected to recover to the levels previously forecast, reflecting the lower level of IC production over this period. Additionally, the very high historic growth rate in demand for memory test probe cards is expected to remain subdued. VLSI Research projects that the probe card market will reach $1.5B by 2013.

Source: VLSI Research

Big changes in probe card supplier shares due to 2008 IC market turmoil

SANTA CLARA, USA: VLSI Research Inc. has reported that the global economic downturn has had a seriously detrimental impact on the market for probe cards used for testing IC wafers during 2008, and that 2009 sales will be down even further.

Probe card revenues declined by 26.9 percent in 2008 compared to a 4.2 percent decline in IC sales. This weakness was driven largely by sharp cutbacks within the Memory sector. In 2009, sales of probe cards, including spares and service, are forecast to decline a further 24.5 percent to only US$0.77B, down from US$1.0B in 2008. This compares to nearly US$1.4B in revenues in 2007.

The 2008 probe card supplier ranking saw a number of changes, as those that rely heavily on the Memory market suffered declines. FormFactor (USA), Micronics Japan Co. (MJC - Japan), and JEM (Japan) maintained their lead at the top of the supplier ranking, while SV Probe (USA) climbed into the 4th position, up from 5th in 2007. Technoprobe (Italy) jumped to 5th place from 7th last year.

Over the coming five years probe card revenues are not expected to recover to the levels previously forecast, reflecting the lower level of IC production over this period. Additionally, the very high historic growth rate in demand for memory test probe cards is expected to remain subdued. VLSI Research projects that the probe card market will reach $1.5B by 2013.

Source: VLSI Research

Broadcom's combo chip and software achieve Bluetooth qualification

IRVINE, USA: Broadcom Corp. recently announced that its leading Bluetooth combo chip technology and associated BTE software have been qualified as compliant with the ratified Bluetooth v3.0 + HS (high speed) specification.

The new standard significantly expands the capabilities of Bluetooth wireless technology in multimedia smartphones, netbooks and other devices by enabling the transmission of large files via Bluetooth profiles at speeds up to 24 Megabits per second (Mbps), or a 10 times increase in speed over the previous Bluetooth v2.1 + EDR (enhanced data rate) standard. With the company's InConcert(R) BCM4325 Bluetooth + Wi-Fi(R) + FM combo chip solution (the first product in the industry to achieve qualification) and Bluetooth software, Broadcom is uniquely positioned to support the latest Bluetooth specification with proven single-chip solutions.

While competing implementations require multiple discrete components that raise cost and power requirements, Broadcom is able to provide a single-chip solution that includes both a qualified Bluetooth v3.0 BR/EDR (basic rate) controller and Wi-Fi CERTIFIED(TM) media access controller (MAC)/physical layer (PHY) device.

When combined with Broadcom's v3.0 + HS qualified host software solution, these products enable OEMs to add the convenience of high speed Bluetooth data transfer while reducing board space, power consumption and overall system cost in next generation Bluetooth-enabled devices.

Broadcom's high speed Bluetooth technology was recently demonstrated at the 2009 International Consumer Electronics Show (CES) in Las Vegas. The Bluetooth Special Interest Group (SIG) announced the formal adoption of its next generation Bluetooth v3.0 + HS wireless connectivity technology on April 21, 2009, at the SIG Annual All-Hands meeting in Tokyo.

In addition to enabling Bluetooth profiles to utilize high speed 802.11 data rates, Broadcom silicon and software solutions will further enable mobile devices to leverage the low power connection management features provided by Bluetooth wireless technology, increasing the valuable synergy between these already popular technologies. Broadcom is working together with other companies and various standards groups to standardize these additional capabilities.

"The new Bluetooth v3.0 + HS specification is a welcome step in the continuing evolution of Bluetooth technology, adding industry approved techniques for leveraging the high data rates of Wi-Fi with the ease of use, low-power and utility that Bluetooth wireless technology is recognized for," said Craig Ochikubo, Vice President & General Manager of Broadcom's Wireless Personal Area Networking line of business. "The new specification makes our combo chip products even more attractive to OEMs who seek to provide their customers with the most complete wireless user experience available."

The Bluetooth products now qualified as compliant with the v3.0 + HS specification include the Broadcom(R) BCM4325 802.11b/g combo chip solution that combines Bluetooth, Wi-Fi and FM radio functionality on a single-chip design.

Broadcom's popular BTE software, the core Bluetooth software stack on which all Broadcom Bluetooth software is based (including BTW, BTW Mobile and embedded software for cellular handsets and other devices) has also been qualified as compliant with the new v3.0 + HS standard. The BCM4325 is also Wi-Fi CERTIFIED in a number of customer products.

In addition to enabling 10 times the transmission speed over previous Bluetooth specifications, v3.0 + HS provides other useful innovations that Broadcom combo chips and BTE software can utilize as well. This includes expanded capabilities for remote control applications featuring Unicast Connectionless Data (UCD) functionality that enables low power operation and reduced latency, making Bluetooth's radio technology ideally suited for consumer electronics remote control applications.

The Bluetooth v3.0 + HS specification also enhances the already powerful security capabilities of Bluetooth technology by including the new Read Encryption Key Size feature that allows Bluetooth applications to ensure an appropriate level of communications security.

Broadcom's Bluetooth BR/EDR controller solutions, including the BCM4325, further provide support for the Enhanced Power Control feature introduced in the Bluetooth v3.0 + HS specification. This feature provides improved control over transmit power levels on Bluetooth BR/EDR links, improving the robustness of communications and providing better optimized power consumption.

"The Bluetooth Special Interest Group is gratified that Broadcom has played an active role in helping drive the evolution of Bluetooth technology through its contributions to the standard and timely implementation of these new features," said Michael Foley, Ph.D., executive director of the Bluetooth SIG. "With strength in multiple wireless technologies, the company is helping make the vision of high speed Bluetooth technology a reality."

LogicVision, Toppan and Syswave ally for design, DFT and test services in Japan

TOKYO, JAPAN: LogicVision Inc. , a leading worldwide provider of semiconductor built-in-self-test (BIST) and diagnostic solutions, has signed of a three-way agreement with Toppan Ltd. and Syswave Corp. for turnkey design and test services.

As designs continue to grow and become more complex, there is significant benefit to providing customers with a near turn-key solution. This team -- LogicVision, Toppan, and Syswave -- will integrate as well as provide back-end debug and manufacturing test support of advanced BIST solutions for complex designs.

In this three-way arrangement, Toppan will integrate and verify LogicVision's BIST IP into customer designs while Syswave will provide support in using these BIST capabilities during debug and manufacturing test. This business collaboration will provide added value to each of the three companies' mutual customers by providing a one-stop integrated strategy for device development and test.

"One of the greatest challenges facing Japan semiconductor manufacturers today is achieving acceptable product quality levels while minimizing escalating test costs," said Shin Kimura, VP and managing Director of LogicVision, Japan. "This is especially true as the industry moves to 65nm and 45nm process geometries and beyond. With this relationship, we will be able to help our customers achieve the desired quality at an affordable price."

"I am sure this collaboration will attract many customers, especially those with advanced SOCs," said Isao Suzuki, General Manager of Toppan Printing Co., Ltd. "It is a common headache for everybody developing a complicated LSI design to have a complete testing solution, without anxiety, as technology migrates into deep submicron and densities become huge. With this collaboration, our customers will be very happy with all of the solutions we provide that meet every possible need for design implementation and, of course, testing. As one of the largest Design and Turn Key service providers in Japan, we, Toppan, can provide extensive service from the early stages of design all the way to mass production. I can assure that our expertise regarding BIST IP will satisfy any customer."

"This alliance is incredibly exciting to me. It will resolve existing testing problems dramatically," said Tetsuo Onikura, President & CEO of Syswave. "This relationship will contribute to not only Japanese semiconductor manufacturers but also their customers. Moving forward to 45nm and beyond, we expect that testing efficiency will decrease resulting in cost increases. LogicVision's outstanding solutions will resolve these issues. Syswave's test engineering capability will empower these solutions within the Japanese semiconductor testing market."

Infineon, Nokia to collaborate in EDGE

NEUBIBERG, GERMANY: Infineon Technologies AG announced a collaboration with Nokia, the world’s number one manufacturer of mobile devices and a leader in the converging Internet and communications industries. The Infineon solution will allow Nokia to offer affordable mobile devices and enables easy access to the Internet.

Infineon will supply its XMM 2130 EDGE platform to Nokia, enabling the mobile device manufacturer to bring a new breed of internet capable devices to the market.

“We are grateful to expand our successful collaboration with Nokia beyond our two ULC products, the XMM 1010 and the XMM 1100, now to our EDGE products,” states Peter Bauer, CEO of Infineon Technologies AG. “Our solution offers affordable access to the fast growing internet market on mobile devices. We consider this solution as best in class in terms of performance, integration, scalability and cost position.”

Infineon offers a mobile phone platform featuring an EDGE Modem, audio player, stereo RDS FM radio receiver, stereo headset, USB interface as well as interfaces for memory cards. The XMM 2130 is manufactured in a 65nm process.

Sunday, April 26, 2009

More mature PV industry likely post solar downturn: iSuppli

Recently, iSuppli came out with a study on whether the current solar downturn will lead to a more mature photovoltaic industry! According to iSuppli, severe downturn in the global PV market in 2009 could actually have a more positive outcome for the global solar industry, yielding a more mature and orderly supply chain when growth returns.

Worldwide installations of PV systems will decline to 3.5 Gigawatts (GW) in 2009, down 32 percent from 5.2GW in 2008. With the average price per solar watt declining by 12 percent in 2009, global revenue generated by PV system installations will plunge by 40.2 percent to $18.2 billion, down from $30.5 billion in 2008.

"For years, the PV industry enjoyed vigorous double-digit annual growth in the 40 percent range, spurring a wild-west mentality among market participants," said Dr. Henning Wicht, senior director and principal analyst for iSuppli.

"An ever-rising flood of market participants attempted to capitalize on this growth, all hoping to claim a 10 percent share of market revenue by throwing more production capacity into the market. This overproduction situation, along with a decline in demand, will lead to the sharp, unprecedented fall in PV industry revenue in 2009," he added.

What about new entrants?
I quizzed Dr. Wicht how this downturn would lead to a more mature PV industry and what about the new entrants?

Dr. Wicht said: "We expect that the solar industry will invest more softly. The years 2007/2008 were special. Each of the hundreds of suppliers were ready to invest to reach 10 percent market share. This is not likely to repeat." Interesting! "Also, the new entrants will invest more modestly and closely linked to fixed customer orders," he added.

Role of FIs in solar
Are financial institutions paying that much importance to solar, especially in places such as India? This is an issue that was also raised and discussed at the recently held SEMI India solar/PV paper launch.

According to Dr. Wicht, the financial investors are definitely looking into solar, mainly in Europe and US. "PV in India is still at the very beginning. From my experience, there is not yet much attention of financial investors for PV in India," he noted.

Off-grid or grid connected apps?
Turning the discussion to off-grid vs. grid connected applications, I sought Dr. Wicht's advice on the route that should be followed. Again, this topic was discussed during the SEMI India meet early this month. Hence, the interest for India in this field is significant!

Dr. Wicht highlighted: "Installations for the off-grid remains a small portion in terms of the sold modules (MW), about 5 percent. The off-grid system selling might be a good way to start in places such as India. For cell and module production, on-grid is where the volumes are needed." Hope the Indian solar photovoltaics industry takes note of this valuable advice -- and it holds good for other regions as well.

I also asked him regarding a good low carbon growth strategy for developing countries. Dr. Wicht said that depending on the place, it could be a combination of wind, solar and biomass.

Compensating for Spanish whiplash!
According to iSuppli's study, the single event most responsible for the PV market slowdown in 2009 was a sharp decline in expected PV installations in Spain. Also, beyond Spain, the PV market is being adversely impacted by the credit crunch.

Therefore, why won't attractive investment conditions in other some countries compensate for the Spanish whiplash?

Dr. Wicht said: "The investigated countries start from a low level of installations and show long, administrative procedures, limits of feed-in tarifs and reduced capital access. They simply cannot compensate the 2.6GW of Spain in 2008."

Finally, what is likely to happen after the shakeout or fall in the coming years? He added: "System demand will grow stronger from H2-2010, absorbing the inventory, which has been built up in 2009 and 2010. From 2011, demand for modules will rise. It might pick up quickly. Then, companies, which are able to supply on short notice/(flexibility) can gain market share."

Let me see if I can convince Dr. Wicht to visit India and share his insights with the Indian solar/PV industry. Last, but not the least, thanks Jon!

iSuppli to host automotive briefing in Germany

EL SEGUNDO, USA: Set against the backdrop of a macroeconomic recession and steeply declining sales of passenger vehicles in 2009, the automotive industry is in dire straits.

The decline in 2008/2009 has dramatic implications for the supply chain, and despite expectations for an improving situation starting in 2010, conditions in the global automotive sector will remain very challenging during the next five years.

To help the industry sort out this volatile situation, iSuppli is hosting an event: The Road Ahead – Automotive Infotainment and Telematics Trends on May 19 in Frankfurt, Germany.

The event will feature iSuppli analysts and executives examining various short-term and long-term recovery scenarios and their implications for technology development and system design.

Issues to be discussed at the event include:
* What role will technology play in the anticipated automotive recovery?
* Will cars see more or less technology content?
* How will technology be leveraged by car makers and their suppliers to satisfy mandates, serve customers and lift the industry out of the sales ditch?

iSuppli analysts presenting at the event will include:
* Phil Magney, vice president, automotive research.
* Dr. Egil Juliussen, director and research fellow, automotive research.
* Richard Dixon, senior analyst, Microelectromechanical Systems (MEMS).
* Jérémie Bouchaud, director and principal analyst, MEMS.
* Richard Robinson, principal analyst, automotive.

The sessions will cover the following topics:
· Infotainment Systems and Semiconductor Trends – Where the Rubber Meets the Road.
· Road Warrior – Human Machine Interface (HMI).
· Location-Based Services (LBS) – The Road Less Travelled?
· Road Work – Sensors as an Enabling Technology.
· Advanced Driver Assist and Safety Systems (ADAS) – Watching the Road.
· The 2020 Digital Car.

iSuppli’s briefing will be held on May 19 2009 in Frankfurt, Germany at the Sheraton Frankfurt Hotel & Towers Conference Center. Registration is priced at € 199 per person or € 499 per company, with up to 10 attendees.