Tuesday, September 2, 2014

NA semiconductor equipment industry posts July 2014 book-to-bill ratio of 1.07

SAN JOSE, USA: North America-based manufacturers of semiconductor equipment posted $1.41 billion in orders worldwide in July 2014 (three-month average basis) and a book-to-bill ratio of 1.07, according to the July EMDS Book-to-Bill Report published today by SEMI.  

A book-to-bill of 1.07 means that $107 worth of orders were received for every $100 of product billed for the month.

The three-month average of worldwide bookings in July 2014 was $1.41 billion. The bookings figure is 2.8  percent lower than the final June 2014 level of $1.46 billion, and is 17.1 percent higher than the July 2013 order level of $1.21 billion.

The three-month average of worldwide billings in July 2014 was $1.32 billion. The billings figure is 0.7 percent lower than the final June 2014 level of $1.33 billion, and is 9.4 percent higher than the July 2013 billings level of $1.20 billion.

“Order activity for semiconductor equipment has held at a steady level so far for 2014,” said Denny McGuirk, president and CEO of SEMI. “This trend, along with improvements in semiconductor device sales and unit shipments, is consistent with our outlook for strong equipment sales growth this year.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of US dollars.

Momentum builds for next gen of ARM processors

CAMBRIDGE, UK: ARM is celebrating the signing of the 50th licensing agreement for its ARMv8-A technology, which includes support for 64-bit computing.

A total of 27 companies have signed agreements for the company’s ARMv8-A technology as industry momentum builds for greater compute capability across a wide range of applications. The ARMv8-A silicon partners include:

* All of the top 10 companies who sell application processors for smartphones.
* 9 of the top 10 application processor companies for tablets.
* 4 of the top 5 companies that provide chips for consumer electronics (including DTV and STB).
* 4 of the top 5 companies that provide chips for enterprise networking  and servers.
* 8 silicon vendors from Greater China.

The 50th licensing agreement demonstrates the continuing strength in demand for the company’s 64-bit-capable ARM Cortex®-A50 processor family and ARMv8 architecture licenses which will serve future digital devices and infrastructure deployments coping with more complex applications within strict power budgets.

“ARMv8-A technology brings multiple benefits, including 64-bit capability alongside improved efficiency of existing 32-bit applications,” said Noel Hurley, general manager, processor division, ARM. “Tablets and smartphones are quickly replacing PCs for many tasks and the ARMv8-A Cortex-A57 and Cortex-A53-based chips developed by our Partners support this transition with important enhancements in performance and efficiency. These ARMv8-A platforms are also fully backward compatible and will efficiently execute over a million 32-bit apps and extensive software assets already in use.”

The company began developing its ARMv8-A architecture design in 2007 as it foresaw the need for more powerful and energy efficient processors. First announced in November 2011, the cumulative 50 licenses are now spread across ARMv8-A architecture and ARM Cortex-A57 and Cortex-A53 processors. This is ensuring a vibrant and diverse roadmap for a new range of mobile and connected devices and infrastructure equipment.

ARM has signed more than 1100 license agreements for its processor designs and is working with around 350 international firms producing silicon chips for a range of devices from sensors to servers. The company announced recently that the 50 billionth chip containing an ARM processor had been shipped by partners and the momentum in 64-bit ARM architecture is a key component in the journey toward the next 100 billion chips.

Monday, September 1, 2014

Major IDMs increasingly rely on foundries for logic production

USA: Arguably, no other trend has so quickly swept through the IC industry and stirred up so much debate about the future of chip making as the spread of fab-lite (or asset-lite) business model, which is being embraced by a growing number of major IDMs worldwide.

Most recently, large Japanese IC makers—namely Toshiba, Renesas, Sony, and Fujitsu—joined the fab-/asset-lite movement after several years in which US and European IDMs started reining in capital expenditures on expensive new 300mm wafer fabs and increased their use of third-party foundries. Nearly all IDMs today (excluding giant Intel and the memory makers) are now aiming to keep capital spending at or below 10 percent of annual sales compared to the IC industry’s average of 20 percent in the last decade.

The advent of fab-/asset-lite strategies has led to a rash of predictions that many IDMs are on their way to becoming fabless because they have stopped investing in leading-edge wafer plants and development of next-generation digital CMOS technologies.

Indeed, some IDMs have used fab-/asset-lite strategies as steppingstones to going fabless—such as LSI and Integrated Device Technology (IDT)—but many other IC manufacturers insist “lite” business models are sustainable over the long term since they’ve narrowed their strategic product focus to categories that do not require 300mm wafer processes or expensive fabs.

According to IC Insights’ recently released Mid-Year Update to the 2014 McClean Report, the number of IDMs producing leading-edge logic devices has declined from 22 at the 130nm technology node to only two at the 22/20nm technology node. The four major pure-play foundries—TSMC, GlobalFoundries, UMC, and SMIC—will continue to be the leading benefactors of new business that transitions away from the IDMs.

With an increasing number of large semiconductor companies (e.g., ST, NXP, Infineon, Renesas, Sony, Fujitsu, Toshiba, etc.) stating their intentions to rely more on outside foundries for their IC production, it is easy to see why IC Insights forecasts foundries will impact an increasing amount of worldwide IC sales over the next several years.

Friday, August 29, 2014

Mentor Graphics announces membership in the European Centre for Power Electronics Consortium

WILSONVILLE, USA: Mentor Graphics Corp. announced its new membership in the German-based European Centre for Power Electronics (ECPE), a European consortium focused on the research, education, technology transfer, and promotion of power electronics globally.

Mentor Graphics is the only electronic design automation (EDA) company represented in this industry-driven research network, comprised of over 150 organizations (75 companies and 76 institutions).

Mentor Graphics was selected as an ECPE member due to its unique expertise in both thermal simulation and test solutions including electronic components power cycling for reliability prediction, as evidenced by its recently announced MicReD® Industrial Power Tester 1500A technology.

The key initiatives of the ECPE are to provide global research on power electronics systems; educate the ECPE member network and electronic engineering industry on advancements via workshops and tutorials; and serve as the “unified voice” for the European power electronics industry.

In contributing to the ECPE, Mentor Graphics will focus on its expertise in thermal simulation and test of electronic systems and power cycling technology, which will provide value to the 150+ organizations in this research network.  Member companies of the ECPE, such as ABB, Siemens, Fraunhofer, Bosch, ST Microelectronics, Valeo, Infineon and Daimler, will be able to access, share, and apply knowledge on innovative technologies such as the MicReD Power Tester system.

Dr. John Parry, electronics industry manager for Mentor Graphics Mechanical Analysis Division, has been appointed to represent Mentor Graphics within the ECPE. Parry is active in the electronics market, having served as the general chairman of SEMI-THERM 21 and currently represents Mentor Graphics on the JEDEC committee on global thermal standards for the microelectronics industry.

Coverity announces new partnership with Japan-based distributor OGIS-RI

MOUNTAIN VIEW, USA: Coverity Inc., a Synopsys company, announced a new partnership with OGIS-RI, a Japan-based distributor of IT solutions.

This partnership combines Coverity's award-winning software testing platform, which enables organizations to build quality and security testing early in the Software Development Lifecycle (SDLC), with OGIS-RI's open source license and vulnerability management tool, to further drive the adoption of software testing in Japan.

"Time-to-market pressure has dramatically increased for companies across the globe, and as a result, finding and fixing software quality and security issues at the earliest point in the development cycle is a key business driver," said Steve McDonald, VP of Worldwide Product Sales for Synopsys. "We are excited about partnering with OGIS-RI to extend our reach in the Japanese market to help every software-enabled organization create better software and deliver more value to their customers."

OGIS-RI is a pioneer of object-oriented technology in Japan. The company has provided software engineering professional services with cutting-edge technologies and expertise to various industries, including manufacturing, finance and utilities, for more than three decades.

OGIS-RI's current technology focuses are on service-oriented architecture, open source software and enterprise and cloud integration. In addition, OGIS-RI is a 100-percent subsidiary of Osaka Gas. Co. Ltd, the second-largest gas utility company in Japan, and provides full life cycle support for the IT systems of its parent company.

"OGIS-RI has come to the conclusion that Coverity is the best static code analysis tool for its solutions," said Junzo Suzuki, executive officer, member of the board, head of Services Business Division for OGIS-RI.

"Integrating our open source license and vulnerability management tool, Palamida, into Coverity will allow us to offer customers a comprehensive solution that enables shorter time-to-market and enhanced reliability in software development. We believe that this will bring to customers' development projects greater security and speed than ever before. With its expertise in business, OGIS-RI continues to strive to deliver the value of this solution to customers operating in the embedded/engineering systems area, where Coverity is thriving, as well as to those in new areas such as finance and telecommunications."

Mentor Graphics extends Nucleus RTOS

WILSONVILLE, USA: Mentor Graphics Corp. announced a new version of the Mentor Embedded Nucleus real time operating system (RTOS) targeting high-performance, next-generation applications for connected embedded devices.

The Nucleus RTOS process model is expanded to include ARM Cortex M- based cores. For the first time, software developers can use a single embedded operating system to increase system reliability through memory partitioning for the entire spectrum of ARM cores, facilitating code reuse across an entire product family comprising low-end to high-end devices.

New in this release is a multicore framework to manage inter-process communication (IPC) and processor life cycle for complex heterogeneous system-on-chip (SoC) and enhanced Nucleus RTOS graphics capabilities with Imagination and Vivante GPU support.

System developers can now use a real-time operating system that is scalable to conform to resource limitations typical of microcontroller (MCU)-based devices while still providing space partitioning to improve system reliability.

By using the memory protection unit (MPU) on ARM Cortex M- based cores, the Nucleus RTOS process model creates memory partitioning without the need to implement virtual memory, maintaining a lightweight operating environment that can be executed in devices with limited memory by “executing in place” out of flash devices. The Nucleus RTOS process model improves system reliability for devices with aggressive dependability requirements, and for devices with safety requirements such as those designed for industrial and medical devices.

Today’s complex SoC architectures combine application-class and microcontroller-class cores, driving the consolidation of heterogeneous operating environments on to a single device. To address these complexities Nucleus RTOS includes the Mentor Embedded Multicore Framework (MEMF) for asymmetric multi-processing (AMP) enablement.

Based on a clean-room implementation of the functionality in “virtIO”, “remoteproc”, and “rpmsg”, MEMF enables developers to integrate Nucleus RTOS, Linux®, and bare metal-based applications and manage the challenges associated with IPC, resource sharing, and processor control within a heterogeneous multi-OS environment. Developers can control the boot-up and shut-down of individual cores on a SoC, allowing applications to maximize compute performance or minimize power consumption based on the use case.

Worldwide semiconductor market forecasted to be $325 billion in 2014

USA: The World Semiconductor Trade Statistics (WSTS) has released its updated semiconductor market forecast. WSTS predicts that the world semiconductor market will reach $325 billion in 2014, up 6.5 percent from 2013.

All major product categories will show a high single digit growth rate, except microprocessors which will show a soft decline. The growth will be largely driven by smartphones, tablets and automotive.

The highest growth rates are shown for the Analog (9.1 percent) and Sensor (9.1 percent) category. By region, all regions, except Japan, will grow from 2013. Japan market is forecasted to decline from 2013 in US dollar basis due to JPY depreciation compared to 2013.

Solid growth for all product categories is expected to continue over the next two years, under the assumption of macro economy recovery throughout the entire forecast period. Worldwide semiconductor market is forecasted to be up 3.3 percent to $336 billion in 2015. For 2016, the market is forecasted to be $350 billion, up 4.3 percent.

By end market, automotive and communications (especially wireless) are expected to grow stronger than the total market, whereas consumer and computer are assumed to rermain almost flat.

By region, Asia-Pacific will be the fastest growing region and expected to reach $207 billion in 2016, which is almost 60 percent share of the total semiconductor market.

Full compliance with military temperature specification planned for Altera 20 nm FPGA and SoC devices

SAN JOSE, USA: Altera Corp. announced military temperature (Mil Temp) qualification plans for its newest 20 nm Arria 10 FPGAs and SoCs, which will be qualified for extreme temperature environments (-55C to 125C ambient).

In addition to the ratings, Altera can provide guidelines on speed grades, protocols, and external memory interfaces best suited to specific applications. All devices will be characterized, qualified and tested by Altera, providing reduced and reliable lead times.

“Altera is committed to supporting military customers by ensuring Mil Temp variants of our next-generation products are available,” said David Gamba, senior director of the Military, Aerospace and Government Business Unit at Altera. “Though not all defense applications operate in the extremes of the Mil Temp range, early notification of these qualification plans allows customers to make valuable platform design decisions now that allow for cost-effective variants and easier design migration later.”

Altera’s Arria 10 FPGA and SoC devices are the only FPGAs in the industry to feature integrated, hardened IEEE 754-compliant, floating-point operators, which deliver the industry’s highest GFLOPS per Watt performance compared to other hard floating point solutions on the market. The hard floating point DSP blocks featured in Arria 10 devices facilitate native floating point support, thereby reducing development time by six to 12 months.

These macros are useful for many military and aerospace applications, from real-time tactical uses to wide-view satellite survey platforms. They also enable precise designs in ground-based and airborne phased-array radar and directional antenna applications.

Arria 10 SoCs are also the industry’s only 20 nm devices with integrated ARM processors.

Synopsys DesignWare USB 3.0 IP shipped in over100 million production SoCs

MOUNTAIN VIEW, USA: Synopsys Inc. announced that its DesignWare USB 3.0 Controller and PHY IP has shipped in more than 100 million production system-on-chips (SoCs) used in mobile computing, digital home and cloud computing applications such as smartphones, tablets, set-top boxes, digital TVs, gaming systems and servers.

More than 60 companies have successfully integrated silicon-proven DesignWare USB 3.0 IP into their products' SoCs, including SoCs in the Microsoft XBOX One. This broad usage demonstrates the quality of the IP and how Synopsys enables rapid adoption of the standard. To help ensure interoperability and lower designers' integration risk, the DesignWare USB 3.0 solution has been certified by the USB-IF through USB compliance testing in plugfests and by third-party labs.

"Based on a long history of close collaboration with Synopsys, we have shipped hundreds of millions of products that incorporate Synopsys' DesignWare USB 2.0 and 3.0 IP. In the last year alone, tens of millions of units were shipped globally," said Sanghyun Lee, VP of digital IP development team, System LSI Business at Samsung Electronics. "By using Synopsys' DesignWare USB 3.0 IP, Samsung can deliver leading SoC products to our customers."

"Our SoCs for digital home, networking and WiFi applications ship in very high volumes, so we need high-quality, highly reliable USB 3.0 IP to help ensure our success," said Yee-Wei Huang, VP and spokesman at Realtek. "We chose DesignWare USB 3.0 IP because Synopsys has a track record of delivering certified IP that has undergone extensive third-party interoperability testing. Synopsys consistently delivers high-quality IP that supports advanced power-saving standards, enabling us to reduce power consumption in our wireless SoCs. Integrating DesignWare USB 3.0 IP reduced our design risk, accelerated our time-to-market and assured the high performance that our customers expect."

"Success in high-performance USB graphics solutions demands that we deliver SoCs with the most advanced technology on schedule," said John Cummins, senior VP, worldwide sales and marketing at DisplayLink. "We selected Synopsys DesignWare USB 3.0 IP because we were extremely confident that the IP would deliver the performance, power and area we needed. DisplayLink SoCs that integrate Synopsys USB 3.0 IP are now found in the world's leading manufacturers of docking stations."

Synopsys' complete USB 3.0 IP solution, including controllers, PHYs, verification IP, IP Prototyping Kits and IP Virtual Development Kits, reduces design risk and accelerates IP prototyping, software development and integration. The DesignWare USB 3.0 IP has been certified by the USB-IF standards body more than 80 times for both Synopsys and its customers, ensuring interoperability with billions of USB-enabled devices worldwide.

In addition to supporting SuperSpeed, High-Speed, Full-Speed and Low-Speed USB modes, the DesignWare USB 3.0 IP enables 5.0 Gbps SuperSpeed USB data transfer rates while lowering overall power consumption for mobile SoC designs. Synopsys DesignWare USB 3.0 PHY IP is available for more than 25 process technologies from 130-nm to 14/16-nm FinFET, supporting all leading foundries.

Renesas announces 40 nm RH850/C1x series of MCUs for HEV/EV motor control apps

SANTA CLARA, USA: Renesas Electronics Corp. announced the new RH850/C1x Series of 32-bit microcontrollers (MCUs), designed for motor control in hybrid electric vehicles (HEVs) and electric vehicles (EVs). Based on Renesas Electronics’ 40-nanometer (nm) process, the RH850/C1x Series features the RH850/C1H and RH850/C1M MCUs, which enable embedded designers to enhance efficiency, reduce system costs, and achieve higher safety levels for HEV/EV motor control systems.

"Awareness of the vehicle’s environmental footprint is increasing, and HEV/EV designers are seeking ways to deliver even better performance, which requires new and more precise motor control systems," said Amrit Vivekanand, VP of automotive, Renesas Electronics America Inc. "The Renesas RH850/C1x MCU series integrates large flash memory capacity, robust motor control peripherals, and single/dual motor control options needed to support the required fine-grained motor control and functional safety for next-generation HEVs and EVs."

The new RH850/C1x devices can be used with the RAA270000KFT RH850 Family power supply management IC (PMIC), which is currently available in sample quantities. The power management IC integrates into one device all the power supply systems required for MCU operation, two external sensor power supply tracks, and a full complement of monitoring and diagnostic functions, significantly reducing the user burden associated with power supply system design.

Concerns about global warming and regulatory efforts to reduce automotive CO2 emissions are driving demand for new technologies to achieve higher efficiencies. For instance, the Corporate Average Fuel Economy (CAFE) standards are driving OEMS to increase overall fleet miles per gallon (MPG) to 54.5 MPG for cars and light-duty trucks by model-year 2025.

As HEV/EV implementations become more mainstream, higher performance applications will require MCUs with greater processing capabilities for efficient motor control. As the HEV/EV market expands, system designers are challenged to reduce costs and increase performance. By integrating hardware peripherals, dedicated for motor control, into the MCU, designers can reduce overall system costs and meet performance requirements.

HEV/EV systems are now being designed to meet ISO 26262 functional safety standards. This system requirement is driving semiconductor products to incorporate a number of embedded features that allow system designers to meet their safety goals.

R-Car V2H device offers high-resolution image recognition for safer driver assistance systems

SANTA CLARA, USA: Renesas Electronics Corp. announced the availability of its R-Car V2H, the company's newest system-on-a-chip (SoC) implementing state-of-the-art image recognition technology to support high-resolution surround viewing in advanced driver assistance systems (ADAS).

This is the first R-Car ADAS device from Renesas and includes additional functionality for higher performance, lower power, and improved safety in traditional and emerging self-driving vehicles.

Renesas applied technology from its industry-leading R-Car SoCs for automotive infotainment equipment and added high-performance image recognition and low-power consumption technologies in the development of the R-Car V2H. The R-Car V2H enables embedded system manufacturers to deliver high-resolution surround-view monitoring systems, with multiple cameras, for advanced point-of-view switching. This includes rear-view and surround-view capabilities that expand what is seen by the system to every direction around the vehicle, aiding in driver oversight prevention.

These types of sophisticated systems demand substantially higher processing performance in order to handle the expanded range of image recognition targets and increased processing load imposed by multiple cameras with higher pixel counts. At the same time, there is demand for both functional safety, to maintain high quality and performance, and reduced power consumption. Finally, the rapidly increasing cost of software development creates a need for better development efficiency. The Renesas R-Car V2H addresses all of these requirements in a single-chip solution.

"As a premier supplier of advanced semiconductor solutions to the automotive industry, Renesas is mindful not only of the electronic system requirements of today and tomorrow's automobiles, but also the importance of safety, especially with wider adoption of self-driving vehicles," said Amrit Vivekanand, VP of automotive, Renesas Electronics America Inc.

"The R-Car V2H series delivers the imaging technologies, software tools, and high-speed networking needed to develop robust ADAS systems that contribute to smarter, safer automobiles."

Altera releases Quartus II software Arria 10 edition v14.0

SAN JOSE, USA: Altera Corp. released Quartus II software Arria 10 edition v14.0, the industry’s most advanced 20 nm FPGA and SoC design environment.

Altera’s proven Quartus II software delivers the fastest compile times and enables the highest performance for 20 nm FPGA and SoC designs in the industry. Customers can further accelerate their Arria 10 FPGA and SoC design cycles by using the broad portfolio of 20 nm-optimized IP cores included in this latest software release.

Altera’s 20 nm design tools feature the most advanced algorithms and deliver the highest quality of results in the industry. The Quartus II software Arria 10 edition v14.0 provides on average 2X faster compile times compared to the nearest competitor’s 20 nm design software.

This productivity advantage allows customers to shorten design iterations and rapidly close timing on their 20 nm design. The software also enables the highest performance 20 nm designs – providing customers more than a one-speed grade performance advantage over competitive FPGAs.

Included in the latest software release is a full complement of 20 nm-optimized IP cores to enable faster design cycles. The IP portfolio includes standard protocol and memory interfaces, DSP and SoC IP cores.

Altera also optimized its popular best-in-class IP cores for Arria 10 FPGAs and SoCs, which include 100G Ethernet, 300G Interlaken, Interlaken Look-Aside and PCI Express Gen3 IP. When implemented in Altera’s Arria 10 FPGAs and SoCs, these best-in-class IP cores deliver the highest performance in the FPGA industry.