Thursday, October 2, 2014

SEMICON Japan features “World of IoT”

TOKYO, JAPAN: SEMI has opened registration for the SEMICON Japan 2014 exposition and programs through its website at www.semiconjapan.org.

SEMICON Japan 2014, Japan’s largest exhibition for the microelectronics manufacturing supply chain, will take place at Tokyo Big Sight in the Tokyo metropolitan area on December 3-5. For the first time, SEMICON Japan will feature a show-within-a-show  “World of IoT” to showcase applications and technologies of companies enabling the IoT revolution, including Toyota Motor, Intel, IBM, Toshiba and Cisco.

“Japan is a key region for the semiconductor industry, with the largest installed fab capacity globally, according to the recent SEMI Fab Forecast report,” said Osamu Nakamura, president of SEMI Japan.

“With more than fifty 200mm production fabs for MCU, MEMS, analog and power devices, and with a strong supply chain producing over 50 percent of global semiconductor materials and approximately 35 percent of the global semiconductor equipment, Japan is at the forefront of semiconductor technology. Japan is a major platform for the promising new Internet of Things (IoT) technology, leveraging its strength that will help drive our industry’s growth over the next decade.”

While IoT technologies have begun to emerge in the market, the most exciting technologies are yet to come, but will require collaboration across the electronics supply chain to make them a reality. World of IoT will facilitate the communication across the IoT ecosystem from silicon to applications. The growth of IoT applications presents new opportunities for existing fabs, as well as materials, metrology, secondary equipment, productivity solutions, components and sub-systems, test, and packaging technologies.

SEMICON Japan 2014 will also expand its programming for visitors with four stages on the show floor — TechSTAGE North and South,TechXPOT East and West, and SEMICON Japan SuperTHEATER in the conference tower — to provide more than 100 hours of technical and business sessions.  The sessions on the stages and the theater are free for pre-registered SEMICON Japan 2014 exposition attendees.

Programs on SEMICON Japan SuperTHEATER will include:

Semiconductor Executive Forum – Toshiba and Applied Materials will present their perspectives on technology and business innovations.

IT Forum – Microsoft, Line and Google will discuss the future in terms of big data and IoT.

IoT Forum – CISCO, Sony and Intel will present their business and technology strategies for the IoT era.

2.5D/3D IC Forum – ASE, Xilinx and Toshiba will discuss the 2.5D/3D architectures.

Manufacturing Innovation Forum – Intel, IBM and NGR will discuss the innovations required for sub-10nm chip manufacturing.

Wednesday, October 1, 2014

ARM achieves 50X faster OS boot-up on Mali GPU development using Cadence Palladium XP platform with ARM Fast Models

SAN JOSE, USA: Cadence Design Systems Inc. announced that ARM utilized Cadence Palladium Hybrid technology and ARM Fast Models to achieve a 50X faster OS boot-up during the development of its ARM Mali-T760 GPU.

Compared to the previous emulation only solution, this resulted in up to 10X speed-up of overall hardware-software testing. This increased speed reduced ARM's time from OS boot-up to test from hours to minutes, improving turnaround time and system quality.

"Early hardware-software co-development is critical in the design process for advanced, highly integrated projects," said Hobson Bullman, GM, development solutions group, ARM. "By using Cadence Palladium Hybrid technology to combine ARM Mali-T760 emulation with ARM Fast Models, we reduced the OS boot-up time, allowing us to run more extensive system-level software workloads and improve product quality."

Part of the Cadence System Development Suite, the Palladium XP platform is the industry's first high-performance, special-purpose verification computing platform that unifies best-in-class simulation acceleration and emulation capabilities in a single environment. Palladium Hybrid technology was introduced in September 2013 and is currently available in production.

Low-power MCU provides superior precision and highest level of security for wellness metric measurements

SAN JOSE, USA: Demonstrating its commitment to the wearables market, Maxim Integrated Products Inc. will preview its Wellness Platform at electronica 2014.

The new Wellness Platform is a suite of design hardware and software, including the WASP/MAX32600 microcontroller unit (MCU), for wearable medical applications. Using this flexible and scalable platform, designers will be able to optimize wellness device performance and lower their R&D costs, all while meeting stringent time-to-market requirements.

Wearable medical and fitness devices empower people to live healthier lives. To enable the comfort, wearability, and effectiveness of new body-worn devices, Maxim is coordinating a company-wide initiative to develop products for wearable solutions.

The Wellness Platform provides power and battery management, digital processing, highly integrated sensors, ultra-low-power communications, and industry-leading security. With wellness applications developing quickly, Maxim will continue to expand this product portfolio.

At the heart of the Wellness Platform is MAX32600, a highly integrated ARM Cortex-M3 low-power microcontroller with high-precision analog performance. Its integrated Trust Protection Unit provides the highest level of security with onboard public key authentication, data encryption, and tamper detection. This integrated security ensures that data cannot be compromised.

Requiring minimal discretes, the onboard, highly configurable analog front-end (AFE) includes high current LED drivers and facilitates one or more wellness metric measurements, such as heart rate monitoring (HRM) and galvanic skin response (GSR). The MAX32600 is available in 192-ball, 12mm x 12mm CTBGA, 120-ball, 7mm x 7mm CTBGA, and 108-ball WLP packages.

Altium broadens ARM Cortex-M device support to its TASKING C compiler for ARM

SYDNEY, AUSTRALIA: Altium Ltd announced a new release of its TASKING compiler suite for ARM, delivering support for many additional Cortex-M based microcontrollers including STMicroelectronics, Freescale, Atmel, Texas Instruments and many others.

The enhanced version brings pin assignment functionality to the toolset, which is another step forward in helping engineers to speed up application development.

Altium supports the ARM Cortex-M development community through its TASKING VX-toolset for ARM, consisting of an Eclipse based IDE, C and C++ compiler, multi-core ready linker, simulator, in-circuit debugger, and TASKING’s award winning Software Platform, which enables the developer to complete the application in a fast and cost-efficient way with RTOS and a wide range of middleware components.

Release v5.1 of the toolset adds support for many new microcontroller variants, such as the full Kinetis range from Freescale, the Tiva C series from Texas Instruments and the Cortex-M based variants from Atmel’s SMART series. Also, the support for existing vendors’ devices has been extended, such as the STMicroelectronics STM32 L0, Spansion’s FM0 and FM4, and Silicon Labs EFM32.

The broadened device toolset support for the industry’s most popular Cortex-M microcontrollers enables developers to easily change semiconductor manufacturer and switch controller type, not being locked-in by vendor specific development tools..

Currently, many microcontrollers are equipped with a large number of on-chip peripheral modules, but the limited number of pins on the chip usually does not allow all modules to be used simultaneously. TASKING’s new Pin Mapper functionality removes the developer’s complex challenge of configuring the chip’s hardware registers that are used for assigning the peripheral module signals to the physical pins.

The Pin Mapper provides a visual representation of the pin layout within the toolset IDE, through which the developer can configure and review properties of the pins, like its Power Domain, Reset State and Pad Status. The Pin Mapper also visually reports errors or warnings for possible connection conflicts, saving the developer from the tedious task of maintaining an overview of the pin assignments in Excel tables.

The visually oriented Pin Mapper is a natural extension to the toolset’s award winning Software Platform technology, and both are seamlessly integrated into the Eclipse based IDE. The TASKING Software Platform contains a wide collection of frequently used middleware components, such as TCP/IP, USB, CAN, web server, graphical user-interface, and an RTOS.

At the cost of a traditional development toolset the developer gets everything to build an application much faster than is possible with other compiler suites and additional third party middleware \components.

Express Logic develops X-Ware Platform to fast-track ARM-based IoT development

ARM TechCon 2014, SANTA CLARA, USA: Express Logic Inc. has launched X-Ware Platform, target-specific, integrated development software that delivers all X-Ware components (ThreadX, NetX, USBX, FileX, GUIX, and TraceX) pre-ported and fully integrated for use on specific development boards.

Recognizing ARM’s market leadership in the IoT space, Express Logic has tailored its initial X-Ware Platform offerings to the ARM developer community. By integrating its high-quality, widely respected ThreadX RTOS and middleware components for use on specific targets, Express Logic’s X-Ware Platform simplifies and accelerates IoT development for products aimed at markets such as home automation, smart metering, industrial control, medical devices, and more.
IoT-targeted products typically require an RTOS, network connectivity, graphics displays, a file system, and sometimes USB or other middleware components. Express Logic’s X-Ware Platform delivers all the software needed by these products in a fully integrated, ready-to-use form.

Much more than just an RTOS kernel, X-Ware Platform also features IPv4/IPv6 TCP/IP, USB host/device, GUI, and file system software libraries, including device drivers, readily accessible from applications via a simple, intuitive API. Customers simply choose the X-Ware Platform combination of RTOS and middleware most suited for their particular application.

Synopsys' Galaxy Design platform delivers over 30 percent leakage power reduction for Fujitsu's ARM-powered multi-core

MOUNTAIN VIEW, USA: Synopsys Inc. announced that Fujitsu Semiconductor Ltd achieved over 30 percent reduction in leakage power consumption while maintaining industry-leading performance for its MB86S70 high performance application processor for imaging.

Fujitsu Semiconductor's success in attaining the power-performance goal was enabled by the unique physical guidance flow and leakage-power recovery technologies built into Synopsys' Design Compiler Graphical tool, IC Compiler place and route and PrimeTime® signoff tool.

The 28-nanometer, 60 million-gate design uses four ARM Mali-T624 GPUs, two ARM Cortex-A15 CPUs and two Cortex-A7 CPUs in a big.LITTLE processing configuration. Fujitsu Semiconductor adopted the big.LITTLE approach to allow the combination of the Cortex-A15 and Cortex-A7 CPUs to deliver the best dynamic range of performance while maintaining the best for power-efficiency throughout.

"We set out with a very aggressive power-performance goal for this design," said Tom Miyake, corporate VP and executive VP of System LSI Company at Fujitsu Semiconductor. "We are pleased that we achieved the goals by the combination of our low power methodology and taking advantage of power-saving techniques and seamless UPF support in the Galaxy Design Platform."

"Fujitsu Semiconductor has achieved an impressive implementation for image processing using a big.LITTLE processor configuration to achieve both performance and efficiency in the same device," said Noel Hurley, GM, CPU group, ARM. "Combining the inherent energy efficiency of ARM Cortex processors and ARM Mali GPUs with the advanced implementation tools, flow, and power-aware design from Synopsys delivers the power efficiency and leakage reduction that pioneering SoCs need."

Fujitsu Semiconductor deployed a UPF-based power intent methodology to enable advanced low power management techniques such as multiple voltage operation and selective shutdown of design blocks. The silicon-proven hierarchical design flow supported by the Galaxy Design Platform allowed the engineers to implement the large, multi-core design, efficiently.

"The specifications for Fujitsu Semiconductor's MB86S70 series are very demanding in terms of area, power, and performance," said Antun Domic, executive VP and GM of the Design Group at Synopsys. "We collaborated with Fujitsu Semiconductor to ensure the smooth deployment of the Galaxy Design Platform and utilization of its innovative techniques to exceed Fujitsu Semiconductor's stringent goals."

Altera and ARM expand strategic partnership for SoC development tools

ARM TechCon, SAN JOSE, USA: Altera Corp. and ARM announced a long-term agreement to expand their strategic partnership for best-in-class embedded software development tools for SoC FPGAs.

In 2012, Altera and ARM announced the creation of the ARM® Development Studio 5 (DS-5) Altera Edition, which pioneered the invention of FPGA-Adaptive Debugging for SoC FPGAs. Through the expanded agreement announced today, the ARM DS-5 Altera Edition toolkit is being enlarged to include the following additional tools:

* ARM Compiler 5 and ARM Compiler 6, providing the only build tool chains specifically designed to optimize software for the Cortex®-A9 and Cortex-A53 processors in Altera’s SoC portfolio.

* Debug support for ARM Cortex-A53 quad-core processor in Stratix® 10 SoC, including FPGA-Adaptive Debug capabilities for removing the debug barrier between the multi-core subsystem and FPGA fabric.

* The companies also agreed to a long-term OEM agreement for DS-5 Altera Edition to provide support for all future ARM-based Altera SoC devices, ensuring a consistent, industry-leading software development platform across Altera’s portfolio of SoC FPGAs.

“DS-5, in combination with ARM processors and ARM CoreSight™ debug technology, delivers advanced solutions for software development on SoC FPGAs,” said Hobson Bullman, GM, Development Solutions Group, ARM. “This agreement with Altera enables their customers to access the newest tools, minimizing their development cost, risk and time-to-market for future ARM-based devices.”

Chris Balough, senior director, SoC Product Marketing, Altera said, “Altera customers have responded overwhelmingly to the critical productivity advantage we introduced with DS-5 Altera Edition and FPGA-Adaptive Debug support, and we have shipped thousands of licenses. Our extended OEM agreement with ARM enables us to provide an even richer toolkit while maintaining the same low price. Developing with SoC FPGAs has just become even more compelling for our customers.”

Renesas Electronics Singapore appoints Shigechika Motoyama as MD

SINGAPORE: Renesas Electronics Singapore, a wholly-owned subsidiary of Renesas Electronics Corp. and a leading global technology innovator of advanced semiconductor solutions, announced the appointment of Shigechika Motoyama as the MD, succeeding Hideyuki (Jake) Shimada who has been transferred to Japan to take over a new role at Hitachi Ltd.

Shigechika (Shige) Motoyama joined Renesas Electronics (the former NEC Electronics Corp.) in 1988. Over the past 26 years, he had been responsible for the sales and marketing of key strategic Japanese customers’ accounts. In 2002, Shige was posted to the United Kingdom where he continued his forte in sales and marketing, supporting the Japanese OEM accounts in European countries.

Shige returned to Japan, after seven years in 2009 to take up the position of senior sales manager responsible for Japanese customers. In this new role, Shige will oversee the operation of Renesas’ sales and marketing activities in South East Asia, India and Oceania.

Explosive growth in next-gen power semiconductors expected

USA: Traditional silicon-based power semiconductors are reaching their theoretical limitations.

Fortunately, because of their superior material properties, wide-bandgap power semiconductor devices (SiC [silicon carbide] and GaN [gallium nitride]) can offer performances orders-of-magnitude better than silicon devices.

As a result, they are widely expected to be the next generation power devices, according to a new report, Next-Generation Power Semiconductors: Markets Materials, Technologies, from The Information Network.

The commercial battle for next-generation power semiconductors is evolving. As a result, many semiconductor manufacturers are attempting to enter the market. Already it’s a $150 million market, although small compared to the $14 billion silicon-based power semiconductor market.

We see insulated-gate bipolar transistor (IGBT) and power metal-oxide-semiconductor field-effect transistor (MOSFET) as the main growth drivers. We look for strongest growth from IGBTs, although power MOSFETs had the largest market share in 2013 due to its fast switching speed, near-perfect gate impedance, fast switching speed, excellent stability, and a relatively low on-state resistance.

Because of their attractive performances, wide-bandgap power semiconductor devices have been under intense R&D. In development since the early 1990s, SiC material for power device applications has gone through the longest period and come furthest in terms of maturity and reliability.

We project the next-generation power semiconductor will exhibit a CAGR of 63 percent between 2011 and 2017, reaching values of more than $500 million.

Benefiting from the growth of these wide-bandgap devices will be processing equipment. Significant improvements on the technique of growing GaN material on Si substrates have enabled high quality, crack-free GaN epi layers grown on Si, overcoming the 17 percent crystal mismatch between the two materials crystal faces. For GaN epitaxy on Si or SiC, Veeco and Aixtron will benefit and grow strongly, utilizing their expertise in LED epitaxy.

Silicon MOSFETs use wirebonding and traditional SO or TO packages.  GaN on Silicon can be bonded using flip chip. Companies benefiting would be equipment suppliers to the flip chip industry, such as TEL NeXX.

European 3D TSV summit: “Smarter system integration”

GRENOBLE, FRANCE: On January 19-21, 2015, SEMI will hold its 3rd edition of the European 3D TSV Summit in Grenoble, France.

After the last successful edition that brought over 330 participants from over 21 countries in January 2014, SEMI will renew the Summit in 2015 with the theme: “Enabling Smarter Systems,” focusing on the critical chip integration that 3D through silicon vias (TSV) now play in business strategies and the latest technology advancements.

After a long period of development, disruptive TSV technology is now transitioning to the commercialization stage and delivering higher performance, lower power consumption and reduced footprint products to enable overall smarter system integration. Companies like SK Hynix, Micron or Samsung are manufacturing engineering samples and some are even ramping up the production of stacked memories with TSV.

Bosch, a leading MEMS company, is proposing 3-axis accelerometers with TSV. Sony is manufacturing 3D stacked backside illuminated Image Sensors with TSV in the logic die. Xilinx, pioneer of TSV with its VIRTEX 7 in 28nm, announced their next generation FPGA products Kintex and Virtex Ultra Scale in 20 and 16nm stacked die on interposer.

These examples of recent product launches and announcements from major semiconductor companies make it more relevant than ever to attend this year’s TSV Summit to learn about future opportunities.

The event will be the platform for over 20 invited speakers from design houses, IDMs, OSATs, as well as from equipment and materials suppliers to share their views during plenary presentations and panel discussions. Executives and experts from leading global companies will address the latest business and technological issues pressing the industry — including cost of ownership, business models, supply chain, manufacturability and other technological aspects.

The European 3D TSV Summit will address the most relevant and controversial issues related to 2.5 and 3D manufacturing. Companies will also have the opportunity to showcase their products and services in the exhibition zone. In addition to the exhibit and conference, attendees will have the opportunity to schedule on-site business meetings through the event’s online business meeting platform and to visit the CEA-Leti 300mm TSV-capable clean room.

This year’s European 3D TSV Summit Steering Committee includes executives from: ams AG, BESI, CEA-Leti, EV Group, Fraunhofer-IZM, imec,  Oerlikon Systems, Scint-X,  SPTS, STMicroelectronics, and SUSS Microtec.

e-con Systems launches barcode scanning application

ST. LOUIS, USA & CHENNAI, INDIA: e-con Systems Inc., a leading camera systems integrator, announced the launch of the Spica - a barcode scanner application compatible with any Windows OS based platforms, including Windows embedded.

Spica is compatible with any Direct Show camera. Spica supports 2D barcode such as AZTEC, Datamatrix, QR Code and 1D Barcodes such as Codabar, Code 39, Code 128, EAN-8, EAN-13, UPC-A, UPC-E, UPC-E1, 128-A, 128-C, Interleaved 2-of-5 (IFT) and Ext39.

“We have been repeatedly asked by our USB camera customers for a reliable and flexible barcode SDK that has been optimized for our USB cameras. Our Spica barcode scanning software is the solution for our customers who have been looking out for a 1D/2D barcode scanning solution for our USB camera series starting with the See3CAM_80 camera,” said  Ashok Babu, president, e-con Systems.

The Spica software package includes a SDK which enables customers to develop their customized barcode applications. The SDK includes Dynamic Libraries (both C# and C++) and API Developer Guide. Along with this, e-con also provides Spica camera viewer with barcode decoder sample application for See3CAM_80 – 8 MP USB 3.0 camera.

Tuesday, September 30, 2014

Altera announces immediate availability of next-gen non-volatile MAX 10 FPGAs and evaluation kits

SAN JOSE, USA: Altera Corp. announced the availability of non-volatile MAX 10 FPGAs, Altera’s latest addition to its Generation 10 portfolio.

Using TSMC’s 55 nm embedded flash process technology, MAX 10 FPGAs revolutionize non-volatile FPGAs by delivering dual-configuration flash, analog and embedded processing capabilities in a small-form-factor, low-cost, instant-on programmable logic device.

MAX 10 FPGAs are shipping today and are supported by a broad collection of design solutions that accelerate system development, including Quartus II software, evaluation kits, design examples, design services through the Altera Design Services Network (DSN), documentation and training.

MAX 10 FPGAs provide greater system value to users by reducing overall bill-of-material costs while increasing board reliability. The highly integrated, non-volatile FPGAs provide up to 50 percent board area savings compared to other low-cost FPGAs by integrating into a single chip the following key features:

* Up to 50K logic elements
* Flash memory blocks (user flash and dual-configuration flash)
* Analog-to-digital converters
* Embedded memory and DSP blocks
* DDR3 external memory interfaces
* Embedded processing with soft-core Nios® II processors
* Up to 500 user I/O
* Integrated power regulator.

These key features provide higher system-level value to customers by enabling MAX 10 FPGAs to perform several important system functions, such as an instant-on configuration, fail-safe upgrades, system monitoring and system control.