SOUTH KOREA: Samsung Electronics Co. Ltd announced the industry’s first 45 nanometer (nm) embedded flash (“eFlash”) logic process development.
Samsung successfully implemented the new process into the smart card test chip, which means that this process technology fulfills the stringent quality requirements of the security solution market and can be successfully deployed on a commercial scale.
“Samsung’s 45nm eFlash logic process has the potential to be broadly adopted into various components for security solutions and mobile devices, including smart card IC, NFC IC, eSE (embedded secure element) and TPM (Trusted platform module),” said Taehoon Kim, VP of marketing, System LSI Business, Samsung Electronics. “The excellent performance from this smart card test chip will help solidify our leadership in the security IC market.”
The smart card IC based on Samsung’s 45nm eFlash logic process guarantees high reliability and endurance of 1 million cycles per flash memory cell. The performance results are the industry’s best class and superior to any other solutions currently on the market, generally rated for 500,000 cycles.
Through the improvement in both flash cell structure and operating scheme, the test chip features random access time to read memory that is 50 percent faster and the power efficiency is enhanced by 25 percent over previous products built on the 80nm eFlash logic process.
Samsung’s advanced 45nm eFlash logic technology, built on the technological synergies created through decades of know-how and experience in both embedded flash and logic processes, will enable Samsung to provide competitive performance levels and greater value to its foundry and ASIC customers in the field of consumer microcontrollers and automotive chips that require higher speed, larger memory capacity and higher power efficiency.
Initial smart card IC samples for commercialization using this 45nm eFlash logic technology are expected to be available in the second half of 2014.
Friday, May 17, 2013
Synopsys DesignWare IP for PCI Express 3.0 passes first PCI-SIG PCIe 3.0 compliance workshop
USA: Synopsys Inc. announced that its DesignWare PHY and digital controller IP for the PCI-SIG PCI Express 3.0 is the first complete solution from a single vendor to pass compliance testing at the first PCI-SIG compliance workshop for PCI Express 3.0.
The PCI Express 3.0 specification increases the operating rate to 8 gigatransfers per second (GT/s), effectively doubling the bandwidth over PCI Express 2.0 to address the high-performance requirements of data center, storage and networking applications. To achieve compliance, the DesignWare PHY and controller IP passed PCI-SIG's three required Gold Tests: the electrical tests, the Protocol Test Card (PTC) and the PCIeCV software tests.
In addition, the DesignWare PHY and controller IP demonstrated interoperability with more than 80 percent of the devices at the workshop, exceeding interoperability requirements. By providing a complete and compliant IP solution for PCI Express 3.0, Synopsys enables designers to immediately incorporate the high-performance PCI Express 3.0 interface into their system-on-chips (SoCs) with less risk and improved time-to-market, while helping to ensure product interoperability.
"As the leader in application-intelligent 10 Gigabit Ethernet network interface software and hardware, we rely on Synopsys to provide us with high-performance PCI Express IP that helps us differentiate our products in the market," said Andre Chartand, VP of engineering at Solarflare.
"Synopsys' high-quality IP for PCI Express 3.0, including the scalable I/O virtualization support necessary for our cloud and software defined networking offerings, as well as the company's superior technical support, were instrumental in the silicon success of our next-generation SFN7000 design."
"Teledyne LeCroy has collaborated with Synopsys through multiple generations of DesignWare PCI Express IP to ensure interoperability and standards compliance," said John Wiedemeier, PCI Express product marketing manager at Teledyne LeCroy. "Synopsys' ongoing commitment to performing extensive compliance testing to the latest specifications, including their recent success at the PCI-SIG Compliance Workshop, significantly lowers the barrier for designers to incorporate high speed PCIe interfaces into their chips."
The complete DesignWare IP for PCI Express solution includes PHYs, controllers and verification IP. DesignWare IP for PCI Express has been used in more than 750 designs, with more than 80 for PCI Express 3.0. The full-featured, high-performance digital controller IP for PCI Express 3.0 provides an optional interface to connect to ARM AMBA AXI4, AMBA AXI3 or AMBA AHB on-chip interconnect using the DesignWare IP for PCI Express Bridge, which allows designers to easily add PCI Express 3.0 functionality to their SoCs.
The PHYs substantially exceed the PCI Express electrical specifications in key performance areas such as jitter margin and receive sensitivity, which enable a more reliable PCI Express link.
"As an active member of the PCI-SIG since 2003, Synopsys understands the importance of contributing to the PCI Express specification working groups and participating in compliance testing as part of the ecosystem enablement," said Al Yanes, PCI-SIG president. "Synopsys' compliance to the latest version of the PCI Express 3.0 specification helps ensure compatibility among products incorporating PCI Express while facilitating the widespread adoption of PCI Express 3.0."
"To maintain our leadership in PCI Express IP, we make continuous investments in new product features and conduct rigorous compliance testing to ensure our IP meets the latest specifications," said John Koeter, VP of marketing for IP and systems at Synopsys.
"We have moved aggressively to align our PCI Express roadmap with the industry's needs by providing PCI Express 3.0 support since the 0.5 version of the specification. Early availability enabled our customers to meet their aggressive time-to-market requirements. Achieving this latest compliance milestone gives designers confidence that they can incorporate a complete PCI Express solution into their SoCs that will meet their full performance and interoperability requirements."
The DesignWare Controller for PCI Express 3.0 is available now. The DesignWare PHY IP for PCI Express 3.0 is available now in multiple 28-nm technology nodes.
The PCI Express 3.0 specification increases the operating rate to 8 gigatransfers per second (GT/s), effectively doubling the bandwidth over PCI Express 2.0 to address the high-performance requirements of data center, storage and networking applications. To achieve compliance, the DesignWare PHY and controller IP passed PCI-SIG's three required Gold Tests: the electrical tests, the Protocol Test Card (PTC) and the PCIeCV software tests.
In addition, the DesignWare PHY and controller IP demonstrated interoperability with more than 80 percent of the devices at the workshop, exceeding interoperability requirements. By providing a complete and compliant IP solution for PCI Express 3.0, Synopsys enables designers to immediately incorporate the high-performance PCI Express 3.0 interface into their system-on-chips (SoCs) with less risk and improved time-to-market, while helping to ensure product interoperability.
"As the leader in application-intelligent 10 Gigabit Ethernet network interface software and hardware, we rely on Synopsys to provide us with high-performance PCI Express IP that helps us differentiate our products in the market," said Andre Chartand, VP of engineering at Solarflare.
"Synopsys' high-quality IP for PCI Express 3.0, including the scalable I/O virtualization support necessary for our cloud and software defined networking offerings, as well as the company's superior technical support, were instrumental in the silicon success of our next-generation SFN7000 design."
"Teledyne LeCroy has collaborated with Synopsys through multiple generations of DesignWare PCI Express IP to ensure interoperability and standards compliance," said John Wiedemeier, PCI Express product marketing manager at Teledyne LeCroy. "Synopsys' ongoing commitment to performing extensive compliance testing to the latest specifications, including their recent success at the PCI-SIG Compliance Workshop, significantly lowers the barrier for designers to incorporate high speed PCIe interfaces into their chips."
The complete DesignWare IP for PCI Express solution includes PHYs, controllers and verification IP. DesignWare IP for PCI Express has been used in more than 750 designs, with more than 80 for PCI Express 3.0. The full-featured, high-performance digital controller IP for PCI Express 3.0 provides an optional interface to connect to ARM AMBA AXI4, AMBA AXI3 or AMBA AHB on-chip interconnect using the DesignWare IP for PCI Express Bridge, which allows designers to easily add PCI Express 3.0 functionality to their SoCs.
The PHYs substantially exceed the PCI Express electrical specifications in key performance areas such as jitter margin and receive sensitivity, which enable a more reliable PCI Express link.
"As an active member of the PCI-SIG since 2003, Synopsys understands the importance of contributing to the PCI Express specification working groups and participating in compliance testing as part of the ecosystem enablement," said Al Yanes, PCI-SIG president. "Synopsys' compliance to the latest version of the PCI Express 3.0 specification helps ensure compatibility among products incorporating PCI Express while facilitating the widespread adoption of PCI Express 3.0."
"To maintain our leadership in PCI Express IP, we make continuous investments in new product features and conduct rigorous compliance testing to ensure our IP meets the latest specifications," said John Koeter, VP of marketing for IP and systems at Synopsys.
"We have moved aggressively to align our PCI Express roadmap with the industry's needs by providing PCI Express 3.0 support since the 0.5 version of the specification. Early availability enabled our customers to meet their aggressive time-to-market requirements. Achieving this latest compliance milestone gives designers confidence that they can incorporate a complete PCI Express solution into their SoCs that will meet their full performance and interoperability requirements."
The DesignWare Controller for PCI Express 3.0 is available now. The DesignWare PHY IP for PCI Express 3.0 is available now in multiple 28-nm technology nodes.
Microchip delivers 12 billionth PIC MCU to Nidec
USA: Microchip Technology Inc. announced the shipment of its 12 billionth PIC microcontroller (MCU) to the Nidec Corp.—a preeminent global supplier of precision motors, based in Japan. Microchip delivered this 12 billionth MCU approximately 10 months after delivering its 11 billionth.
The announcement demonstrates the industry’s continued acceptance of Microchip’s 8-, 16- and 32-bit PIC microcontrollers as the high-performance, low-power, cost-effective solution for embedded-control designs.
“The time between each of our 1 billionth shipments continues to accelerate, in the face of Microchip’s increasing MCU market share, and shipping our 12 billionth to a long-term customer like Nidec makes this achievement particularly gratifying,” said Microchip’s president and CEO Steve Sanghi. “Motor control has always been one of our strengths, and the fact that such an esteemed global leader in motor manufacturing has continued using our PIC MCUs for so long is a testament to that strength.”
The announcement demonstrates the industry’s continued acceptance of Microchip’s 8-, 16- and 32-bit PIC microcontrollers as the high-performance, low-power, cost-effective solution for embedded-control designs.
“The time between each of our 1 billionth shipments continues to accelerate, in the face of Microchip’s increasing MCU market share, and shipping our 12 billionth to a long-term customer like Nidec makes this achievement particularly gratifying,” said Microchip’s president and CEO Steve Sanghi. “Motor control has always been one of our strengths, and the fact that such an esteemed global leader in motor manufacturing has continued using our PIC MCUs for so long is a testament to that strength.”
Applied Materials announces Q2 results
USA: Applied Materials Inc. reported results for its second quarter of fiscal 2013 ended April 28, 2013.
Applied generated orders of $2.27 billion, up 7 percent from the prior quarter, with Silicon Systems Group orders up 14 percent from the first quarter and Display orders up 41 percent sequentially. Net sales were $1.97 billion, up 25 percent sequentially.
Applied reported non-GAAP adjusted operating income of $285 million and non-GAAP adjusted net income of $199 million or 16 cents per diluted share. The company recorded a GAAP operating loss of $68 million and a GAAP net loss of $129 million or 11 cents per diluted share.
The GAAP net loss included $278 million in goodwill and intangible asset impairment charges associated with the Energy and Environmental Solutions (EES) segment, which were primarily the result of the further deterioration in solar equipment market conditions, along with $10 million in charges related to previously announced restructuring plans. The company continues to aggressively reduce spending in the EES segment.
"For the second quarter in a row, Applied had strong order performance of over $2 billion," said Mike Splinter, chairman and CEO. "We are seeing increasing pull from some of our largest strategic customers for our key enabling technologies. We remain committed to driving profitable growth."
Applied generated orders of $2.27 billion, up 7 percent from the prior quarter, with Silicon Systems Group orders up 14 percent from the first quarter and Display orders up 41 percent sequentially. Net sales were $1.97 billion, up 25 percent sequentially.
Applied reported non-GAAP adjusted operating income of $285 million and non-GAAP adjusted net income of $199 million or 16 cents per diluted share. The company recorded a GAAP operating loss of $68 million and a GAAP net loss of $129 million or 11 cents per diluted share.
The GAAP net loss included $278 million in goodwill and intangible asset impairment charges associated with the Energy and Environmental Solutions (EES) segment, which were primarily the result of the further deterioration in solar equipment market conditions, along with $10 million in charges related to previously announced restructuring plans. The company continues to aggressively reduce spending in the EES segment.
"For the second quarter in a row, Applied had strong order performance of over $2 billion," said Mike Splinter, chairman and CEO. "We are seeing increasing pull from some of our largest strategic customers for our key enabling technologies. We remain committed to driving profitable growth."
Thursday, May 16, 2013
Eleven companies move up in 1Q13 top 20 semiconductor supplier ranking
USA: Later this month, IC Insights’ May Update to The 2013 McClean Report will show a ranking of the top 25 semiconductor suppliers in 1Q13. A preview of the top 20 companies is listed below.
The top 20 worldwide semiconductor (IC and O S D—optoelectronic, discrete, and sensor) sales leaders for 1Q13 include nine suppliers headquartered in the US, four in Japan, three in Europe, and two each in South Korea and Taiwan, a relatively broad representation of geographic regions. The top-20 ranking also includes three pure-play foundries (TSMC, GlobalFoundries, and UMC) and four fabless companies.
IC foundries are included in the top-20 semiconductor supplier ranking because IC Insights has always viewed the ranking as a top supplier list, not as a marketshare ranking, and realizes that in some cases semiconductor sales are double counted. With many of our clients being vendors to the semiconductor industry (supplying equipment, chemicals, gases, etc.), excluding large IC manufacturers like the foundries would leave significant “holes” in the list of top semiconductor suppliers.
Foundries and fabless companies are each clearly identified. Overall, the list shown is provided as a guideline to identify which companies are the leading semiconductor suppliers, whether they are IDMs, fabless companies, or foundries.
It should be noted that not all foundry sales should be excluded when attempting to create marketshare data. For example, although Samsung has a large amount of foundry sales, most of its sales are to Apple. Since Apple does not re-sell these devices, counting these foundry sales as Samsung semiconductor sales does not introduce double counting.
In total, the top 20 semiconductor companies’ sales increased by 2 percent in 1Q13 as compared to 1Q12, one point better than the total 1Q13/1Q12 worldwide semiconductor market increase of 1 percent. It took semiconductor sales of almost $900 million in 1Q13 to make the top-20 ranking.
Intel remained firmly in control of the number one spot in the 1Q13 ranking. However, Intel lost some of its lead over second-ranked Samsung by registering 45 percent greater semiconductor sales than Samsung in 1Q13 as compared to a 68 percent margin in 1Q12.
The only movement with regard to the top five spots in the 1Q13 ranking was that fabless supplier Qualcomm, riding the continued success of the smartphone market, reported a 28 percent surge in sales (highest among the top 20 companies) and moved up one position to replace Toshiba as the fourth-largest semiconductor supplier.
Micron’s acquisition of Elpida is expected to be completed sometime in 2Q13. It is interesting to note that if Micron and Elpida’s 1Q13 sales were combined, the “new” company would have had $3,060 million in total sales and would have been ranked as the fifth-largest semiconductor supplier.
There was a wide range of growth rates among the worldwide top 20 semiconductor suppliers in 1Q13. The continued success of the fabless/foundry business model is evident when examining the top 20 semiconductor suppliers ranked by growth rate.
The top nine performers included three fabless companies (Qualcomm, Broadcom, and Nvidia) and three pure-play foundries (TSMC, UMC, and GlobalFoundries).
Four of the five top-20 ranked companies that registered a double-digit sales decline in 1Q13 were headquartered in Japan (Toshiba, Renesas, Fujitsu, and Sony). However, it should be noted that the conversion of Japanese company semiconductor sales from yen to US dollars, at 79.26 yen per dollar in 1Q12 versus 92.19 yen per dollar in 1Q13, had a big impact on the sales figures for the Japanese semiconductor suppliers.
Thus, while Sony and Fujitsu would have logged a double-digit semiconductor sales decline even if their sales results were not converted to US dollars, Toshiba would have posted a 5 percent increase in semiconductor sales if the figures were expressed in yen. Unfortunately for AMD, it cannot attribute its extremely poor performance to currency conversion issues.
The top 20 worldwide semiconductor (IC and O S D—optoelectronic, discrete, and sensor) sales leaders for 1Q13 include nine suppliers headquartered in the US, four in Japan, three in Europe, and two each in South Korea and Taiwan, a relatively broad representation of geographic regions. The top-20 ranking also includes three pure-play foundries (TSMC, GlobalFoundries, and UMC) and four fabless companies.
Foundries and fabless companies are each clearly identified. Overall, the list shown is provided as a guideline to identify which companies are the leading semiconductor suppliers, whether they are IDMs, fabless companies, or foundries.
It should be noted that not all foundry sales should be excluded when attempting to create marketshare data. For example, although Samsung has a large amount of foundry sales, most of its sales are to Apple. Since Apple does not re-sell these devices, counting these foundry sales as Samsung semiconductor sales does not introduce double counting.
In total, the top 20 semiconductor companies’ sales increased by 2 percent in 1Q13 as compared to 1Q12, one point better than the total 1Q13/1Q12 worldwide semiconductor market increase of 1 percent. It took semiconductor sales of almost $900 million in 1Q13 to make the top-20 ranking.
Intel remained firmly in control of the number one spot in the 1Q13 ranking. However, Intel lost some of its lead over second-ranked Samsung by registering 45 percent greater semiconductor sales than Samsung in 1Q13 as compared to a 68 percent margin in 1Q12.
The only movement with regard to the top five spots in the 1Q13 ranking was that fabless supplier Qualcomm, riding the continued success of the smartphone market, reported a 28 percent surge in sales (highest among the top 20 companies) and moved up one position to replace Toshiba as the fourth-largest semiconductor supplier.
Micron’s acquisition of Elpida is expected to be completed sometime in 2Q13. It is interesting to note that if Micron and Elpida’s 1Q13 sales were combined, the “new” company would have had $3,060 million in total sales and would have been ranked as the fifth-largest semiconductor supplier.
The top nine performers included three fabless companies (Qualcomm, Broadcom, and Nvidia) and three pure-play foundries (TSMC, UMC, and GlobalFoundries).
Four of the five top-20 ranked companies that registered a double-digit sales decline in 1Q13 were headquartered in Japan (Toshiba, Renesas, Fujitsu, and Sony). However, it should be noted that the conversion of Japanese company semiconductor sales from yen to US dollars, at 79.26 yen per dollar in 1Q12 versus 92.19 yen per dollar in 1Q13, had a big impact on the sales figures for the Japanese semiconductor suppliers.
Thus, while Sony and Fujitsu would have logged a double-digit semiconductor sales decline even if their sales results were not converted to US dollars, Toshiba would have posted a 5 percent increase in semiconductor sales if the figures were expressed in yen. Unfortunately for AMD, it cannot attribute its extremely poor performance to currency conversion issues.
IDT announces breakthrough technologies enabling industry’s lowest phase noise VCO and fractional output divider
USA: Integrated Device Technology Inc. (IDT) has announced two breakthrough technologies enabling the industry’s lowest phase noise voltage-controlled oscillator (VCO) and fractional output divider.
IDT’s latest technologies reinforce the company’s leadership in timing by empowering customers to solve phase noise-related challenges in high-performance communication and networking applications.
IDT’s new VCO technology will be leveraged into next-generation clock generator products, and has been demonstrated to achieve less than 50 femtoseconds (fs) of RMS phase jitter over the wide-band 1 kHz to 61.44 MHz integration range. The extremely low phase noise enables customers to generate the highest-quality reference clocks for use in wireless base-stations, wired networking, and other high-performance communications equipment.
High-quality reference clocks improve communication signal quality on transmission and enhance signal recovery on reception, improving data throughput via lowered error rates. Customers can also reduce total system costs by simplifying filters due to reduced noise in the signal path.
In addition, IDT has developed an innovative fractional output divider circuit capable of generating any output frequency independent of the PLL’s operating frequency with less than 0.7 picoseconds (ps) of integrated RMS phase jitter over the standard 12 kHz to 20 MHz integration range. The ultra-low phase noise fractional output divider enables customers to generate multiple independent frequencies from a single PLL for use in noise-sensitive communications applications.
IDT’s latest technologies reinforce the company’s leadership in timing by empowering customers to solve phase noise-related challenges in high-performance communication and networking applications.
IDT’s new VCO technology will be leveraged into next-generation clock generator products, and has been demonstrated to achieve less than 50 femtoseconds (fs) of RMS phase jitter over the wide-band 1 kHz to 61.44 MHz integration range. The extremely low phase noise enables customers to generate the highest-quality reference clocks for use in wireless base-stations, wired networking, and other high-performance communications equipment.
High-quality reference clocks improve communication signal quality on transmission and enhance signal recovery on reception, improving data throughput via lowered error rates. Customers can also reduce total system costs by simplifying filters due to reduced noise in the signal path.
In addition, IDT has developed an innovative fractional output divider circuit capable of generating any output frequency independent of the PLL’s operating frequency with less than 0.7 picoseconds (ps) of integrated RMS phase jitter over the standard 12 kHz to 20 MHz integration range. The ultra-low phase noise fractional output divider enables customers to generate multiple independent frequencies from a single PLL for use in noise-sensitive communications applications.
Axcelis receives significant order for high performance upgrade from leading chip manufacturer
USA: Axcelis Technologies Inc. has received a multiple system upgrade order from a leading semiconductor manufacturer based in Asia for Axcelis' new GSD Series High Performance End Station upgrade, designed to significantly enhance system productivity and process performance.
The order is valued over $1.4 million. The foundry deployed the upgrade to increase manufacturing capacity in order to meet customer demand, and immediately realize lower operating costs.
"For over 35 years, Axcelis has been committed to providing long term value to our customers," said Robert Mahoney , vice president, global service solutions and quality for Axcelis. "Our award winning Global Support Solutions program is designed to optimize implanter productivity and process capabilities, to maximize the return on their capital investment.
"A key component of this program is our Performance Upgrades program, which allow for the continuous improvement of our customers' installed base. The new High Performance End Station upgrade is doing just that, with customers in high volume production reporting significantly improved productivity, higher reliability, measurably reduced particulate levels and enhanced yield."
The order is valued over $1.4 million. The foundry deployed the upgrade to increase manufacturing capacity in order to meet customer demand, and immediately realize lower operating costs.
"For over 35 years, Axcelis has been committed to providing long term value to our customers," said Robert Mahoney , vice president, global service solutions and quality for Axcelis. "Our award winning Global Support Solutions program is designed to optimize implanter productivity and process capabilities, to maximize the return on their capital investment.
"A key component of this program is our Performance Upgrades program, which allow for the continuous improvement of our customers' installed base. The new High Performance End Station upgrade is doing just that, with customers in high volume production reporting significantly improved productivity, higher reliability, measurably reduced particulate levels and enhanced yield."
Micron announces issuance by Tokyo High Court of order dismissing creditor appeals
USA: Micron Technology Inc. announced the Tokyo High Court's issuance of an order dismissing creditor appeals of the Tokyo District Court's approval of Elpida Memory Inc.'s re-organization plan.
Elpida's re-organization plan calls for Micron to sponsor the re-organization under which Elpida will join the Micron group of companies.
On February 28, the Tokyo District Court approved the re-organization plan following an Elpida creditor vote in which the creditors voted overwhelmingly to approve the plan. On March 29, certain unsecured creditors of Elpida filed appeals of the District Court's approval order with the Tokyo High Court.
"We applaud the Tokyo High Court's ruling," said Micron CEO Mark Durcan. "This is an important milestone on the way to Micron and Elpida joining to become the world's second largest memory provider with the strongest product portfolio in the industry."
The closing of the transaction remains subject to the satisfaction or waiver of certain conditions--including recognition of Elpida's re-organization plan by the United States Bankruptcy Court for the District of Delaware.
Elpida's re-organization plan calls for Micron to sponsor the re-organization under which Elpida will join the Micron group of companies.
On February 28, the Tokyo District Court approved the re-organization plan following an Elpida creditor vote in which the creditors voted overwhelmingly to approve the plan. On March 29, certain unsecured creditors of Elpida filed appeals of the District Court's approval order with the Tokyo High Court.
"We applaud the Tokyo High Court's ruling," said Micron CEO Mark Durcan. "This is an important milestone on the way to Micron and Elpida joining to become the world's second largest memory provider with the strongest product portfolio in the industry."
The closing of the transaction remains subject to the satisfaction or waiver of certain conditions--including recognition of Elpida's re-organization plan by the United States Bankruptcy Court for the District of Delaware.
CNH enhances electrical design capabilities with latest Mentor Graphics Capital and VeSys Software
USA: Mentor Graphics Corp. announced that CNH, a world leader in agricultural and construction equipment, has transitioned to the latest VeSys software platform and also added a number of compatible tools from the Mentor® Capital software suite, resulting in a very modern design environment.
“From the engineering standpoint, the key improvements were integration with our mechanical CAD and PDM systems, including the difficult subject of design change management,” said Michael Wrobel, electronics and electrical systems manager, CNH.
“We also needed more powerful electrical simulation and analysis than was available previously. And as a global organization, we wanted a tool landscape that is easy to manage internationally. Mentor’s newest software matched these requirements for us, minimizing the need to redefine our design progression. Mentor was also able to migrate data from the previous generation tooling, so minimizing our risk and speeding the transition.”
“Off-road vehicles are now very sophisticated in terms of on-board electronics,” said Martin O’Brien, GM of the Integrated Electrical Systems Division of Mentor Graphics. “The vehicle’s electrical system links all the electronics together and must also respond to the challenge of constant design change. Upgrading the electrical design environment helps CNH deliver exactly the vehicles their customers want with maximum efficiency and minimum cost.”
The VeSys platform is a suite of wiring and harness design software tools optimized for rapid deployment and low IT footprint. Capital is an advanced software suite for the electrical system and wire harness domain. Used by leading automotive OEMs, aerospace OEMs and harness makers, Capital is built to support the complex demands of integrated processes from initial vehicle definition through electrical system and design, harness manufacture and vehicle service. Certain Capital tools can be used within a VeSys environment, as CNH has chosen to do.
“From the engineering standpoint, the key improvements were integration with our mechanical CAD and PDM systems, including the difficult subject of design change management,” said Michael Wrobel, electronics and electrical systems manager, CNH.
“We also needed more powerful electrical simulation and analysis than was available previously. And as a global organization, we wanted a tool landscape that is easy to manage internationally. Mentor’s newest software matched these requirements for us, minimizing the need to redefine our design progression. Mentor was also able to migrate data from the previous generation tooling, so minimizing our risk and speeding the transition.”
“Off-road vehicles are now very sophisticated in terms of on-board electronics,” said Martin O’Brien, GM of the Integrated Electrical Systems Division of Mentor Graphics. “The vehicle’s electrical system links all the electronics together and must also respond to the challenge of constant design change. Upgrading the electrical design environment helps CNH deliver exactly the vehicles their customers want with maximum efficiency and minimum cost.”
The VeSys platform is a suite of wiring and harness design software tools optimized for rapid deployment and low IT footprint. Capital is an advanced software suite for the electrical system and wire harness domain. Used by leading automotive OEMs, aerospace OEMs and harness makers, Capital is built to support the complex demands of integrated processes from initial vehicle definition through electrical system and design, harness manufacture and vehicle service. Certain Capital tools can be used within a VeSys environment, as CNH has chosen to do.
Wednesday, May 15, 2013
Overall patent landscape is pretty young with 82 percent of patents filed since 2006
FRANCE: Yole Développement announces its 2.5D, 3DIC and TSV Interconnect Patent Investigation report.
Yole Développement’s investigation aims at providing statistical analysis of existing IP to give a landscape overview together with an in-depth investigation on five player portfolios selected by the analyst.
A very young patent landscape dominated by 10 companies
For this analysis of 3D packaging technology patents, more than 1800 patent families have been screened. 52 percent of the families have been classified as relevant and further studied.
“The indepth analysis quickly revealed that the overall patent landscape was pretty young with 82 percent of patents filed since 2006. Actually about 260 players are involved in 3DIC technology while the top 10 assignees represents 48 percent of patents filed in the 3DIC domain!,” explains Lionel Cadix, Technology and Market analyst, Advanced Packaging, at Yole Développement.
Yole Développement selected five companies from these 10 most active players to focus on and lead an accurate analysis of their patent portfolios.
Yole Développement found found main types of business models among the top 10 assignees involved in this mutating middle end area:
• Foundries and IDM: IBM, Samsung, Intel.
• OSATs: STATS ChipPAC, Amkor.
• Memory IDM/Foundries: Micron, SK Hynix, Elpida.
• Research centers: ITRI.
It is also interesting to notice that the USA is the early player increasingly involved in 3DIC since 1969. China and Korea are new players since 2005.
This complete description of the patent landscape is included in the first part of the report and provides all the background materials for the 3DIC patent landscape analysis. The report provides a complete analysis of the patent landscape including geographical origins of the patents, companies or R&D organizations that have been granted the patents, historical data on when the companies that have applied for patents in the last 20 years, inventors of the patents, expiration status, R&D collaborations.
Yole Développement’s investigation aims at providing statistical analysis of existing IP to give a landscape overview together with an in-depth investigation on five player portfolios selected by the analyst.
A very young patent landscape dominated by 10 companies
For this analysis of 3D packaging technology patents, more than 1800 patent families have been screened. 52 percent of the families have been classified as relevant and further studied.
Yole Développement selected five companies from these 10 most active players to focus on and lead an accurate analysis of their patent portfolios.
Yole Développement found found main types of business models among the top 10 assignees involved in this mutating middle end area:
• Foundries and IDM: IBM, Samsung, Intel.
• OSATs: STATS ChipPAC, Amkor.
• Memory IDM/Foundries: Micron, SK Hynix, Elpida.
• Research centers: ITRI.
It is also interesting to notice that the USA is the early player increasingly involved in 3DIC since 1969. China and Korea are new players since 2005.
This complete description of the patent landscape is included in the first part of the report and provides all the background materials for the 3DIC patent landscape analysis. The report provides a complete analysis of the patent landscape including geographical origins of the patents, companies or R&D organizations that have been granted the patents, historical data on when the companies that have applied for patents in the last 20 years, inventors of the patents, expiration status, R&D collaborations.
RDA Microelectronics announces SP3T switch design wins for 2G and 3G Samsung smartphones
CHINA: RDA Microelectronics Inc. announced that Samsung has selected the RDASW36 switch for two Samsung models, the 2G Samsung Galaxy Star smartphone and the 3G Samsung Galaxy Pocket Neo smartphone.
Both smartphones are expected to be released in the second quarter of 2013 and will be sold in Europe and emerging markets, such as South America.
Developed on Silicon-On-Insulator (SOI) CMOS process technology, RDA's single pole three throw (SP3T) switch combines high power with low insertion loss on a small form factor, making it ideally suited for WiFi and Bluetooth applications in 2G and 3G handsets.
Both smartphones are expected to be released in the second quarter of 2013 and will be sold in Europe and emerging markets, such as South America.
Developed on Silicon-On-Insulator (SOI) CMOS process technology, RDA's single pole three throw (SP3T) switch combines high power with low insertion loss on a small form factor, making it ideally suited for WiFi and Bluetooth applications in 2G and 3G handsets.
MIG explores trends and techniques in sensor fusion
USA: MEMS Industry Group (MIG) , the industry organization advancing micro-electromechanical systems (MEMS) across global markets, announced its conference and exposition line-up for the 2013 Sensors Expo & Conference, the premier industry event in North America for designing sensors and sensor-integrated systems.
Joined by leading member-companies, MIG will examine MEMS sensor fusion through a pre-conference symposium. MIG speakers will also address MEMS in consumer, industrial and medical/healthcare markets through a MEMS conference track and MEMS Pavilion exhibition area on the show floor.
Joined by leading member-companies, MIG will examine MEMS sensor fusion through a pre-conference symposium. MIG speakers will also address MEMS in consumer, industrial and medical/healthcare markets through a MEMS conference track and MEMS Pavilion exhibition area on the show floor.
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