SAN JOSE, USA: Xilinx Inc. has announced major advances in productivity for Zynq-7000 All Programmable SoCs with the Vivado Design Suite 2014.3, the programmable industry's only SoC-strength design suite, SDK, and new UltraFast Embedded Design Methodology Guide.
Included with this release are enhancements in Vivado High-Level Synthesis (HLS) and IP Integrator, and new performance monitoring and visualization capabilities within SDK.
When used in combination with the new UltraFast Embedded Design Methodology Guide, these enhancements are proven to accelerate productivity by over 10X.
Accelerating implementation and verification: Enhancements to Vivado HLS include improved quality-of-results from C based synthesis and enhancements to its automatic inference of AMBA AXI-4 interfaces to speed the time and quality of integration. Vivado HLS enables IP creation and verification directly from C algorithmic specifications, quickly resulting in designs that rival hand-coded RTL and verification several orders of magnitude faster than RTL simulation.
Leveraged by over 1,000 designers, Vivado HLS also supports a growing ecosystem of hardware implementable SW libraries. The enhanced Vivado Design Suite 2014.3 supports over 40 OpenCV functions, now available from Xilinx Technology Ventures and Alliance MemberAuviz Systems.
Accelerating time to integration: Enhancements in Vivado IP Integrator include automation of the connectivity between streaming and memory mapped AXI interconnects, expediting and simplifying integration of IP into Zynq SoC-based systems.
Also new in Vivado IP Integrator is a push-button IP evaluation request for Xilinx Premier Alliance Member IP. New for 2014.3 is Xylon logicBRICKS evaluation IP cores, with other Alliance member IP to be added in future releases. The new logicBRICKS IP enable the rapid evaluation of efficient image and video processing IP, further expanding the Vivado IP Catalog.
Accelerating system design and software development: Xilinx has also extended its Software Development Kit (SDK) with live in-system instrumentation and performance visualization to quickly find system performance bottlenecks and run what-if scenarios.
Xilinx SDK 2014.3 provides configurable AXI traffic generators that work on the FPGA fabric to enable developing embedded software earlier in the development cycle.