SMIC bases DFM sign-off strategy on Mentor Graphics Calibre platform

WILSONVILLE, USA: Mentor Graphics Corp. announced that Semiconductor Manufacturing International Corp. (SMIC) has qualified Mentor Graphics Calibre products as the reference platform for design-for-manufacturing (DFM) sign-off for 65nm and smaller processes.

The reference flow includes all elements of the Calibre DFM offering including: the Calibre LFD product for litho checking; the Calibre CMPAnalyzer product for CMP (planarity) simulation; the Calibre YieldAnalyzer product for critical area analysis (CAA) and simulation; and the Calibre YieldEnhancer product with SmartFill for automated DFM layout improvements, including highly-optimized planarity fill. SMIC is also using the Calibre solution for its DFM services offerings.

“We are moving aggressively to add DFM sign-off requirements for 65nm and below, making it mandatory at all levels, including full-chip, block and IP,” said Max Liu, vice president, Corporate Design Service Center at SMIC.

“We selected Calibre because we found it to be a complete, accurate and reliable platform for DFM, ensuring the effectiveness of SMIC’s reference flow. For example, Calibre LFD is a primary litho-checking tool accurate enough to be certified on our 65nm process. Consequently, process variability analysis tools used in our flow, including electrical analysis, use contours generated by Calibre LFD.

“Also, Calibre CMPAnalyzer provides the ability for SMIC to build and modify our CMP model, giving us greater flexibility and control of the DFM process. In addition, Calibre, as a widely-used platform in the industry for the entire post tapeout flow, makes it easy for our customers to integrate IP that has also been verified with Calibre into their designs.”

“Using DFM is becoming a competitive factor for both foundries and fabless designers,” said Joseph Sawicki, vice president and general manager for the Design-to-Silicon Division at Mentor Graphics.

“The Calibre platform makes DFM a seamless extension to our customers’ existing physical verification flow, making product adoption simple and delivering a performance advantage that reduces overall cycle time.”