Thursday, March 25, 2010

Altera and Apical deliver world's first HD wide dynamic range FPGA solution for surveillance

ISC WEST 2010, SAN JOSE, USA: Altera Corp. and Apical Ltd have announced the world's first high-definition wide dynamic range (WDR) CMOS image-sensor-processing solution for video-surveillance cameras.

Altera is demonstrating the solution at the International Security Conference (ISC) West Expo from March 24 to 26 in Las Vegas, Nevada. Altera and Apical's complete solution ensures superb video-image quality regardless of varying lighting conditions, a major stumbling block for previous generations of surveillance cameras.

Featuring Altera's Cyclone III and Cyclone IV FPGAs, and Apical's intellectual property (IP), this solution supports Aptina's new MT9M033 High-Definition WDR CMOS image sensor.

Standard CMOS image sensors are limited by the vast ranges of brightness levels, from low light to direct sunlight, that can black out or wash out a video subject. WDR CMOS image sensors correct this problem, but present a design challenge. The large amounts of data (up to 20 bits per color x 1.2 Mpixels at 60 frames per second) generated by these image sensors must be processed in the Image Sensor Pipeline (ISP), but are too much to be handled on-chip.

The DSPs and ASSPs typically used in surveillance systems do not have the ability to handle the processing task efficiently. Altera's Cyclone FPGAs have the capability to perform the intense number-crunching algorithms that convert the raw image data into a standard digital output needed to produce a clear video image.

"While previous sensors have shown good performance in either low-light or bright-light conditions, they've never been able to do both, until now," said Michael Tusch, CEO of Apical Ltd. "Once we realized DSPs couldn't perform the functions we needed, we turned to Altera's Cyclone FPGAs because they offered the performance required to run Apical's IP for the cost point and power restrictions for the surveillance market."

The sensor processing design implemented in the FPGA is provided by Apical. The IP from Apical includes the full ISP, which performs the auto-exposure, auto-gain, and auto-white balancing that contribute to clear video images in extreme low-light and bright-light conditions.

Apical's IP also optimizes video images by incorporating Apical's state-of-the-art iridix local tone mapping engine, which mimics the human eye, with high performance 2D or 3D noise reduction, and advanced color processing. The Cyclone III and Cyclone IV families of FPGAs perform all of these functions at industry leading clock rates, logic utilization, and power consumption.

"Altera's FPGAs are enabling our customers to do more with their designs, especially in the industrial market where traditional DSPs and ASSPs have hit a wall," said Michael Samuelian, director of the industrial and automotive business unit at Altera.

"Altera's low-cost and low-power Cyclone series of FPGAs are being used as the main image-processing element from image capture to image display. With our FPGAs and Apical's IP, next-generation video surveillance equipment will get to market faster and have unlimited potential."

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