Monday, March 15, 2010

Arasan to deliver keynote at Design & Reuse's IP-SoC Day seminar

SAN JOSE, USA: Arasan Chip Systems Inc., a leading provider of Total Semiconductor IP Solutions, is participating in the IP - SoC Day World Tour event organized by Design & Reuse (D&R), Grenoble, France.

This first-of-a-kind, unique event brings together leading Semiconductor IP providers with industry specialists and key members of the design community who are focused on maximizing IP integration with minimal effort in complex SoC designs.

The World-wide tour will be kicked off with the first event to be held on March 23-24, 2010 at the Hilton, Santa Clara, California, where Ram Gopalan, Senior Director of Corporate Marketing at Arasan is presenting a keynote talk "Designing with IP in the 21st century - Think Total!" Arasan Chip Systems is also moderating a panel discussion on the "Role of Software and System Tools in IP integration" at this event. This panel will address the need for software, hardware platforms and system tools in integrating complex IP into SoCs.

Preparing to deliver the talk, Ram Gopalan commented: "The increasing complexity of SoC designs has translated into a growing need for additional components that are necessary to successfully integrate an IP. Arasan has responded to this challenge by providing a consultative approach starting with IP selection and optimization, combined with vIP, software and hardware platforms as part of its Total IP Solutions offering to mitigate the risks and simplify the process of IP integration into SoCs."

No comments:

Post a Comment

Note: Only a member of this blog may post a comment.