Friday, May 14, 2010

Synopsys' IC compiler widely deployed at MediaTek

MOUNTAIN VIEW, USA: Synopsys Inc. announced that MediaTek Inc., a leading fabless semiconductor company for wireless communications and digital multimedia solutions, has standardized on Synopsys' IC Compiler physical design solution, a key component of the Galaxy Implementation Platform, to deliver best performance, power and area on MediaTek's leading-edge wireless communications chips.

IC Compiler's advanced placement, timing and power optimization along with its tight correlation to signoff has contributed to faster design closure.

"In the rapidly expanding wireless communications sector, we face intense time-to-market pressures to deliver designs on schedule while realizing aggressive performance, power and area goals," said MediaTek. "Having taped out several complex chips with IC Compiler, we believe it is a key enabler for us to meet our design goals. IC Compiler is now the chosen solution for our designs."

At MediaTek, hundreds of megahertz clock speeds and several complex clock domains coupled with a multi-power domain approach, including shutdown scenarios optimization, make design closure challenging. Minimum die area and leakage power are also important factors. Market pressures allow only a very short tapeout schedule, so achieving faster design closure is critical.

IC Compiler's Zroute routing technology, its advanced placement, power and timing optimization; its tight correlation to Synopsys' PrimeTime solution; and Synopsys' StarRC custom parasitic extraction to minimize late-stage timing ECOs were all key elements driving broad adoption of IC Compiler at MediaTek.

"Continuous technology innovation and rapid response to market needs have established MediaTek as one of the top five fabless companies worldwide," said Dr. Antun Domic, senior vice president and general manager, Implementation Group at Synopsys.

"Collaborating with MediaTek on their cutting-edge chips has driven innovations in IC Compiler that reinforce its technology leadership position in place and route."

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