SMIC, Virage Logic to offer Virage Logic's IP on SMIC's 65nm LL process

FREMONT, USA & SHANGHAI, CHINA: Virage Logic Corp. and Semiconductor Manufacturing International Corp. (SMIC), the leading foundry in China, announced the expansion of their longstanding partnership to include the 65-nanometer (nm) low-leakage (LL) process technology.

Under the terms of the agreement, SoC designers will have access to Virage Logic's SiWare Memory compilers, SiWare Logic libraries, SiPro MIPI and Intelli DDR IP on SMIC's 65nm LL process. This joint agreement is part of Virage Logic's strategy to expand its business through industry leading foundries and highlights SMIC's commitment to provide a complete IP solution for its customers.

"As the premier foundry in China, our expanded partnership with Virage Logic will enable SMIC to offer the industry leading semiconductor IP on our 65nm LL process to meet the needs of not only the Chinese system-on-chip (SoC) developers but the global semiconductor market," said Chris Chi, Senior Vice President and Chief Business Officer of SMIC.

"Currently we have a number of customers with projects leveraging SMIC's 65nm LL node with the extended Virage Logic IP offering. As SMIC's business continues to expand, we look forward to growing our synergistic relationship with Virage Logic to meet the increasing market demand."

"We are pleased to expand our partnership with SMIC to the 65nm LL process. With this comprehensive offering of Virage Logic's industry leading IP, customers will be able to select SMIC as their primary source for their 65nm manufacturing requirements", said Brani Buric, executive vice president of marketing and sales for Virage Logic.

"SMIC recognizes the strategic benefits of making our SiWare Memory and SiWare Logic IP available to end users free of charge as part of a foundry-sponsored IP offering. Our SiPro MIPI and Intelli DDR standards-based high-speed interface IP offering also provides a proven solution so now designers everywhere have the option to select the best-in- class IP for their 65nm LL based designs."