SAN JOSE, USA: Apache Design Solutions, the technology leader in power integrity and noise closure for chip-package-systems (CPS) convergence, announced that ASE Inc., the world’s largest semiconductor packaging and test company, has adopted Apache’s CPS co-design/co-analysis solutions including Sentinel-NPE (formerly PakSI-E), Sentinel-PI, and Sentinel-TI.
Apache’s solution helps ASE deliver high value service to their customers through close collaboration on analysis and optimization of their IC package designs.
ASE has a broad package portfolio, encompassing leadframe, wire bond BGA, and flip chip, all of which present differing challenges related to timing, power and stress analysis. Using Apache’s Sentinel-NPE, ASE can efficiently extract 3D RCLK models, which are then provided to customers so they can perform early stage prototyping, accurate power analysis, and dynamic sign-off.
ASE also uses Sentinel-PI with CPM to perform chip-package co-simulation and co-optimization, and Sentinel-TI for chip-package thermal and thermally induced stress analysis.
“Package designs are becoming increasingly complex, therefore closer engineering collaboration with our customers is crucial,” said Dr. Ho-Ming Tong, Chief R&D Officer & General Manager of Group R&D, ASE Group.
“Apache provides the ability to deliver accurate package models earlier in the design cycle so our customers can optimize their chip-package interface to reduce cost and avoid last minute signoff problems. Apache’s products present ASE a strong value proposition, which rounded out with a strong roadmap and local support, make them a clear choice for CPS partnership.”
“ASE is the world’s leading assembly and test company and we are proud that they have selected Apache as their partner for chip-package-system convergence,” said Dian Yang, senior vice president and general manager at Apache Design Solutions. “Our mutual customers will benefit from co-simulation solutions that provide higher quality results.”