LOS GATOS, USA: Silicon Frontline Technology, Inc. (SFT), an EDA company in the post-layout verification market, announced that Triune Systems, a company focused on green integrated solutions, selected Silicon Frontline’s 3D extraction products, F3D (Fast 3D) for fast 3D extraction and R3D (Resistive 3D) for 3D extraction and analysis of its large resistive power device design to reduce their carbon footprint (or energy consumption).
“We focus on offering integrated circuits and design services that reduce the carbon footprint of end equipment products and designs,” said Ross Teggatz, CEO at Triune Systems. “Silicon Frontline’s products enable us to cost effectively provide the highest level of energy transfer from both traditional and alternative power sources.
“F3D and R3D provide a fast and accurate power back-annotation of any design, which eliminates reliability issues within the design, as well as minimizes losses due to parasitic effects. For example, metal slotting is becoming more intensive in the advanced technologies and this creates more exposure to potential weak spots, but R3D allows the optimal location for slotting to be easily determined.”
“To address our customers’ post-layout verification needs, we focus on guaranteed accurate post-layout verification technology, so that our customers can meet the specifications of their low power designs,” remarked Dermott Lynch, VP Marketing at Silicon Frontline. “We are pleased to have our goal-- reducing the carbon footprint of silicon designs—match with Triune’s and have our products become instrumental in meeting their energy optimization goals.”
F3D was chosen for providing nanometer and Analog Mixed Signal (A/MS) design accuracy and R3D for its ability to improve the reliability and efficiency of semiconductor power devices.
The technology in Silicon Frontline’s products is a combination of a rigorous 3D extraction method with a highly efficient 3D geometric engine yielding significant performance improvement and handling additional issues such as thickness variation due to CMP, width variation due to optical and other manufacturing effects. The software generates a fully annotated SPICE netlist with parasitics for use by downstream tools. It is used by CAD, TCAD and post-layout verification engineers.
F3D is ideally suited for sensitive analog and A/MS circuits where coupling is a challenge – ADCs, DACs, circuits with differential signals, MIM/MOMCaps and 3D devices, image sensors, RF and high speed designs and for circuits manufactured at advanced technology nodes, such as 65, 40 and 32nm. (Note: It has value in 90nm to 350nm nodes as well).
R3D target applications include discrete or embedded power devices, where efficiency and reliability are important, as well as designs requiring analysis of large metal interconnects.