CUPERTINO, USA: Interra Systems, a leading provider of software building blocks for the electronic design automation industry, announced integration of its Spice Analyzer as front-end for Variation Designer Platform from Solido Design Automation, a developer of process variation solutions for transistor-level designs.
Solido’s Variation Designer is specifically developed to address variation challenges at the transistor level to account for global, local, environmental and proximity related variation effects. It utilizes Spice analyzer from Interra Systems to parse, elaborate and access transistor-level design information that serves as the front-end for the overall system.
Spice analyzer from Interra Systems is architected to provide a common platform for analyzing various Spice variants. Input transistor-level design information can be accessed and edited by available C++ or Python interface of the analyzer for quick integration with user application. Spice analyzer functionality includes parsing industry standard spice variations with full semantic checks, customizable flattening, parasitic removal and parameter elaboration.
"We chose Spice analyzer from Interra Systems after careful analysis of all available options”, said Amit Gupta, Founder and CEO of Solido Design Automation. “Interra’s Spice analyzer has enabled our development team to deploy Variation Designer with higher quality in less time. We are especially satisfied with the responsive support from Interra Systems”
“The Variation Designer solution provides an efficient way for chip designers to analyze, identify and fix the effects of process variations on their designs. It provides automatic capabilities to analyze and identify process variation-related failures”, comments Sunil Jain, CEO of Interra Systems. “It gives us great pride to be part of a solution that achieves better designs with reduced variation risk in less time”.
Interra Systems has a production-proven background in developing front-end language analyzers. Interra also markets analyzers for Verilog, SystemVerilog, VHDL, UPF, CPF and several other EDA standards. These analyzers are widely used by EDA tool developers as a universal front-end to their design solutions.
Standard compliant and easy to use building blocks from Interra Systems enable users to reduce time-to-market by saving a significant amount of development time. Products from Interra Systems are used by over 40 EDA and SoC companies, including Mentor, Cadence, Synopsys, Eve, Panasonic, Cisco and TI.
Wednesday, March 10, 2010
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