Virage Logic sees strong adoption of 40nm IP product portfolio

FREMONT, USA: Virage Logic Corp. announced that since being named TSMC’s 40nm early development partner in 2007, the company has seen strong adoption of its extensive 40nm product portfolio.

Comprising embedded SRAMS, embedded memory test and repair, logic libraries, and memory development software, the Company’s silicon-proven 40nm product offering has been designed to optimize area, performance, power and yield.

Today, more than 10 customers rely on Virage Logic’s 40nm product portfolio to design more efficient chips more quickly and with less risk as they develop products for such end markets as graphics, consumer, enterprise, networking, wireless, and handheld.

“Virage Logic has a long, proven track record of being first-to-market at the advanced process technologies and with our extensive 40nm product portfolio, we are proud to offer our customers a competitive advantage at this advanced process node,” said Brani Buric, Virage Logic’s executive vice president, marketing and sales.

“Our SiWare Memory and SiWare Logic products provide designers with a comprehensive dashboard of options for the flexibility needed to efficiently manage design tradeoffs and meet customers’ specific requirements. For example, this dashboard enables our customers to achieve up to a 90% power savings in 40nm G and LP process nodes.

“Our STAR Memory System embedded test and repair offering extends the value we can deliver by enabling customers to dramatically ramp to volume at advanced nodes such as 40nm,” he said. “Finally, our product portfolio is supported by a range of engagement models to best meet the requirements of our fabless, integrated device manufacturer (IDM) and foundry customers.”

“TSMC selected Virage Logic as an early development partner at 40nm as a continuation of our collaboration in technologies ranging from 250nm to 40nm. Virage Logic and TSMC work closely to qualify IP through both Virage Logic’s procedures and TSMC’s procedures including silicon validation of these advanced technology IP solutions,” said Dan Kochpatcharin, deputy director, IP Portfolio Marketing at TSMC.

“These extensive silicon quality report results are available to designers of advanced SoCs for review when choosing Virage Logic’s broad IP portfolio on TSMC’s 40nm process.”