Virage Logic extends IP technology leadership to 32/28nm process

Design Automation Conference 2009, SAN FRANCISCO, USA: Virage Logic Corporation (NASDAQ:VIRL), the semiconductor industry's trusted IP partner, today announced it has extended its advanced IP technology leadership to the 32/28-nanometer process node with the tape out of a product test chip with multiple IPs optimized for a high performance application for an early adopter customer.

The product test chip has advanced power management and at-speed test capabilities to address the power and yield challenges of 32/28nm and smaller geometries. In addition to the product test chip, Virage Logic has also taped out multiple 32nm test chips at leading foundries.

Because of Virage Logic’s proven track record of success at the 40nm process technology that includes multiple customers in production, the early adopter customer selected Virage Logic to leverage the power management capabilities of the SiWare memory compilers and advanced embedded memory test and repair capabilities of the STAR memory system for its first 32/28nm chip.

“Every new process node brings new manufacturing challenges that can impact overall design schedules and time to yield. At the advanced process nodes such as 32/28nm, the industry’s leaders will carefully select partners that enable them to proceed with confidence,” said Brani Buric, executive vice president of marketing and sales at Virage Logic.

“With more than ten 40nm customers, Virage Logic has once again proven that it has the technology leadership and know-how to provide its customers with early access to IP that meets their SoC design performance, cost and yield/ramp to volume goals.”