BANGALORE, INDIA: Magma Design Automation Inc. announced that Quartz DRC and Quartz LVS now support TSMC’s interoperable design rule check (iDRC) and layout-versus-schematic (iLVS).
With the two unified electronic design automation (EDA) data formats and scalable Quartz physical verification solution, Magma and TSMC are working to make their mutual customers’ adoption of TSMC’s 40nm process technology faster, easier and less costly.
"TSMC has taken a leadership role in defining an interoperable, common language for all DRC and LVS tools," said ST Juang, senior director of Design Infrastructure Marketing at TSMC.
“The unified iDRC and iLVS files eliminate the need to develop and maintain multiple custom runsets, improve data accuracy and consistency, and enables designers to choose the EDA tool that best meets their requirements. Ultimately, our customers can adopt our advanced process technologies early for their designs.”
Quartz DRC and Quartz LVS are architected to process integrated circuit (IC) designs of any size, at any technology node, in the least amount of time. Magma's is the first truly scalable physical verification solution, able to provide turnaround time that is up to an order of magnitude faster than existing solutions by leveraging existing compute resources.
The Quartz tools are fully compatible with third-party IC implementation flows and can read file formats used by traditional physical verification tools.
“The scalable architecture of Quartz DRC and Quartz LVS was designed specifically to provide fast, efficient physical verification of large, complex designs,” said Anirudh Devgan, general manager of Magma’s Custom Design Business Unit.
“That scalability and native support for the Tcl procedural language used by the TSMC iDRC and iLVS formats make Quartz DRC and Quartz LVS the ideal solution for designs targeting TSMC’s processes.”
Thursday, July 30, 2009
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