XMOS uses Magma Talus 1.1 for XS1-L1 event driven processor

SAN JOSE, USA: Magma Design Automation Inc. announced that XMOS, the leader in event driven processors, taped out its recently announced XS1-L1 XCore using the Talus 1.1 IC implementation system. XMOS upgraded to the latest version of the Magma software after early testing showed improvements in the closure of their XCore processor design.

"We benchmarked an early release of Talus 1.1 during the XS1 development program," said Mark Lippett, vice president of engineering at XMOS. "Improvements in the routing algorithms led us to migrate to the Talus 1.1 release for our production tapeout."

The XS1-L family provides embedded software developers with an energy-efficient, scalable, multi-core solution. It enables complete systems that combine interface, DSP and control functions to be built entirely in software.

Each XS1-L XCore contains a 32-bit processor and operates up to 400MIPS. XCore power consumption is below 500 microwatts in sleep mode and 20 milliwatts in standby with active power adding under 450 microwatts/MHz.

The event-driven architecture, together with XMOS' programming tools, enables XCores to switch automatically between standby and active modes, saving up to 90 percent of energy in low duty-cycle applications. The XS1-L1 is built on a 65-nanometer process. Samples are available now from www.xmos.com.

"Like XMOS, many of our other customers are implementing very complex chips and need a powerful, fast, high-quality chip design system that is also easy to use," said Premal Buch, general manager of Magma's Design Implementation Business Unit.

"Talus 1.1 features simplified flows with fewer commands and still provides improved performance, timing closure and power optimization. XMOS' ability to deploy Talus 1.1 quickly to meet their design requirements demonstrates the advantages of Magma's COre technology."