Synopsys, Mentor, CoWare join ARM Fast Models Enablement Program

CAMBRIDGE, UK: ARM announced at DAC, San Francisco, that CoWare, Mentor Graphics and Synopsys Inc. have joined the ARM Fast Models Enablement Program.

Members of the Program are able to integrate fully validated Fast Models from ARM, for a range of ARM processors, into their virtual platform environments and deliver to their customers.

This ensures that mutual customers can create complete ARM Powered virtual platforms using the design flow of their choice. By using virtual platforms built around ARM processor Fast Models, engineers can develop software well in advance of final hardware implementation, with application and driver software running at near to real-time system performance.

The Fast Models product family from ARM includes programmer's view (PV) models for the ARM9, ARM11 and Cortex families of processors, including the Cortex-A9 MPCore multicore processor. The Fast Model products also include configuration tools that enable the export of ARM processor-based subsystems with OSCI SystemC and TLM-2.0 compliant interfaces.

"We are seeing a growing demand for high-performance models in the industry," said John Cornish, EVP and general manager, System Design Division, ARM. "The TLM-2.0 interface enables our customers to combine our processor Fast Models with models of their other IP to create complete virtual platforms in the design environment of their choice."

"CoWare has successfully delivered Electronic System Virtualization solutions for ARM processor-based designs for many years supporting architecture design, verification, software development, integration and test. With our further engagement in this broader program covering the ARM Cortex Fast Models, we continue to expand this position to serve the growing needs of our joint customers," said Marc Serughetti, vice president of Marketing and Business Development at CoWare Inc.

"This integration and partnership is already proven and in use at several customers resulting in significant time-to-market benefits for those customers."

"Mentor’s Vista technology offers a comprehensive architecture design and prototyping solution that relies on fast processor and peripheral models as an essential part of the solution. The integration of the architecturally accurate ARM Fast Models into our Vista Platform will deliver significant value to our mutual customers," said Simon Bloch, Mentor Graphics vice president and general manager, design and synthesis division.

"In addition, ARM’s Fast Models are compatible with Vista’s TLM scalable modeling methodology that provides the timing and power layers essential for optimizing performance and power at the transaction level of abstraction."

"As a leading IP provider, Synopsys already provides OSCI TLM-2.0 compliant transaction-level models for several processor families including ARM and Synopsys DesignWare Cores and components for SoC infrastructure, AMBA interconnect, CoreConnect and PrimeCell peripherals in the Synopsys DesignWare System-level Library," said Frank Schirrmeister, director product marketing for the Solutions Group at Synopsys.

"The ARM PV Enablement Program allows our users to draw from a larger number of models and enables Synopsys to validate interoperability of Synopsys’ Innovator development environment for virtual platforms with ARM processor-based subsystems using Fast Models from ARM."

Availability
Fast Models Version 5.0 including the SystemC/TLM-2.0 compatible export capability is available for immediate licensing from ARM. 45-day evaluations are available through the Program members in concert with their respective integrated solutions through the PV Enablement Program.