Ricoh joins Power Forward Initiative

SAN JOSE, USA: Cadence Design Systems Inc. announced that Ricoh Co. Ltd has joined the Power Forward Initiative after completing two complex power management system-on-chip (SoC) designs using the Cadence Low-Power Solution.

As a result of this success, Ricoh is driving the use of the Common Power Format (CPF)-enabled low-power methodology. Membership in the Power Forward Initiative also enables Ricoh to contribute directly to the improvement of low-power design technology.

“The complexity of our chip designs, and the associated market requirements, demand that we use the best technologies and methodologies available,” said Fumiaki Kadowaki, manager of the CAD Engineering Section, Imaging System LSI Development Center, Electronic Devices Company at Ricoh.

“The completeness of the Cadence automated solution for designing power shut-off and multiple supply/multiple power domains provided productivity benefits and greatly reduced risk versus traditional approaches.”

The Cadence Low-Power Solution enables power shut-off simulation using the Incisive® Enterprise Simulator; automated power shut-off and multi-supply voltage synthesis using Encounter RTL Compiler global synthesis; and comprehensive verification using the Encounter Conformal Low Power solution.

In addition, the Encounter Digital Implementation System offers a comprehensive floorplanning, prototyping, placement, routing and sign-off solution for challenging low-power designs. The low-power design methodology leverages the Common Power Format to enable a single, golden specification for low-power design intent to drive both the design and verification processes.

“We’re happy to see both new tapeout successes for Ricoh and for the Cadence Low-Power Solution,” said Chi-Ping Hsu, senior vice president of research and development for the implementation group at Cadence. “By joining the Power Forward Initiative, Ricoh exemplifies the advancement of systems companies involvement in this important low-power ecosystem.”