TSMC intros Mentor's new Calibre versions using interoperable iDRC and iLVS formats

WILSONVILLE, USA: Mentor Graphics Corp. announced that its Calibre nmDRC and nmLVS offerings now support the interoperable iDRC and iLVS formats introduced by TSMC.

TSMC and Mentor Graphics collaborated on these vendor-neutral formats for describing physical verification and layout vs. schematic (LVS) checks. The iDRC and iLVS syntaxes make it possible for TSMC and its customers to create verification decks that will work with Mentor’s Calibre nmDRC and nmLVS offerings or other verification products that support the specification. Mentor will optimize the underlying implementation of iDRC/iLVS to deliver optimum performance to end users.

The iDRC and iLVS specifications are based on the open source TCL language extended with specialized functions for verification. It has been validated on the Calibre platform for 40nm designs manufactured at TSMC, and will be rolled out as part of the TSMC reference flow for 28nm designs.

“The TSMC iDRC ands iLVS formats benefit both TSMC and its customers by making it possible to define and customize complex verification rules for each of our processes that can in turn drive verification tools from any supporting vendor,” said ST Juang, senior director of Design Infrastructure Marketing at TSMC.

“This enables us and our customers to easily adapt design rules to new requirements or special situations without worrying about tuning and testing for different tool flows. We’ve worked closely with Mentor on the architecture and syntax of iDRC and iLVS and have completed first validation on the Calibre tool suite as our lead physical verification platform.”

“Our collaboration with TSMC on the definition of iDRC and iLVS helps our mutual customers realize the best possible performance from Calibre products,” said Joseph Sawicki, vice president and general manager for the Design-to-Silicon division at Mentor Graphics.

“With this collaboration, TSMC ensures their design guidelines are delivered in a consistent manner to all qualified vendors, and Mentor can use its proprietary technology to continue delivering industry-leading verification platforms with the fastest and most efficient underlying code possible.”

The Calibre implementation of iDRC and iLVS converts iDRC decks into highly tuned native Calibre SVRF calls for optimum runtime performance. It also includes an interactive TCL debugger with breakpoints and variable monitors integrated with a layout debugger, which is part of the Calibre Results Viewing Environment (RVE), and a special in-line SVRF viewer.

The Calibre implementation of iDRC is currently being evaluated at selected TSMC and Mentor customer sites. General availability is expected at the end of 2009.