Foundries play semiconductor survivor in 2010

EL SEGUNDO, USA: Although the global semiconductor foundry market is set to make a welcome return to growth in 2010 after a terrible 2009, the recent downturn is likely to thin the ranks of the top-tier pure-play suppliers down to just three major players in the future, according to iSuppli Corp.Source: iSuppli, Oct. 2009

Global pure-play foundry revenue is set to rise to $21.6 billion in 2010, up an impressive 21 percent from $17.8 billion in 2009. This follows a disastrous 10.9 percent plunge in 2009. The foundry market in 2010 will outperform the overall semiconductor industry, which will expand by 13.8 percent.

“The year 2009 is likely to be one that pure-play foundries would love to forget and will make them long for 2010,” said Len Jelinek, director and chief analyst for semiconductor manufacturing at iSuppli. “However, next year is likely to bring a new set of challenges, as the rising cost of competition winnows down the number of players in the market.

The expense of developing and implementing next-generation processes for a variety of technologies is rising rapidly. The only way to be a leader and outperform the market is to stay at the cutting edge of semiconductor process development. Only companies with sufficient size can support these costs.”

In the past, some foundries have found success by focusing on low-cost manufacturing, trailing behind the process migrations of the most advanced players, Jelinek noted. However, this so-called “fast-follower” strategy no longer is a route to success amid slowing market success. In fact, the fast-follower strategy now serves only as a route to the fringes of the semiconductor manufacturing business.

Acquired taste
The landscape of the foundry industry is being permanently reshaped by a wave of acquisitions and mergers.

Among these acquisitions is the pending merger between Hua Hong NEC and Grace Semiconductor. This will significantly reshape China’s foundry industry. In another example, Tower Semiconductor Ltd. in 2008 purchased Jazz Semiconductor Inc. However, these moves only presage what is expected to be a spate of mergers and acquisitions in 2009.

The proposed acquisition of HeJian Technologies by Taiwan’s United Microelectronics Corp. (UMC) will further consolidate the Chinese foundry market. It likely also will put UMC back into the No.-2 position among global pure-plays, a position it lost to GlobalFoundries Inc. this year.

GlobalFoundries made a deal for Chartered Semiconductor just a few weeks ago to gain that company’s core competencies along with its five 200mm fabs and one 300mm facility. The move also catapulted the pure-play into the No.-2 position among foundries. Looking ahead, Semiconductor Manufacturing International Corp. (SMIC) very well may acquire Cension Semiconductor Manufacturing International and Wuhan Xinxin Semiconductor Manufacturing Corp., two companies it is managing.

Small foundries Silterra, Altis and Landshunt all are struggling, and thus have become the subject of speculation regarding a merger with another manufacturer. When this consolidation process concludes, it’s likely that only three top-tier players will be left.

Silver linings
Indeed, the year 2009 is one that the foundry market won’t look back upon at fondly. However, that isn’t to say that some positives are not emerging during the course of the year.

Specifically, technology continues to develop and to gain more clients for the pure-play foundry suppliers as Integrated Design Manufacturers (IDMs) expand their proven asset-light programs.

Innovation continues to advance in both end-product design and manufacturing technology. As consumers return to stores, this innovation likely will result in new and different products on the shelves, helping to sustain some semblance of recovery, even if it is delayed into 2010.

Magma broadens support for TSMC processes

SAN JOSE, USA: Magma Design Automation Inc. announced that Quartz DRC and Quartz LVS rule decks are available for TSMC 180-nanometer (nm) process technologies. With this addition, designers can now download 40-nm, 65-nm, 90-nm, 130-nm and 180-nm rule decks for Quartz DRC and Quartz LVS from the TSMC-Online website.

"We have been working with Magma's Quartz DRC and Quartz LVS for advanced process nodes for several years, and have tested their accuracy using the same rigorous testing procedures we use for all DRC and LVS tools," said Tom Quan, deputy director of Design Service Marketing at TSMC. "In response to customer demand, we have now expanded support for Quartz DRC and Quartz LVS to include 180 nm."

Quartz DRC and Quartz LVS are architected to process integrated circuit (IC) designs of any size, at any technology node, in the least amount of time. Magma's is the first truly scalable physical verification solution, able to provide turnaround time that is up to an order of magnitude faster than existing solutions.

The Quartz tools are fully compatible with third-party IC implementation flows and can read file formats used by traditional physical verification tools.

"TSMC has been a key foundry partner with Magma, and our mutual customers have used Quartz physical verification solutions to tape out some of the largest, most aggressive designs in the world," said Anirudh Devgan, general manager of Magma's Custom Design Business Unit.

"Many ICs are still being implemented in lower-cost 180-nm processes. Now that TSMC has made 180-nm rule decks available, more designers will be able to leverage the speed and accuracy of Quartz DRC and Quartz LVS."

Applied Micro-TSMC bring Power Architecture MPUs to TSMC technology platforms

SUNNYVALE, USA: Applied Micro Circuits Corp., a global leader in energy conscious computing and communications solutions, and Taiwan Semiconductor Manufacturing Co. announced a collaboration enabling AppliedMicro’'s Power Architecture microprocessors to be manufactured on TSMC’s industry-leading technology platform first at 90nm then moving to 65nm and 40nm soon after.

The agreement signals the first time that Applied Micro'’s embedded microprocessors are available beyond complex and costly Silicon-on-Insulator (SOI) fabrication processes. The first product of this collaboration, the Applied Micro APM 83290 processor, operates at 1.5GHz which represents the highest performance for a Power Architecture processor manufactured on bulk CMOS technology, thus highlighting the benefits of successful technology partnership with TSMC.

“The collaboration with TSMC marks an entirely new milestone for Power Architecture processing as it enables us to reach many low-cost application areas that were impractical for processors built in SOI technology,” said Robert Fanfelle, Associate Vice President of Strategic Marketing for Applied Micro. “TSMC’'s 90nm CMOS technology is stable and mature and it offers an unbeatable combination of performance and price flexibility for a new generation of embedded computing applications.”

“TSMC values the collaboration with Applied Micro because by pooling our strengths it signals a new wave of innovation for both companies,” said Pan-Wei Lai, Vice President of Business Development at TSMC North America. “Power Architecture technology is highly versatile and adaptable for a wide variety of embedded applications and AppliedMicro’'s plans for new processor designs promise to extend the relationship between our two companies as we explore ways to bring about improvements on TSMC’s advanced technology platforms.”

Applied Micro Power Architecture processor families have forged market leadership positions in wireless access points, cellular base stations and multifunction printers. Moreover, the company’s expertise in communications technology and advanced peripheral development around Power Architecture cores continues to capture market share from major networking, storage and consumer OEMs.

Prospective system designers can leverage an extensive ecosystem of industry-leading partners encompassing operating systems, development tools, software platforms, board-level products, and design services allowing rapid time to market product release.

“Our company’'s collaboration with TSMC heralds a new era in Power Architecture computing as it becomes more accessible for systems designers that want an excellent balance of high performance and low power consumption for today’s energy-conscious system designs,” Applied Micro'’s Fanfelle said.

“Our processor and system-on-a-chip expertise combined with TSMC’s experience and technology provide a powerful launching point for Power Architecture based solutions as we enable new classes of products and systems.”

The announcement kicks off a long-term strategic relationship between Applied Micro and TSMC designed to widen the availability of Power Architecture embedded processing across TSMC’s competitive bulk technology platform. The move extends Applied Micro’'s energy efficient product emphasis leadership by leveraging the benefits of TSMC’s high-performance, low-power processes.

TSMC, ASE complete world’s first IC product category rule

HSINCHU, TAIWAN: Taiwan Semiconductor Manufacturing Co. Ltd and Advanced Semiconductor Engineering Inc. recently announced that the two companies have
collaborated to complete the world’s first Integrated Circuit Product Category Rule (IC PCR).

This IC PCR follows ISO 14025 standards, and addresses the unique nature of semiconductor manufacturing. It was compiled based on input from major semiconductor companies around the world.

The content of the IC PCR covers energy and water consumption, pollutant production, waste production, air pollution, carbon footprint, and other factors. It can act as a reference for global semiconductor companies when completing an Environmental Product Declaration Type III (EPD), and also support the global electronics supply chain in meeting requirements from Wal-Mart, the world’s largest retailer, for all suppliers to provide eco-labelling within five years.

In order to fulfill their social responsibility for protecting the environment and to meet future demand from consumers for environmental labels and carbon footprint disclosure, TSMC and ASE began working on the IC PCR last year, voluntarily participating in a special project of the Ministry of Economic Affairs Department of Industrial Technology, and with guidance from the Industrial Technology Research Institute Energy and Environment Research Laboratories.

TSMC and ASE convened two international consultative meetings this year to gather the opinions of the domestic semiconductor industry, raw materials suppliers, and the US and European semiconductor industry associations.

The resulting IC PCR was certified by the Environment and Development Foundation, the only organization in Taiwan authorized by the Global Type III Environmental Product Declarations Network (GEDnet). The IC PCR is posted on the GEDnet website (http://www.gednet.org/). TSMC and ASE will hold regular discussions with domestic and international semiconductor firms, and make ongoing revisions to the IC PCR to meet evolving needs of the industry and the environment.

There are currently three types of environmental product declarations. A Type III declaration follows ISO14025 rules and is based on a product life cycle study, making a complete disclosure of a product’s environmental impact and carbon footprint.

Setting a product category rule (PCR) is a necessary first step in establishing environmental product labels and environmental footprint disclosure. Several hundred products from Europe, Japan, and Korea have already completed environmental product declarations.

“Product eco-labeling is an inevitable environmental trend, and we expect that most manufacturers around the world will be actively preparing environmental product labels to serve as a reference for consumers,” said Dr. Stephen Tso, TSMC Senior Vice President and Chief Information Officer.

“The IC PCR completed by TSMC and ASE can not only help semiconductor companies make Type III Environmental Product Declarations, it can also serve as a reference for carbon footprint declarations to meet the needs of customers and consumers. TSMC will continue to do its part to protect the environment,” Dr. Tso said.

“Society is growing more environmentally conscious as the global warming issue intensifies, and consumers now consider not just quality and price when buying a product, but also its impact on the environment. We are pleased to see this growing trend in green consumerism,” said Raymond Lo, General Manger of Kaohsiung, ASE Group.

“As leaders in the semiconductor industry, ASE and TSMC are focused on developing solutions for green products, and this collaboration to set the world’s first IC PCR is part of our corporate social responsibility to help address global environmental concerns. Protecting our ecosystems and the world around us is a responsibility we take seriously, and we will continue to improve and operate in a sustainable fashion.”

Mentor Graphics provides comprehensive low power solution in TSMC Reference Flow 10.0

WILSONVILLE, USA: Mentor Graphics Corp. announced that its low power RTL-to-GDSII tool flow has been included in Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC) Reference Flow 10.0. TSMC and Mentor worked together nearly a year to validate and deliver a robust set of tools with proven support for the Unified Power Format (UPF).

“In addition to expanding the Mentor reference flow to add both functional verification and implementation technologies, Mentor is addressing new challenges such as low power,” said S.T. Juang, senior director of Design Infrastructure Marketing at TSMC.

The Mentor low power track includes the 0-In CDC, Questa, FormalPro, Olympus-SoC and TestKompress tools.

The 0-In CDC tool provides a three-fold verification approach for clock domain crossings, checking for appropriate synchronization through structural analysis, protocol verification, and accurate simulation of metastability effects.

The Questa platform enables early verification and evaluation of power architectures starting with RTL, through automatic insertion of power management logic based on UPF specifications. The Questa platform provides silicon-accurate simulation of isolation and retention protocols during power down/up, non-operational bias modes, and dynamic voltage scaling, as well as static and dynamic checks for power management functional correctness that pinpoint any failures to simplify debugging.

The FormalPro tool verifies the pre- and post-routed netlists against the RTL + UPF specification from which they were derived, to ensure that retention registers, isolation buffers, and level shifters are equivalent, as well as verifying logic equivalence.

The Olympus-SoC implementation system provides true multi-corner multi-mode (MCMM) optimization of timing, power, signal integrity and die size, and MCMM clock tree synthesis and optimization. The Olympus-SoC system provides UPF hierarchical low power automation with both top-down and bottom-up flows. It also provides a completely automated, multi-voltage flow with support for Dynamic Voltage and Frequency Scaling (DVFS) handles varying supply voltages and clock frequencies, as well as special power-related cells such as level shifters, isolation cells, and MTCMOS switches.

The TestKompress ATPG tool reduces power dissipation during all phases of scan test using a constant-fill decompressor, which reduces unnecessary logic transitions, and power-aware control of clock gates.

“Mutual customers of Mentor and TSMC continue to push the design envelope to create complex SoCs that require adoption of advanced, low-power technologies,” said John Lenyo, Mentor Graphics functional verification division general manager. “Our collaboration with TSMC gives design teams access to a comprehensive low-power flow that addresses the low-power challenges from design inception to tapeout.”

SEMI World Fab Forecast: Predicts 64 percent growth in fab spending

SAN JOSE, USA: SEMI’s World Fab Forecast predicts 64 percent growth in fab spending for 2010 to reach $24 billion.

A large portion (about $14 billion) is expected to come from six companies that have announced ambitious investment plans.

The major investments will come from six companies -- TSMC, GlobalFoundries, Toshiba, Samsung, Intel and Inotera. These companies will contribute more than half of the total fab capex spending expected in 2010. The increase of 64 percent appears high, but this percentage increase is against historic lows in 2009.

Christian Dieseldorff, senior analyst at SEMI, noted “Worldwide installed capacity is expected to decline by 2-3 percent in 2009 mainly due to the closure of 31 fabs. This overall capacity is expected to have a slow growth rate of only 4-5 percent in 2010, to about 21.5 million wafers per month (in 200 mm equivalents), and most spending in 2010 is expected to go towards upgrading fabs rather than expansion of installed capacity.”

The World Fab Forecast tracks planned projects resulting in any change of installed capacity.

SEMI World Fab Forecast report provides high-level summaries and graphs, in-depth analyses of capital expenditure, capacity, technology and products, down to the detail of each fab, and forecasts for the next 18 months by quarter. These tools are invaluable for understanding how 2009 and 2010 will look, and learning more about capex for construction projects, fab equipping, technology level, and products.

Mentor Graphics reports strong bookings in Q2

WILSONVILLE, USA: Mentor Graphics Corp. recently announced results for the fiscal second quarter 2010, ending July 31, 2009. For the quarter, the company reported revenues of $182.6 million, non-GAAP earnings per share of $.02, and a GAAP loss per share of $.22. Bookings for the quarter rose 15 percent over the prior fiscal second quarter.

“The quarter’s strong bookings performance was driven by new customers and new products. Though the business climate is still difficult, we did see strong sequential increases in consulting and distributor bookings during the quarter, both signs we take as indicators of an improving customer environment,” said Walden C. Rhines, CEO and chairman of Mentor Graphics.

“The company continues to build its strength in new markets, expanding its electronic system level design (ESL) and low-power product offerings during the quarter. Taiwan Semiconductor Manufacturing Co.'s (TSMC) inclusion of a full Mentor low-power implementation flow in their Reference Flow 10.0 further strengthens the company’s position in the physical implementation market.”

During the quarter, Mentor released a new version of its Catapult C synthesis tool enabling full chip synthesis, including control logic, and better power management. The company also released its PADS 9.0 printed circuit board flow which incorporated new collaboration, manufacturing and analysis tools.

At the Design Automation Conference (DAC) in July, Mentor advanced its full system low-power strategy by launching its VistaTM platform which enables engineers to model power early in the design cycle. Also at DAC, Mentor and its partners detailed the company’s multi-operating system, multi-core embedded system strategy featuring Linux, Android, and Nucleus operating systems.

Last Tuesday, the company closed its acquisition of LogicVision announced during the second quarter. The acquisition strengthens the company’s market-leading position in the design-for-test market by combining LogicVision’s strength in built-in-self-test (BIST) with the company’s strength in automated test pattern generation (ATPG) and embedded test pattern compression technology.

“With a tight rein on costs and the beginnings of an improving economic climate, the company performed better than we were confident to predict,” said Gregory K. Hinckley, president of Mentor Graphics. “The contract renewals we had in the quarter were at similar levels to their previous contract values, which was an improvement from the first quarter’s renewal rates. And despite acquisitions, headcount and operating expenses are down from a year ago, as the company continued to attack costs like travel, facilities and outside services.”

Outlook
For the third quarter fiscal 2010, the company expects revenue of about $183 million, non-GAAP earnings per share of about $.01 and a GAAP loss per share of about $.19.

TSMC board's resolutions -- $50mn approved for solar

HSINCHU, TAIWAN: TSMC held a meeting of the Board of Directors, which passed the following resolutions:
1. Appointed L.C. Tu as Vice President of Human Resources; Transferred P.H. Chang to serve as Vice President of Materials Management and Risk Management.

2. Approved capital appropriations of $1,116.8 million to expand 45nm process capacity and install 32nm process capacity.

3. Approved the appropriation of $50 million for possible use in investment in solar energy-related areas.

4. Approved semi-annual financial statements for the first half of 2009. Consolidated revenue for the January-June period was NT$113.712 billion, and net income was NT$25.933 billion.

TSMC's July 2009 net sales rises 17.5 percent

HSINCHU, TAIWAN: TSMC announced its net sales for July 2009: on an unconsolidated basis, net sales were approximately NT$30.28 billion, an increase of 17.5 percent over June 2009 and a decrease of 1.9 percent from July 2008.

However, revenues for January through July 2009 totaled NT$139.84 billion, a decrease of 30.7 percent compared to the same period in 2008.

On a consolidated basis, net sales for July 2009 were approximately NT$ 31.17 billion, an increase of 17.6 percent over June 2009 and a decrease of 2.0 percent from July 2008.

Revenues for January through July 2009 totaled NT$144.89 billion, a decrease of 30.2 percent compared to the same period in 2008.

"Billion-Dollar Club" members for capex reduced to three in 2009

USA: The number of companies expected to spend at least $1 billion on semiconductor capital equipment is forecast to fall to its lowest number in more than 10 years in 2009, according to IC Insights' recently released Mid-Year Update to The McClean Report.

Only three companies, Intel, Samsung, and TSMC, are expected to have capital outlays exceeding $1.0 billion in 2009, down from eight companies in 2008, and 16 companies in 2007 (Figure 1). As shown in the figure, these three companies alone have been part of the "Billion-Dollar Club" every year since 2000.Source: IC Insights

As shown, the billion-dollar spenders accounted for a record-high 74 percent of worldwide semiconductor industry capital expenditures in 2007. This figure fell to 56 percent in 2008 and is likely to drop to 43 percent in 2009.

While only three companies are expected to spend $1.0 billion or more on capex in 2009, they will represent a very significant amount of the total worldwide semiconductor industry capital spending for the year.

The average amount of capex spent by companies on the billion-dollar club list is forecast to be $3.84 billion in 2009, up 28 percent from $3.01 billion in 2008. Intel ($4.7 billion) and Samsung ($4.5 billion) will spend significantly more than the average, while TSMC has budgeted $2.3 billion.

Intel (-10 percent) and Samsung (-33 percent) are forecast to spend less than they did in 2008, while TSMC's planned capex is up 23 percent from its 2008 spending level.

Capital spending as a percent of semiconductor sales reached a record low of 16 percent in 2008. With only three companies dedicating $1.0 billion or more for capital equipment in 2009, this ratio is forecast to move even lower, to only about 12 percent this year!

As described in the Mid-Year Update, IC Insights believes that these record low capital spending as a percent of sales ratios will lead to much stronger IC average selling prices (ASPs) beginning in 2010 and extending through 2012.

Source: IC Insights

IDT, TSMC enter product fabrication agreement

SAN JOSE, USA & HSINCHU, TAIWAN: IDT (Integrated Device Technology Inc.), a leading provider of essential mixed signal semiconductor solutions that enrich the digital media experience and Taiwan Semiconductor Manufacturing Co. (TSMC) have entered into an agreement to transfer product fabrication processes and related activities currently running in the IDT Hillsboro, Oregon facility to TSMC foundries.

The transfer, which has already received approval by both companies and the IDT Board of Directors, is expected to take up to two years to complete and will cover the lifecycle of all products involved.

“Over the past year or so, IDT has been shifting gears towards developing application specific solutions for the communications, computing and consumer markets. Obtaining an agreement with TSMC enables us to take full advantage of their cutting edge manufacturing processes and geometries and is the logical next step in our transformation,” said Mike Hunter, vice president of worldwide manufacturing for IDT.

“This agreement, which will combine IDT system expertise and architecture and the TSMC technology platform, expands our overall global manufacturing capability. It also officially starts the countdown for IDT to move from a Fab-lite to a Fab-less model.”

“The Fab-less model enables IDT to focus our resources and investments on innovative new product development where we can leverage our core strengths in definition and design differentiation, while outsourcing manufacturing to the industry leader,” said Ted Tewksbury, President and CEO of IDT.

“This initiative is a key enabler of our mixed signal strategy as IDT’s products transition to more advanced process technologies supporting higher levels of speed, complexity and integration.”

“TSMC remains committed to providing a full suite of foundry services to customers, enabling them to deliver market-leading solutions not only in advanced technologies but also in mature technologies,” said Dr. C.C. Wei, senior vice president, Mainstream Technology Business, TSMC. “This announcement reflects our commitment to providing IDT with robust process technologies as they transition to a Fab-less business model.”

IDT product processes and geometries transferred under this agreement include existing IDT products currently manufactured at the Fab 4 facility in Hillsboro, Oregon at .13 micron process technology and above. These processes and products will be transferred to TSMC over the ensuing two years.

The agreement does not include transfer or sale of the process equipment or the IDT facility located in Hillsboro, Oregon. IDT intends to exit the Hillsboro, Oregon wafer fabrication facility at the end of the transfer period and has engaged a third party to market the facility to potential buyers that can continue fabrication operations.

“IDT has long been a valued customer with TSMC,” said Rick Cassidy, president, TSMC North America. “We will work with them step-by-step to ensure a seamless transition and appreciate their confidence in TSMC by making this strategic decision.”

Top 20 semicon rankings Q2-09 -- TSMC climbs up, AMD slips down!

Very interesting, isn't it? And I am not surprised! TSMC deserves to move up the top 20 semiconductor companies rankings!! It seems that AMD especially needs to really get its act together.

First, to the rankings. Recently, IC Insights released the list of the top 20 semiconductor sales leaders during Q2-09.Source: IC Insights

In this list, there are four fabless semiconductor companies -- Qualcomm, Broadcom, MediaTek and Nvidia in the top 20, and one foundry -- TSMC, perhaps, emphasizing the growing influence of TSMC as well as the fabless semiconductor companies.

AMD slips! Again?
I had written a couple of posts some time back on AMD and Intel, where the former had commented on the EC ruling on Intel, and also how both were at each other's throats, and had asked the question -- how will all of this help the market?

Well, one hopes that AMD will come back very much stronger in the next quarter, despite its uninspiring guidance for 3Q09, saying that it expects its sales to be "up slightly" from 2Q09.

TSMC, Hynix, MediaTek shine
Coming back to the table, the clear movers are TSMC, and no surprises there, as well as Hynix and MediaTek. In fact, with a little better Q3 performance, TSMC could well move up to the third position, overtaking both Texas Instruments and Toshiba.

Look at the last column -- the 2Q09/1Q09 percentage change -- TSMC has grown by a whopping 93 percent! One other thing! TSMC is reportedly eyeing business opportunities in solar photovoltaics and LEDs in a bid to diversify its revenue channels. Should these happen, expect TSMC to move up higher!

The closest to TSMC in terms of growth are Hynix at 40 percent and Qualcomm at 36 percent, respectively. MediaTek, another impressive mover, grew by 20 percent. Of course, there is Samsung as well, with 29 percent growth.

ST, Micron, Nvidia and NXP have done well too! According to IC Insights, Nvidia replaced Fujitsu in the Q2-09 top 20 rankings. And that brings us to the shakers or those who fared poorly.

Fujitsu, AMD, Freescale slide!
I've already touched upon AMD. Fujitsu cited flash memory and automotive device sales to have suffered immensely this quarter. However, it hopes Q3 will be better and said that customer demand was picking up. So, it could well be back in the Top 20 during Q3.

Yet another slip was in store for Freescale. It slipped from 16th position in 2008 to 18th position during Q1-09, and slid further to 20th position in Q2-09. Perhaps, overdependance on automotives has been its undoing.

An interesting statistic from IC Insights -- Fujitsu, with -9 percent and Freescale, with -2 percent growth, were the only two top-20 companies from Q1-09 to register a 2Q09/1Q09 sales decline!

Wonderful industry guidance
It is heartening to see 19 of the 20 companies registering positive growth this quarter. It won't be improper here to commend IC Insights on its wonderful industry guidance!

In an IC Insights study from late December 2008, it was very vocal in advising firms to adopt a quarterly outlook! It also forecast a significant rebound in the IC market beginning in the third quarter of the year!

IC Insights also stood out by pointing out in early July that H2-09 is likely to usher in strong seasonal strength for electronic system sales, a period of IC inventory replenishment, which began in 2Q09, and positive worldwide GDP growth.

IC Insights had marked 4Q08 as the beginning of the downturn/collapse and Q1-09 as the bottom of the cycle. This quarter (Q2) has largely been a replenishment phase for the inventories. Going by that count, Q3 could well see a true seasonal increase in demand. IC Insights also said that during Q4-09, market growth will mirror the health of the worldwide economy and electronic system sales.

There is light, after all, at the end of the tunnel! Wonder why are the industry folks continue to tell each other -- we still aren't having a good time! Maybe, it is time for them to shed their pessimism and from holding back on investments, and move on to show steely optimism, and indulge in really aggressive buying and selling! After all, work and progress will happen ONLY if you work!!

Top 20 semiconductor suppliers sales surge 21 percent in 2Q09!

USA: The 2Q09 results from the top 20 semiconductor producers illustrate why IC Insights has, since the beginning of this downturn, encouraged its clients to think quarterly about 2009! As shown below, the semiconductor industry continues to move through this silicon cycle very quickly on its way to recovery.

4Q08 — The beginning of the downturn/collapse
1Q09 — The bottom of the cycle
2Q09 — Inventory replenishment phase
3Q09 — Seasonal increase in demand
4Q09 and beyond — Market growth will mirror the health of the worldwide economy and electronic system sales

Over the past few years, much has been said regarding the "maturing" of the semiconductor industry and less volatile cycles. However, IC Insights' new Mid-Year Update to The McClean Report shows that the trend toward a less volatile semiconductor market does not apply when looking at the industry on a quarterly basis.

As shown in Fig. 1, the top 20 semiconductor companies, in total, registered a 2Q09/1Q09 sales increase of 21 percent. This was a 37-point swing compared to the 1Q09/4Q08 results when these same top 20 suppliers endured a sales drop of 16 percent!Source: IC Insights

As discussed in detail in IC Insights' Mid-Year Update to The McClean Report, much of the semiconductor sales surge in 2Q09 was due to inventory replenishment after the severe cutbacks of 4Q08 and 1Q09. However, seasonal demand for electronic systems is forecast to drive 3Q09 semiconductor sales up by at least another 8 percent.

IC Insights continues to forecast a 17 percent decline for the full-year 2009 semiconductor market (the same forecast it presented in December of 2008).

Spurred by the bottoming of the worldwide economy from global recession in 1Q09, the semiconductor market is forecast to continue along its recovery path in the second half of this year and gain further momentum in 2010.

Climbers:
TSMC — As forecast by IC Insights, the world's largest IC foundry almost doubled its sales in 2Q09. In fact, all of the four major pure-play foundries (TSMC, UMC, Chartered, and SMIC) registered very strong 2Q09 sales.

TSMC is expecting another 20 percent increase in sales in 3Q09. Moreover, the company raised its 2009 capital spending budget from $1.9 billion to $2.3 billion, which is good news for the struggling semiconductor equipment suppliers. Considering that the company only spent $390 million in the first half of 2009, a huge jump in spending (to $1.9 billion) is scheduled for the second half of this year!

Hynix — One of the world's largest memory suppliers, Hynix displayed a 40 percent sales surge in 2Q09/1Q09 and replaced AMD in the top 10. The company cited rebounding average selling prices (ASPs) for both flash memory and DRAM as a key boost to its sales figures.

IC Insights expects that memory ASPs will continue to rise in the second half of 2009 and beyond as the severe cutbacks in memory capital spending and facility closures further restrict available capacity.

MediaTek — High-flying fabless IC supplier MediaTek joined the top 20 ranking by jumping six positions in 1Q09. As shown, the company moved up another two spots, to number 17, in 2Q09 with a 20 percent jump in sales.

The company continues to attribute much of its success to the "stay-at-home-economy" driving digital TV IC sales as well as continued strength in its core wireless communications business.

Descenders:
AMD — The second-largest MPU supplier in the world has continued to find that it is no fun to be in competition with the giant Intel! As shown, the company fell out of the top 10 in 2Q09 by barely growing (+0.6 percent), while Intel increased its sales by 12 percent. Moreover, AMD's guidance for 3Q09 was uninspiring, saying that it expects its sales to be "up slightly" from 2Q09.

Freescale — Freescale dropped from being ranked 16th in 2008 to 18th in 1Q09 to 20th in 2Q09 and was one of only two top-20 companies (along with Fujitsu) to register a 2Q09/1Q09 sales decline (-2 percent).

The company is in the midst of a major re-organization (eliminating its cellular phone business) and its fortunes are increasingly influenced by the health of the automotive industry.

Fujitsu — Fujitsu dropped from being ranked 17th in 1Q09 to 22nd in 2Q09 (Nvidia replaced Fujitsu in the 2Q09 top 20 ranking) as its 2Q09/1Q09 sales declined by 9 percent. The company stated that its flash memory and automotive device sales suffered the most in 2Q09.

However, Fujitsu believes that its customers' excess device inventories have now been depleted and that consumer demand is picking up.

More positive indicators for semicon equipment market

NEW TRIPOLI, USA: Expected announcements that capex was increasing are giving hope that the equipment downturn has bottomed out, according to the report “The Global Market for Equipment and Materials for IC Manufacturing,” recently published by The Information Network.

We noted in our TheStreet.com column on Tuesday that “Singapore-based foundry Chartered Semiconductor raised its 2009 capital budget forecast by a third on growing demand, and we expect similar positive activity coming from Taiwan-based foundries TSMC and UMC as they report this week.”

Well, Taiwan's United Microelectronics Corp. (UMC) reported on Wednesday that it was, in fact, raising its capex morning for CY09 from less than $400 million to $500 million. Taiwan Semiconductor Manufacturing Co (TSMC) also revised upward its 2009 capex budget to $2.3 billion. Previously, it estimated a capex of $1.9 billion for the year.

For UMC, revenue increased 108.8 percent quarter-over-quarter and wafer shipments increased 134 percent sequentially to 898 thousand in the second quarter, compared to 384 thousand 8-inch equivalent wafers shipped in the first quarter. The overall utilization rate for the quarter was 79 percent, compared to 30 percent in the previous quarter and 85 percent a year ago.

For TSMC, the world’s largest foundry, revenues for the second quarter were up 87.9 percent sequentially. TSMC recorded wafer shipments of 1.97 million 8-inch equivalent units in the second quarter, up 121 percent from 892,000 units in the first.

We stated in our TheStreet.com column last Thursday that the chip market recovery had begun, but tightened purse strings was keeping the semiconductor equipment market from exhibiting comparable up and down cycles characteristic of the semiconductor market.

We stated that “In January 1995, 11.4 percent of revenue generated by semiconductor manufacturers was spent on new processing equipment. Forward to May 2009 and only 3.8 percent of semiconductor revenue was spent on equipment.”

As shown in the chart below, up until 2001, the semiconductor and the semiconductor markets moved in tandem, exhibiting a peak and a valley every three years. After 2001, things changed –- the semiconductor market continued strong growth until late 2008 while the equipment market was essentially flat until mid-2008.Source: The Information Network

For 2009, we forecast that the semiconductor equipment market will drop 46 percent. In contrast, we forecast the semiconductor market will drop 26 percent in 2009. Most importantly, growth in the equipment market will continue through 2012, increasing 20 percent in 2010 and 49 percent in 2011.

Magma Quartz DRC and Quartz LVS support TSMC’s unified physical verification format

BANGALORE, INDIA: Magma Design Automation Inc. announced that Quartz DRC and Quartz LVS now support TSMC’s interoperable design rule check (iDRC) and layout-versus-schematic (iLVS).

With the two unified electronic design automation (EDA) data formats and scalable Quartz physical verification solution, Magma and TSMC are working to make their mutual customers’ adoption of TSMC’s 40nm process technology faster, easier and less costly.

"TSMC has taken a leadership role in defining an interoperable, common language for all DRC and LVS tools," said ST Juang, senior director of Design Infrastructure Marketing at TSMC.

“The unified iDRC and iLVS files eliminate the need to develop and maintain multiple custom runsets, improve data accuracy and consistency, and enables designers to choose the EDA tool that best meets their requirements. Ultimately, our customers can adopt our advanced process technologies early for their designs.”

Quartz DRC and Quartz LVS are architected to process integrated circuit (IC) designs of any size, at any technology node, in the least amount of time. Magma's is the first truly scalable physical verification solution, able to provide turnaround time that is up to an order of magnitude faster than existing solutions by leveraging existing compute resources.

The Quartz tools are fully compatible with third-party IC implementation flows and can read file formats used by traditional physical verification tools.

“The scalable architecture of Quartz DRC and Quartz LVS was designed specifically to provide fast, efficient physical verification of large, complex designs,” said Anirudh Devgan, general manager of Magma’s Custom Design Business Unit.

“That scalability and native support for the Tcl procedural language used by the TSMC iDRC and iLVS formats make Quartz DRC and Quartz LVS the ideal solution for designs targeting TSMC’s processes.”

ARM's ultra low-power physical IP technology for next-gen MCU devices

CAMBRIDGE, UK: ARM announces the availability of ultra low-power Physical IP libraries to drive the next generation of energy-efficient MCU devices.

The ARM 0.18µm ultra low power libraries (uLL), coupled with the inherent power management advantages of the ARM Cortex™ processor family and the TSMC 0.18µm embedded flash uLL/HDR “high data retention” process provides SoC designers with additional reduction in power leakage up to 10x compared to 0.18um G implementations.

The ARM libraries, combined with the ARM Cortex-M and Cortex-R profile processors, provide a compelling alternative to companies that are accustomed to a multiple MCU system approach.

Utilizing an advanced ultra low power, single 32-bit MCU and optimized ARM libraries for the TSMC 0.18µm uLL Embedded Flash/HDR process, designers can increase their design efficiency and lower overall system cost.

This powerful combination of physical IP, processor architecture and leading-edge manufacturing technology enables the development of enhanced 32-bit MCUs for automotive, consumer appliance, sensor, lighting, e-metering, smart control and gaming devices.

"TSMC and ARM share a mutual commitment to provide a fully optimized design and manufacturing solution for ultra low power, energy-efficient SoCs," said George Liu, director, Mainstream Technology Business at TSMC.

"ARM’'s unique ability to integrate leading-edge processor architecture and optimized physical IP for our 0.18µm uLL process provides a feature-rich solution for the power-sensitive portable device and automotive markets. This combination forms a compelling value statement for our mutual customers."

"Consumer demand for mobile and embedded devices offering higher performance, enriched user experience and extended battery life continues to increase," said Tom Lantzsch, vice president, physical IP division at ARM.

"By utilizing our 0.18µm uLL libraries and Cortex family of processors, companies can now maximize their design and energy efficiencies through a single 32-bit MCU, fully tuned with foundry-specific libraries. This powerful combination of IP accelerates the development of next generation energy-efficient embedded devices."

ARM low-power memory instances and Ultra High Density Standard Cell libraries, tuned for Cortex-M profile-based processors coupled with the ARM Power Management Kit (PMK) provides additional power saving benefits.

The PMK libraries minimize power consumption in several ways. They support dynamic operation of functional blocks at multiple voltages. The power gates and isolation cells enable a sleep mode and ensure fast wake-ups.

The libraries are equipped with data-retention flip-flops and always-on cells. Biasing cells provide connections for well back-biasing and reduce leakage even further. All the PMK libraries are designed to achieve optimal power tradeoffs.

ARM 0.18µm uLL libraries and PMK are available at ARM’s DesignStart™ IP access website, http://designstart.arm.com/. The ARM DesignStart access program offers the most comprehensive online IP library in the industry.

The DesignStart program contains more than 10,000 standard cells, memories and interconnects libraries accessible online. Several of the libraries are sponsored by the foundries and are accessible free of charge. In addition, there are industry-proven processor design kits for some of the most popular ARM processor families.

Magma's Talus included in TSMC Reference Flow 10.0

SAN JOSE, USA: Magma Design Automation Inc. announced that the Talus IC implementation system has been included in TSMC Reference Flow 10.0.

With Magma software and the latest TSMC Reference Flow, designers have access to the "Fastest Path to Silicon" for designs targeted at TSMC's 28nm processes.

"TSMC 28-nm processes offer the promise of billion-gate ICs, but also bring the challenge of dealing with more physical effects, tougher power requirements and difficult timing closure issues," said Premal Buch, general manager of Magma's Design Implementation Business Unit. "Magma's latest release, Talus 1.1 with our new COre(tm) technology, combined with TSMC's Reference Flow 10.0, provides faster design closure on large, tough designs."

COre is Magma's new Concurrent Optimizing routing engine. This new routing engine, which includes the ability to push critical wires to a thicker and wider metal layer, supports TSMC's 28-nm design rules and provides faster overall design closure with better performance and predictability.

"For years TSMC has been leveraging close collaboration with leading EDA vendors, such as Magma, to co-optimize EDA design technology and our advanced process technology," said S.T. Juang, senior director of Design Infrastructure Marketing at TSMC.

"With the inclusion of the Talus system for Reference Flow 10.0, TSMC and Magma offer mutual customers differentiated design and process technologies that improve power, performance and design for manufacturability of 28-nm ICs."

Enabling 28-nm design through Open Innovation Platform (OIP)
Through the OIP and Active Accuracy Assurance initiative, TSMC enables innovation by promoting quality and accuracy throughout the semiconductor ecosystem. Magma software has supported the OIP since the platform's inception.

Magma works closely with TSMC and mutual customers early in the process to ensure product enhancements satisfy customers' deployment requirements. By engaging with TSMC and customers early, Magma has ensured that Talus is able to implement designs targeted at TSMC's 28-nm processes.

Enhanced low-power design techniques
Low-power support in Reference Flow 10.0 has been expanded to include the bottom-up hierarchical Unified Power Format (UPF) flow. The UPF can be used to specify low-power design techniques at all levels of a hierarchical design flow.

For low-power flows with multiple voltage islands, support for disjoint power domains with dual power SRAMs is now available. To address leakage, Talus is able to optimize leakage at different corners from timing optimization. This provides more accurate timing and leakage optimization, minimizing iterations. Talus also supports the Common Power Format (CPF) as part of its low-power flow.

Ensuring manufacturability at 28nm
To address design for manufacturability (DFM) and variability issues at 28 nm, Magma integrates Talus qDRC physical verification capabilities into the Talus Vortex place-and-route flow. This solution provides highly accurate timing-driven metal fill that is design-rule clean and meets timing and performance requirements.

Other physical DFM capabilities include lithography hotspot fixing within Talus based on TSMC qualified lithography process check (LPC) hotspot detection engines. By fixing hotspots within the Talus unified design environment, area and timing penalties can be avoided and a design-rule-clean layout is generated.

For electrical DFM, TSMC provides an integrated eDFM (electrical DFM) analysis, which is a combination of DFM effects on chemical mechanical polishing (CMP), Thickness-to-Electrical (T2E), lithographic Shape-to-Electrical (S2E), and stress effects.

Talus provides complete support for TSMC's eDFM-based timing analysis and optimization.

Mentor Graphics provides support for TSMC iPDKs

WILSONVILLE, USA: Mentor Graphics Corp. announced support for the TSMC interoperable process design kit (iPDK) in the Mentor Custom IC design flow products.

This support gives companies using TSMC process technology the freedom to choose best-in-class tools such as the IC Station tool without the encumbrance of proprietary PDK files, and results in shortened design cycle times and more effective design reuse.

“The TSMC unified iPDK is designed to eliminate the need for multiple proprietary PDKs, and opens the door to greater innovations in custom, analog, mixed-signal and RF design,” said S.T. Juang, senior director of Design Infrastructure Marketing at TSMC. “Support from the EDA community has been outstanding, and we feel the collaborative nature of the work will pay huge dividends to our mutual customers.”

The TSMC iPDK is based on an Open Access database and data model, and features open standard languages for scripting and programming. It includes complete views of symbols, parameterized layout cells, callbacks and technology files. This approach ensures rapid availability of PDKs for advanced technology nodes, and allows TSMC customers more choices of design tools.

“The iPDK initiative is a great example of the industry working together in the best interest of its customers,” said Robert Hum, general manager of Mentor Graphics Deep Submicron Division. “Design kits written in proprietary languages that keep the customer captive to one vendor do not serve the industry well. Interoperability gives a customer the choice and flexibility to buy the EDA tools that best serve their business objectives.”

TSMC intros Mentor's new Calibre versions using interoperable iDRC and iLVS formats

WILSONVILLE, USA: Mentor Graphics Corp. announced that its Calibre nmDRC and nmLVS offerings now support the interoperable iDRC and iLVS formats introduced by TSMC.

TSMC and Mentor Graphics collaborated on these vendor-neutral formats for describing physical verification and layout vs. schematic (LVS) checks. The iDRC and iLVS syntaxes make it possible for TSMC and its customers to create verification decks that will work with Mentor’s Calibre nmDRC and nmLVS offerings or other verification products that support the specification. Mentor will optimize the underlying implementation of iDRC/iLVS to deliver optimum performance to end users.

The iDRC and iLVS specifications are based on the open source TCL language extended with specialized functions for verification. It has been validated on the Calibre platform for 40nm designs manufactured at TSMC, and will be rolled out as part of the TSMC reference flow for 28nm designs.

“The TSMC iDRC ands iLVS formats benefit both TSMC and its customers by making it possible to define and customize complex verification rules for each of our processes that can in turn drive verification tools from any supporting vendor,” said ST Juang, senior director of Design Infrastructure Marketing at TSMC.

“This enables us and our customers to easily adapt design rules to new requirements or special situations without worrying about tuning and testing for different tool flows. We’ve worked closely with Mentor on the architecture and syntax of iDRC and iLVS and have completed first validation on the Calibre tool suite as our lead physical verification platform.”

“Our collaboration with TSMC on the definition of iDRC and iLVS helps our mutual customers realize the best possible performance from Calibre products,” said Joseph Sawicki, vice president and general manager for the Design-to-Silicon division at Mentor Graphics.

“With this collaboration, TSMC ensures their design guidelines are delivered in a consistent manner to all qualified vendors, and Mentor can use its proprietary technology to continue delivering industry-leading verification platforms with the fastest and most efficient underlying code possible.”

The Calibre implementation of iDRC and iLVS converts iDRC decks into highly tuned native Calibre SVRF calls for optimum runtime performance. It also includes an interactive TCL debugger with breakpoints and variable monitors integrated with a layout debugger, which is part of the Calibre Results Viewing Environment (RVE), and a special in-line SVRF viewer.

The Calibre implementation of iDRC is currently being evaluated at selected TSMC and Mentor customer sites. General availability is expected at the end of 2009.

TSMC, Synopsys ally on interoperable unified physical verification formats

MOUNTAIN VIEW, USA: Synopsys Inc. announced that its recently launched IC Validator DRC/LVS product now fully supports interoperable Design Rule Checking (iDRC) and Layout-Versus-Schematic (iLVS), the new TSMC unified physical verification formats.

Synopsys was one of the first EDA suppliers to collaborate with TSMC to create and develop the unified formats, transitioning from a vendor-specific to an interoperable specification of technology files, which not only enables consistent interpretation across all tools, but also assures timely access to all Synopsys customers.

"Working with advanced node customers, TSMC and Synopsys concluded that a unified specification for Physical Verification tools was key to accelerating time to market, a primary benefit of TSMC's Open Innovation Platform," said S.T. Juang, senior director of Design Infrastructure Marketing at TSMC.

"We benefited from the close cooperation with Synopsys, using IC Validator as the development and validation platform and a catalyst for the timely introduction of these formats."

IC Validator was used from early on as one of the reference platforms for prototype development and final qualification of the unified formats. Architected to deliver the high accuracy necessary for leading-edge process nodes, superior scalability for efficient utilization of available hardware, and ease-of-use, IC Validator provides a step up in physical designer productivity.

IC Validator delivers speed-up through multicore processors by efficiently parsing iDRC/iLVS generic rules into atomic instructions suitable for highly distributed execution.

In addition, with its advanced and near linear scalar hybrid signoff engine, IC Validator provides an efficient platform for coding and validating complex polygon and edge based rules needed for emerging process nodes.

As part of the Galaxy Implementation Platform, IC Validator is an ideal add-on to IC Compiler for In-Design physical verification, enabling place and route engineers to accelerate time to tape-out and improve manufacturability by performing physical verification within the implementation flow.

It is production-ready and has been successfully used for tape-outs at leading fabless customers and chip manufacturers. Synopsys will showcase iDRC- and iLVS-enabled flows with IC Validator at the 46th Design Automation Conference in San Francisco, California.

"By eliminating qualification and consistency barriers and assuring timely access to technology files, this close collaboration between TSMC and Synopsys, with participation from other EDA vendors, clears the way for designers to easily select amongst available physical verification tools," said Bijan Kiani, vice president of product marketing, design and manufacturing products at Synopsys.

"This puts Synopsys in a strong position to efficiently bring In-Design physical verification to our common customers."