Wednesday, July 15, 2009

EVE launches one-billion gate emulator, ushers in new era for hardware-assisted verification

Design Automation Conference 2009, SAN JOSE, USA: EVE, the leader in hardware/software co-verification, ushered in a new era of hardware-assisted verification with the launch of ZeBu-Server, a scalable emulation system capable of handling up to one-billion application specific integrated circuit (ASIC) gates.

Priced at less than a penny per gate for large configurations, ZeBu-Server offers a high level of automation, short compile time, multi-user capabilities and greater execution speed than previous generations.

Its transactor catalog eases and accelerates the installation of the run-time environment. These features set a new standard in performance and affordability, making ZeBu-Server the lowest cost of emulation ownership in the industry and firmly placing EVE in the leadership position.

ZeBu-Server is suitable for all system-on-chip (SoC) verification needs across the entire development cycle, from hardware verification, hardware/software integration to embedded software validation. It can be used as a multi-user, multi-mode accelerator/emulator with a typical performance of 10 megahertz (MHz) on a 40-million gate design.

“With its best-in-class capabilities and unique benefits, ZeBu-Server is a breakthrough in emulation and acceleration,” affirms Lauro Rizzatti, EVE-USA’s general manager and vice president of marketing.

“Priced to be the most cost-effective system on the market today, it offers high-capacity, fast setup, unparalleled speed of execution and powerful design debugging. All coalesce to ease the transition from processor-based emulators and custom FPGA-based emulators.”

The ZeBu-Server compiler includes a multicore capability to break the linearity of the compile time on large designs. For example, in early tests, the ZeBu-Server software compiled a 200-million gate design in less than 10 hours, and a one-billion gate design in less than 12 hours.

ZeBu-Server offers automated, fast and incremental compilation from SystemVerilog, Verilog and VHDL register transfer level (RTL) code. As an interactive hardware/software debugging tool, ZeBu-Server includes complete RTL signal waveform dumping and support for SystemVerilog Assertions.

Eight of the top 10 semiconductor companies use ZeBu (Zero Bugs) emulation platforms in their verification flow. These platforms are used for SoC hardware verification and software development to shorten time to tapeout, improve product quality and eliminate costly respins, while shortening software development time ahead of silicon.

EVE will offer formal demonstrations of ZeBu-Server for the first time in Booth #908, South Hall at the 46th Design Automation Conference (DAC) July 27-30 at the Moscone Center in San Francisco. ZeBu-Server is shipping now, and is priced from $150,000.

No comments:

Post a Comment

Note: Only a member of this blog may post a comment.