Monday, March 5, 2012

Atrenta and TSMC IP quality initiative gains broad industry acceptance

SAN JOSE, USA: Atrenta Inc., a leading provider of SoC Realization solutions for the semiconductor and electronic systems industries, announced that 10 intellectual property (IP) providers have qualified their soft IP for inclusion in the TSMC 9000 IP library using the Atrenta IP Handoff Kit.

Those companies, part of TSMC’s Soft-IP Alliance Program, include Arteris Inc.; CEVA; Chips&Media Inc.; Digital Media Professionals Inc. (DMP); Imagination Technologies; Intrinsic-ID; MIPS Technologies; Sonics Inc.; Tensilica Inc.; and Vivante Corp. The participating companies are able to provide quantitative information to TSMC’s customers regarding the robustness and completeness of their soft or synthesizable semiconductor IP that is part of the TSMC 9000 IP library.

In May 2011, TSMC and Atrenta announced the Soft-IP Alliance Program, which uses Atrenta’s SpyGlass platform and a targeted subset of its GuideWare reference methodology to implement TSMC’s IP quality assessment program. TSMC requires all soft IP providers to reach a minimum level of completeness, as documented by Atrenta DashBoard and DataSheet reports, before their IP is listed on TSMC online.

Atrenta integrated all the software and methodologies needed to implement TSMC’s IP qualification requirements to form the IP Handoff Kit, which uses the SpyGlass register transfer level (RTL) analysis and optimization product suite. To qualify for inclusion in TSMC Online, soft IP must be verified for language syntax and semantic correctness, simulation-synthesis mismatches, electrical and connectivity rules, power consumption, synchronization of clock domain crossing paths, stuck-at and at-speed test coverage and timing constraints. All results are summarized in Atrenta DashBoard and DataSheet reports that capture the results of these SpyGlass tests in an easy-to-read and track HTML format.

“Given the complexity inherent in today’s system on chip (SoC) designs, TSMC is proactively helping our customers mitigate risk and meet their time-to-market goals,” said Suk Lee, director, Design Infrastructure Marketing Division, TSMC. “The IP qualification flow with Atrenta addresses many of the quality challenges inherent in re-using third-party IP. We are pleased with the number of IP providers that are participating in this program and the measurable improvement in delivered IP quality available for TSMC’s end customers.”

“As designers face the challenge of finding quality third-party IP, this program – a collaboration between TSMC, Atrenta and IP providers – is a powerful example of what teamwork in the supply chain can accomplish,” said Mike Gianfagna, VP of marketing at Atrenta. “TSMC customers can now make more informed decisions that improve the handoff of IP between members of the semiconductor supply chain. This is one way to drive more effective SoC Realization.”

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