Open-Silicon integrates 25 Analog Bits IP cores into complex ASIC and SoC designs

MILPITAS & MOUNTAIN VIEW, USA: Open-Silicon Inc., a leading semiconductor design and manufacturing company, and Analog Bits Inc., the integrated clocking and interface IP leader, announced that Open-Silicon has successfully integrated 25 Analog Bits IP cores into complex ASIC and SoC designs. The IP cores are silicon-proven down to 28nm and across various foundry processes, and meet Open-Silicon's stringent IP qualification requirements.

Optimized for small area and low-power, Analog Bits' PLL IP cores are well suited for Open-Silicon's key vertical market applications of networking, telecom, storage and computing. Over the past several years, Open-Silicon has also licensed TCAMs and interface IP from Analog Bits, providing customers with silicon-proven high-bandwidth solutions. In one design example, Open-Silicon and Analog Bits worked together to craft a high performance memory interface using many rows of custom Analog Bits area IO buffers, allowing the design a high bandwidth interface to external memory without consuming a lot of die periphery for the interface.

"Analog Bits has been a strong resource for Open-Silicon with its revolutionary PLLs and custom IP. Analog Bits' high-speed TCAMs and interface IP, in particular, have provided the extra bandwidth our customers require, enabling them to achieve product differentiation in the market," said Colin Baldwin, senior director of marketing, Open-Silicon.

"Open-Silicon and Analog Bits have enjoyed a successful partnership for many years, that has benefitted both companies. Analog Bits delivers the highest quality core that not only meets the demands of the market, but also meets Open-Silicon's comprehensive IP qualification process," said Mahesh Tirupattur, executive VP, Analog Bits.