Thursday, March 22, 2012

Synopsys extends leadership in storage standards verification IP with NVM Express

MOUNTAIN VIEW, USA: Synopsys Inc. announced the availability of verification IP (VIP) for Non-Volatile Memory Express (NVMe), an emerging storage protocol for connecting solid state drives (SSDs) directly to the PCI Express interface. With the addition of the NVM Express protocol to its leading serial ATA (SATA) and serial attached SCSI (SAS) verification IP, Synopsys expands its portfolio and leadership in verification IP for storage protocols.

The first-to-market release of NVMe verification IP was enabled by Synopsys' recent acquisition of ExpertIO, which brought expertise and a strong portfolio of storage-based verification IP. ExpertIO has been an active member and contributor to the NVM Express architectural committee since its inception.

"Synopsys is focused on delivering high-performance, easy-to-use, high-quality verification IP across a full spectrum of methodologies and simulators," said Craig Stoops, group director, research and development in the Synopsys Verification Group. "The addition of NVMe further expands our portfolio of verification IP and enables early NVMe adopters to use this emerging protocol to better meet their aggressive time-to-market windows."

"NVM Express is a key enabler for high-performance PCIe SSDs," said Amber Huffman, chair of the NVM Express Working Group and principal engineer of the Intel Storage Technologies Group. "The availability of verification IP for NVM Express at this stage of development will enable faster adoption of this exciting new technology. We expect to see NVM Express SSD products shipping later this year."

NVMe provides a command set, queuing layer and register interface optimized for PCI Express-based SSDs. The NVMe verification IP is a new upper-level protocol layer that can be integrated with Synopsys' industry-proven ExpertIO PCI Express verification IP.

The verification IP for NVM Express is available immediately with support for SystemVerilog and UVM on major simulators.

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