SAN JOSE, USA: EVE, a leader in hardware/software co-verification, announced that Konica Minolta Technology Center Inc., of Tokyo, Japan, has selected its ZeBu (for Zero Bugs) hardware-assisted verification platform for the design of its high-speed, high-performance large-scale integrated circuits (LSIs) used in image processing.
ZeBu was chosen after an evaluation of cost-effective, commercially available emulation platforms that could accelerate simulation of Konica Minolta’s iImage Processing LSI designs.
“We have been delighted to discover that ZeBu cut four days of RTL simulation to one and half hours in co-emulation driven by the very same Verilog test benches, practically accelerating simulation by 80 times,” says Takashi Kawabe, engineer of Architecture R&D Division, System Solution Technology R&D Laboratories at Konica Minolta Technology Center Inc.
“In a couple of months, ZeBu found several hard-to-find bugs that simulation would not have been able to pinpoint in any practical amount of time. We also valued EVE team’s effective and knowledgeable support that permitted us to keep on schedule.”
“We are delighted to be chosen by Konica Minolta and are appreciative of its diligence in conducting the evaluation,” remarks Dr. Luc Burgun, EVE’s chief executive officer and president. “We are confident that, by virtue of its fast execution, ZeBu will significantly accelerate the debugging of Konica Minolta’s designs and ultimately speed time to market of its new designs.”
Wednesday, March 31, 2010
e2v extends availability of Freescale 68K-series MPUs
GRENOBLE, FRANCE: e2v announced the long-term availability of the Freescale 68K microprocessor line by continuing manufacture for all markets following the discontinuance of these popular products by Freescale Semiconductor.
The companies have agreed that once Freescale ceases production of the 68020, 68882 and 68C000 processors, e2v’s portfolio of high-reliability grade products will be extended with commercial-grade versions in both plastic and ceramic packages.
This arrangement is based on e2v’s long-term experience in extending the availability of strategic semiconductors used in the aerospace and defense markets. These Freescale products will remain available from e2v for the next 10 years, or longer.
“As our long-term extended reliability applications partner, e2v is now serving other industries with its extended life solutions,” said June Lewis, Consumer & Industrial Business Operation Manager, Microcontrollers Group at Freescale Semiconductor. “e2v is alone in its category with the depth and breadth of products and services needed by both semiconductor companies and electronics systems OEMs. “
As a Freescale aerospace and defense partner, e2v has been licensed by Freescale to deliver high-reliability versions of their products to the aerospace, defence and other extended reliability markets, for more than 25 years.
The current arrangement allows e2v to build and sell its own products, from the 68K family to high-performance Power Architecture devices, by sourcing commercial wafers and devices from Freescale and then repackaging, screening, characterising and testing at extended temperatures. Utilising its proven, reliable wafer banking methodology, e2v will offer a comprehensive range of products for this extended period.
“We are extending our product range for a wider set of applications, where system redesign is complex,” said Thierry Gouvernel, Head of Strategic Business Development, with the Specialist Semiconductor division of e2v. “This confirms our commitment to the military-aerospace industry and extends our experience in obsolescence mitigation to other key markets.”
These products are available now. The e2v sales organisation will coordinate with its Freescale counterparts to ensure a smooth transition and continuity of supply.
The companies have agreed that once Freescale ceases production of the 68020, 68882 and 68C000 processors, e2v’s portfolio of high-reliability grade products will be extended with commercial-grade versions in both plastic and ceramic packages.
This arrangement is based on e2v’s long-term experience in extending the availability of strategic semiconductors used in the aerospace and defense markets. These Freescale products will remain available from e2v for the next 10 years, or longer.
“As our long-term extended reliability applications partner, e2v is now serving other industries with its extended life solutions,” said June Lewis, Consumer & Industrial Business Operation Manager, Microcontrollers Group at Freescale Semiconductor. “e2v is alone in its category with the depth and breadth of products and services needed by both semiconductor companies and electronics systems OEMs. “
As a Freescale aerospace and defense partner, e2v has been licensed by Freescale to deliver high-reliability versions of their products to the aerospace, defence and other extended reliability markets, for more than 25 years.
The current arrangement allows e2v to build and sell its own products, from the 68K family to high-performance Power Architecture devices, by sourcing commercial wafers and devices from Freescale and then repackaging, screening, characterising and testing at extended temperatures. Utilising its proven, reliable wafer banking methodology, e2v will offer a comprehensive range of products for this extended period.
“We are extending our product range for a wider set of applications, where system redesign is complex,” said Thierry Gouvernel, Head of Strategic Business Development, with the Specialist Semiconductor division of e2v. “This confirms our commitment to the military-aerospace industry and extends our experience in obsolescence mitigation to other key markets.”
These products are available now. The e2v sales organisation will coordinate with its Freescale counterparts to ensure a smooth transition and continuity of supply.
Legacy releases 8GB very low profile modules for server apps
SAN CLEMENTE, USA: Design engineers and system integrators now have a new very low profile option for both registered dual in-line memory modules (RDIMMs) and mini-RDIMMs. Using Legacy Electronics’ patented Multiple Device Canopy (MDC) processes, designers can increase existing module density and still maintain 2-rank capability.
“It’s every engineer’s dream to be able to add a whole new dimension to his or her design capabilities. And that’s what MDC does for us; it gives us vertical space.”
Jason Engle, president of Legacy Electronics, explained.
“Our 4Gbit MDC DRAM is functionally and electrically equivalent to a dual die package DRAM, and can be configured to provide significant cost and space savings. We are currently offering two JEDEC Standard VLP registered ECC DIMM modules using the MDC® solution: either a DDR2 8GB RDIMM or a DDR2 Mini-RDIMM. Custom MDC solutions are also available.”
Don Mecker, Legacy’s chief technology officer, added: “It’s every engineer’s dream to be able to add a whole new dimension to his or her design capabilities. And that’s what MDC® does for us; it gives us vertical space.”
The two 8GB DDR2 RDIMMs provide the 18.3 mm height low profile form factor, on either a 240-pin (RDIMM) or 244-pin (mini-RDIMM) glass epoxy substrate.
“It’s every engineer’s dream to be able to add a whole new dimension to his or her design capabilities. And that’s what MDC does for us; it gives us vertical space.”
Jason Engle, president of Legacy Electronics, explained.
“Our 4Gbit MDC DRAM is functionally and electrically equivalent to a dual die package DRAM, and can be configured to provide significant cost and space savings. We are currently offering two JEDEC Standard VLP registered ECC DIMM modules using the MDC® solution: either a DDR2 8GB RDIMM or a DDR2 Mini-RDIMM. Custom MDC solutions are also available.”
Don Mecker, Legacy’s chief technology officer, added: “It’s every engineer’s dream to be able to add a whole new dimension to his or her design capabilities. And that’s what MDC® does for us; it gives us vertical space.”
The two 8GB DDR2 RDIMMs provide the 18.3 mm height low profile form factor, on either a 240-pin (RDIMM) or 244-pin (mini-RDIMM) glass epoxy substrate.
CriticalBlue, MIPS enable software developers to quantify benefits of migrating to MIPS32-based multicore platforms
USA: CriticalBlue, a pioneer in embedded multicore software analysis, exploration and verification tools, and MIPS Technologies Inc., a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, announced enhanced and groundbreaking support for the MIPS32 architecture within CriticalBlue's Prism product.
Software developers will now be able to analyze their existing software applications and quickly assess the tangible benefits of migrating to MIPS32 multithreaded and multicore devices.
This announcement continues the deepening of Prism capabilities to enable leading multicore vendors such as MIPS Technologies to provide an ecosystem to their customers which can clearly demonstrate the differentiation of the MIPS32 architecture in the context of the customers' own software applications.
Prism is an award winning Eclipse-based embedded multicore programming system which allows software engineers to easily assess and realize the full potential of multicore processors without significant changes to their development flow.
Prism analyzes the behavior of code running on hardware development boards, virtual machines or simulators. It allows engineers to take their existing sequential code, and before making any changes, explore and analyze opportunities for concurrency. Having identified the optimal parallelization strategies in this way, developers will implement parallel structures, and use Prism again to verify efficient and thread-safe operations.
The new Prism capabilities for the MIPS32 architecture are being developed in two phases. The first phase, available today, is an Instruction level Platform Support Package (PSP) for the MIPS32 architecture. This supports the analysis of software applications running under Linux on either hardware development boards or virtual machines such as QEMU. End users are split in their preference for development boards and simulators for development, and therefore Prism supports both flows.
MIPS developers will now be able to trace their existing software applications on a single core platform and then quickly analyze the potential benefits of migrating to a multicore architecture, all in the familiar Eclipse framework.
In the second phase, available at the end of April 2010, a Core level PSP for the MIPS32 architecture will bring an additional level of accuracy to software developers. Going beyond software mapping to multicore hardware, with this release users will be able to quantify the benefit of software migration to hardware multithreading available in certain MIPS cores, such as the MIPS32 34K and 1004K families.
Users will be able to analyze data cache misses on a thread, function or source line level, resulting in an ability to see the impact of such cache misses on the overall concurrent schedule. All of this can be done on an existing unmodified software application running on a single core model or development board. The MIPS32 Core PSP is the first Core level PSP to support hardware multithreading impact analysis.
Software developers will now be able to analyze their existing software applications and quickly assess the tangible benefits of migrating to MIPS32 multithreaded and multicore devices.
This announcement continues the deepening of Prism capabilities to enable leading multicore vendors such as MIPS Technologies to provide an ecosystem to their customers which can clearly demonstrate the differentiation of the MIPS32 architecture in the context of the customers' own software applications.
Prism is an award winning Eclipse-based embedded multicore programming system which allows software engineers to easily assess and realize the full potential of multicore processors without significant changes to their development flow.
Prism analyzes the behavior of code running on hardware development boards, virtual machines or simulators. It allows engineers to take their existing sequential code, and before making any changes, explore and analyze opportunities for concurrency. Having identified the optimal parallelization strategies in this way, developers will implement parallel structures, and use Prism again to verify efficient and thread-safe operations.
The new Prism capabilities for the MIPS32 architecture are being developed in two phases. The first phase, available today, is an Instruction level Platform Support Package (PSP) for the MIPS32 architecture. This supports the analysis of software applications running under Linux on either hardware development boards or virtual machines such as QEMU. End users are split in their preference for development boards and simulators for development, and therefore Prism supports both flows.
MIPS developers will now be able to trace their existing software applications on a single core platform and then quickly analyze the potential benefits of migrating to a multicore architecture, all in the familiar Eclipse framework.
In the second phase, available at the end of April 2010, a Core level PSP for the MIPS32 architecture will bring an additional level of accuracy to software developers. Going beyond software mapping to multicore hardware, with this release users will be able to quantify the benefit of software migration to hardware multithreading available in certain MIPS cores, such as the MIPS32 34K and 1004K families.
Users will be able to analyze data cache misses on a thread, function or source line level, resulting in an ability to see the impact of such cache misses on the overall concurrent schedule. All of this can be done on an existing unmodified software application running on a single core model or development board. The MIPS32 Core PSP is the first Core level PSP to support hardware multithreading impact analysis.
SiliconBlue selects Synopsys as FPGA synthesis partner for iCE65 mobileFPGA family
MOUNTAIN VIEW & SANTA CLARA: SiliconBlue, a leader in ultra-low power, single-chip SRAM FPGAs, announced that it has chosen Synopsys Synplify Pro FPGA synthesis software as the synthesis tool of choice for its iCE65 family of mobileFPGA devices.
SiliconBlue will distribute with its iCEcube™ software a version of the Synplify Pro software optimized for iCE65 devices. This version of the Synplify Pro software will have a thorough understanding of the unique architectural structure of SiliconBlue's devices, bringing Synopsys' world-class synthesis and mapping technology to SiliconBlue customers.
"The unprecedented success of our mobileFPGA devices has driven us to improve our development tool platform. Providing reliable, state-of-the-art synthesis is vital to our customers' success," said Kapil Shankar, CEO of SiliconBlue. "We chose Synopsys as our synthesis tool partner because of Synplify Pro's well-known standard of excellence in quality of results, ease-of-use, and overall platform robustness."
The customized version of the Synplify Pro software will contain all of the features of the standard version, and will be tuned for the SiliconBlue mobile FPGA device architecture. Because of its understanding of the iCE65 family architecture, the Synplify Pro software will be able to generate a high-performing netlist optimized for low area utilization – an important consideration in low power applications.
Users of the Synplify Pro software can choose to generate either Verilog or VHDL netlists to be used for simulation from the software. The Synplify Pro software will also be tightly integrated and tested with SiliconBlue's iCEcube software.
Gary Meyers, vice president and general manager of Synopsys' Synplicity Business Group said: "SiliconBlue is clearly extending the range of applications for FPGAs into the handheld market, reaching designers that have not used programmable logic in the past. The combination of Synplify Pro and iCE65 mobileFPGA devices allows both of our companies to cultivate this new market together."
SiliconBlue will distribute with its iCEcube™ software a version of the Synplify Pro software optimized for iCE65 devices. This version of the Synplify Pro software will have a thorough understanding of the unique architectural structure of SiliconBlue's devices, bringing Synopsys' world-class synthesis and mapping technology to SiliconBlue customers.
"The unprecedented success of our mobileFPGA devices has driven us to improve our development tool platform. Providing reliable, state-of-the-art synthesis is vital to our customers' success," said Kapil Shankar, CEO of SiliconBlue. "We chose Synopsys as our synthesis tool partner because of Synplify Pro's well-known standard of excellence in quality of results, ease-of-use, and overall platform robustness."
The customized version of the Synplify Pro software will contain all of the features of the standard version, and will be tuned for the SiliconBlue mobile FPGA device architecture. Because of its understanding of the iCE65 family architecture, the Synplify Pro software will be able to generate a high-performing netlist optimized for low area utilization – an important consideration in low power applications.
Users of the Synplify Pro software can choose to generate either Verilog or VHDL netlists to be used for simulation from the software. The Synplify Pro software will also be tightly integrated and tested with SiliconBlue's iCEcube software.
Gary Meyers, vice president and general manager of Synopsys' Synplicity Business Group said: "SiliconBlue is clearly extending the range of applications for FPGAs into the handheld market, reaching designers that have not used programmable logic in the past. The combination of Synplify Pro and iCE65 mobileFPGA devices allows both of our companies to cultivate this new market together."
Magma names Alok Mehrotra as MD of India operations
BANGALORE, INDIA: Magma Design Automation Inc. announced the appointment of Alok Mehrotra as managing director of the company's India operations. Mehrotra will report to Carl Burrow, Magma’s vice president of North America Sales.
"Managing our presence in India is a complex task, one that requires focus on both the indigenous engineering community and on supporting multinational customers with key installations here,” said Rajeev Madhavan, Magma's chairman and CEO.
"Alok’s background makes him well suited to this role – he has many years managing sales and support in India and elsewhere around the world, and he has the experience to work with our employees in India to continue the work that has contributed significantly to Magma’s success." More than 30 percent of Magma's worldwide workforce operates in the company's Bangalore, Mumbai and Noida facilities.
In assuming this role Mehrotra rejoins Magma for a second tour of duty. He previously worked at the company as director of Asia-Pacific Sales from 2001 to 2005, when he established operations in India, Singapore, Malaysia and Australia. Most recently Mehrotra served as director of sales for synthesis platform developer Synfora.
Previous experience includes serving as vice president of worldwide sales at Silicon Design Systems and at Sagantec North America; as director of business development for Aristo; and as IC design manager at Xilinx.
Mehrotra holds an MBA from Santa Clara University; an M.S. in electrical engineering from State University of New York at Stony Brook; and a B.S. degree in electronics & communication engineering from Manipal University in Karnataka, India.
"Managing our presence in India is a complex task, one that requires focus on both the indigenous engineering community and on supporting multinational customers with key installations here,” said Rajeev Madhavan, Magma's chairman and CEO.
"Alok’s background makes him well suited to this role – he has many years managing sales and support in India and elsewhere around the world, and he has the experience to work with our employees in India to continue the work that has contributed significantly to Magma’s success." More than 30 percent of Magma's worldwide workforce operates in the company's Bangalore, Mumbai and Noida facilities.
In assuming this role Mehrotra rejoins Magma for a second tour of duty. He previously worked at the company as director of Asia-Pacific Sales from 2001 to 2005, when he established operations in India, Singapore, Malaysia and Australia. Most recently Mehrotra served as director of sales for synthesis platform developer Synfora.
Previous experience includes serving as vice president of worldwide sales at Silicon Design Systems and at Sagantec North America; as director of business development for Aristo; and as IC design manager at Xilinx.
Mehrotra holds an MBA from Santa Clara University; an M.S. in electrical engineering from State University of New York at Stony Brook; and a B.S. degree in electronics & communication engineering from Manipal University in Karnataka, India.
Wind River expands hardware support for VxWorks 653 for integrated modular avionics systems
BANGALORE, INDIA: Wind River announced the immediate availability of the latest VxWorks 653 Platform, Wind River's real-time operating system for controlling complex, safety-critical ARINC 653 Integrated Modular Avionics (IMA) systems.
The new release of VxWorks 653 builds on VxWorks 653’s existing support for the Freescale e600 Power Architecture, with new board support packages (BSPs) for the Curtiss-Wright Controls VPX6-185 and the Wind River SBC8641D boards, and extends hardware support to Intel 32-bit processor architectures, including a BSP for the GE Intelligent Platforms V7768 board. Additionally, VxWorks 653 Platform now provides a new power-fail safe DO-178B file system.
VxWorks 653 is an ARINC 653, real-time operating system for safety-critical Integrated Modular Avionics platforms, used in over 180 subsystems by over 100 customers worldwide for more than 40 airframes, including the Boeing 787 Dreamliner.
VxWorks 653 implements a strict two-level time and space scheduling and separation environment that supports the deployment of applications at different DO-178B safety levels on a single instance of silicon with very high performance and very low jitter.
VxWorks 653 also includes DO-178B qualified development tools that allow the rapid insertion of new software modules into a shared avionics platform without forcing a re-test of the entire environment, enabling high levels of integration and system refresh.
“Our collaboration with Wind River to develop a new board support package for our VPX6-185 board demonstrates further commitment to support our mutual aerospace and defense customers,” said Lynn Patterson, vice president and general manager, Curtiss-Wright Controls Embedded Computing. “Together, Curtiss-Wright Controls Embedded Computing and Wind River deliver proven commercial off-the-shelf solutions for safety critical applications that can help customers enjoy decreased development time and costs.”
"In addition to meeting the rigorous safety requirements of the avionics industry, we are also committed to helping our customers reduce costs and development cycles," said Peter Cavill, general manager, Military & Aerospace Products, GE Intelligent Platforms. "By working together with Wind River and its VxWorks 653 Platform, we can provide our customers with the power and reliability needed to meet the stringent requirements of the industry, while helping them complete projects on time, realize cost savings and bring solutions to market faster."
Wind River is committed to enhancing its proven ARINC 653 operating system to continue to serve the needs of the avionics market. Key features of the latest VxWorks 653 Platform release include:
* Hardware support for Power Architecture (PowerPC) broadened to include a BSP for the Curtiss-Wright Controls VPX6-185 MPC8641D-based board.
* Hardware support extended to Intel 32-bit processor architectures, specifically for Intel Core 2 and Celeron processors, with BSP support for the GE Intelligent Platforms V7768 board.
* DO-178B File System, a power-fail safe file system ready for use in systems requiring DO-178B Level A certification. It can be used from every application partition in an IMA system, and is supported by a range of devices. The file system is an optional, add-on component, further enhancing the development capabilities of VxWorks 653 for customers and increasing their development efficiency.
* Advanced project and workflow support in Wind River Workbench that improves the ease of usability of VxWorks 653 for customers when creating, configuring and building time- and space-partitioned VxWorks 653 projects.
* Improved DO-178B Network Stack support, through the inclusion of TCP, IGMPv1, and multicast support with the UDP/IPv4 network stack.
All VxWorks 653 runtime components from prior releases, including the DO-178B TCP/IP network stack, are supported with an extensive set of RTCA DO‑178B and EUROCAE ED-12B Level A commercial-off-the-shelf (COTS) certification evidence.
“Providing customers with choice in hardware and software allows them to create solutions that can deliver better performance-to-cost ratios depending on their specific projects; it also helps to decrease overall operating expenditures,” said Marc Brown, vice president, Marketing and Strategy, VxWorks Products, Wind River.
“By working with industry leaders such as Curtiss-Wright Controls and GE Intelligent Platforms, we are helping customers realize efficiencies by using commercial off-the-shelf hardware solutions and the newly-enhanced capabilities of VxWorks 653 in their avionics systems.”
The VxWorks 653 Platform, version 2.3, is immediately available to customers.
The new release of VxWorks 653 builds on VxWorks 653’s existing support for the Freescale e600 Power Architecture, with new board support packages (BSPs) for the Curtiss-Wright Controls VPX6-185 and the Wind River SBC8641D boards, and extends hardware support to Intel 32-bit processor architectures, including a BSP for the GE Intelligent Platforms V7768 board. Additionally, VxWorks 653 Platform now provides a new power-fail safe DO-178B file system.
VxWorks 653 is an ARINC 653, real-time operating system for safety-critical Integrated Modular Avionics platforms, used in over 180 subsystems by over 100 customers worldwide for more than 40 airframes, including the Boeing 787 Dreamliner.
VxWorks 653 implements a strict two-level time and space scheduling and separation environment that supports the deployment of applications at different DO-178B safety levels on a single instance of silicon with very high performance and very low jitter.
VxWorks 653 also includes DO-178B qualified development tools that allow the rapid insertion of new software modules into a shared avionics platform without forcing a re-test of the entire environment, enabling high levels of integration and system refresh.
“Our collaboration with Wind River to develop a new board support package for our VPX6-185 board demonstrates further commitment to support our mutual aerospace and defense customers,” said Lynn Patterson, vice president and general manager, Curtiss-Wright Controls Embedded Computing. “Together, Curtiss-Wright Controls Embedded Computing and Wind River deliver proven commercial off-the-shelf solutions for safety critical applications that can help customers enjoy decreased development time and costs.”
"In addition to meeting the rigorous safety requirements of the avionics industry, we are also committed to helping our customers reduce costs and development cycles," said Peter Cavill, general manager, Military & Aerospace Products, GE Intelligent Platforms. "By working together with Wind River and its VxWorks 653 Platform, we can provide our customers with the power and reliability needed to meet the stringent requirements of the industry, while helping them complete projects on time, realize cost savings and bring solutions to market faster."
Wind River is committed to enhancing its proven ARINC 653 operating system to continue to serve the needs of the avionics market. Key features of the latest VxWorks 653 Platform release include:
* Hardware support for Power Architecture (PowerPC) broadened to include a BSP for the Curtiss-Wright Controls VPX6-185 MPC8641D-based board.
* Hardware support extended to Intel 32-bit processor architectures, specifically for Intel Core 2 and Celeron processors, with BSP support for the GE Intelligent Platforms V7768 board.
* DO-178B File System, a power-fail safe file system ready for use in systems requiring DO-178B Level A certification. It can be used from every application partition in an IMA system, and is supported by a range of devices. The file system is an optional, add-on component, further enhancing the development capabilities of VxWorks 653 for customers and increasing their development efficiency.
* Advanced project and workflow support in Wind River Workbench that improves the ease of usability of VxWorks 653 for customers when creating, configuring and building time- and space-partitioned VxWorks 653 projects.
* Improved DO-178B Network Stack support, through the inclusion of TCP, IGMPv1, and multicast support with the UDP/IPv4 network stack.
All VxWorks 653 runtime components from prior releases, including the DO-178B TCP/IP network stack, are supported with an extensive set of RTCA DO‑178B and EUROCAE ED-12B Level A commercial-off-the-shelf (COTS) certification evidence.
“Providing customers with choice in hardware and software allows them to create solutions that can deliver better performance-to-cost ratios depending on their specific projects; it also helps to decrease overall operating expenditures,” said Marc Brown, vice president, Marketing and Strategy, VxWorks Products, Wind River.
“By working with industry leaders such as Curtiss-Wright Controls and GE Intelligent Platforms, we are helping customers realize efficiencies by using commercial off-the-shelf hardware solutions and the newly-enhanced capabilities of VxWorks 653 in their avionics systems.”
The VxWorks 653 Platform, version 2.3, is immediately available to customers.
GaN power management chip market set for boom
EL SEGUNDO, USA: Thanks to rapid growth in the high-end server, notebook, mobile handset and wired communication segments, the Gallium Nitride (GaN) power management semiconductor market is expected to reach $183.6 million in revenue in 2013, up from virtually nil in 2010, according to iSuppli Corp.
GaN is an emerging process technology for power management chips that recently moved beyond the university-based testing phase and into the commercialization stage. The technology represents an attractive market opportunity for suppliers by providing their customers with capabilities that may be out of the reach of present semiconductor process materials.
“iSuppli believes that during the past two years, several events have occurred that have made GaN an up-and-coming star in the power management semiconductor world,” said Marijana Vukicevic, principal analyst for power management at iSuppli.
“First, the use of silicon has reached its practical limits in power management semiconductors. Furthermore, there have been major breakthroughs in growing GaN layers on silicon. Power designers also want to develop more efficient systems and to update their high-voltage products to waste less electricity.”
Component suppliers have begun offering GaN parts. International Rectifier Corp., for instance, released its first GaN technology-based Point-of-Load (POL) solutions in February, while Efficient Power Conversions Corp. (EPCC) is placing all its bets on GaN technology, releasing 10 power MOSFET devices this month.
The figure presents iSuppli’s GaN power management revenue forecast for the period of 2008 through 2013.
Source: iSuppli, USA
Efficiency needed
The adoption of GaN devices will be driven by the improved efficiency and small form factors enabled by the material. Such benefits are in particularly high demand for portable electronic products, including mobile PCs and smart phones. They also provide advantages for power-hungry electronic equipment, such as enterprise servers and wired communications infrastructure gear.
However, adoption of GaN technology for these applications in 2010 and 2011 will be slow due to the high cost of parts using the material. As the technology advances and the cost of manufacturing GaN technology drops in 2012 and 2013, the technology will begin to steal market share away from conventional MOSFETs, driver ICs and voltage regulator ICs.
The first adoption of GaN devices most likely will be among servers, which always demand high-performance devices and often are one of the first product areas to accept new technologies that improve performance. Over the next three years, the bulk of device volume likely will be driven by notebooks, as the power savings and smaller form factor delivered by GaN will be in high demand.
Source: iSuppli, USA
GaN is an emerging process technology for power management chips that recently moved beyond the university-based testing phase and into the commercialization stage. The technology represents an attractive market opportunity for suppliers by providing their customers with capabilities that may be out of the reach of present semiconductor process materials.
“iSuppli believes that during the past two years, several events have occurred that have made GaN an up-and-coming star in the power management semiconductor world,” said Marijana Vukicevic, principal analyst for power management at iSuppli.
“First, the use of silicon has reached its practical limits in power management semiconductors. Furthermore, there have been major breakthroughs in growing GaN layers on silicon. Power designers also want to develop more efficient systems and to update their high-voltage products to waste less electricity.”
Component suppliers have begun offering GaN parts. International Rectifier Corp., for instance, released its first GaN technology-based Point-of-Load (POL) solutions in February, while Efficient Power Conversions Corp. (EPCC) is placing all its bets on GaN technology, releasing 10 power MOSFET devices this month.
The figure presents iSuppli’s GaN power management revenue forecast for the period of 2008 through 2013.
Source: iSuppli, USAEfficiency needed
The adoption of GaN devices will be driven by the improved efficiency and small form factors enabled by the material. Such benefits are in particularly high demand for portable electronic products, including mobile PCs and smart phones. They also provide advantages for power-hungry electronic equipment, such as enterprise servers and wired communications infrastructure gear.
However, adoption of GaN technology for these applications in 2010 and 2011 will be slow due to the high cost of parts using the material. As the technology advances and the cost of manufacturing GaN technology drops in 2012 and 2013, the technology will begin to steal market share away from conventional MOSFETs, driver ICs and voltage regulator ICs.
The first adoption of GaN devices most likely will be among servers, which always demand high-performance devices and often are one of the first product areas to accept new technologies that improve performance. Over the next three years, the bulk of device volume likely will be driven by notebooks, as the power savings and smaller form factor delivered by GaN will be in high demand.
Source: iSuppli, USA
Time for a reality check..pessimism has swung too far
UK: According to Future Horizons, January’s WSTS results continued to follow the underlying industry recovery trend, with ICs sales up 4.8 percent versus December (on a 5-week month adjusted basis).
They were also up 73.7 percent versus January 2009, a relatively meaningless number other than to recall just how bad things were this time last year.
The real significance of January is its potential impact on first quarter sales. Were this run rate to continue through February and March, first quarter sales would be up 8 percent versus Q4-09. That would make 2010 grow a staggering 40 percent on 2009.
This is by no means a forecast but it does serve to illustrate the strength of the recovery from the abyss this time last year.
They were also up 73.7 percent versus January 2009, a relatively meaningless number other than to recall just how bad things were this time last year.
The real significance of January is its potential impact on first quarter sales. Were this run rate to continue through February and March, first quarter sales would be up 8 percent versus Q4-09. That would make 2010 grow a staggering 40 percent on 2009.
This is by no means a forecast but it does serve to illustrate the strength of the recovery from the abyss this time last year.
Applied Materials details plans for growth at analyst meeting
NEW YORK, USA: Applied Materials Inc held an analyst meeting to outline its plans for growing revenue and profitability over the next several years. Applied’s executive team shared the company’s goals of capitalizing on an expected multi-year expansion in the semiconductor industry, increasing market share across its businesses, and driving operational improvements.
Applied is seeing growth in demand across a number of its businesses, and the company now expects fiscal 2010 net sales to be more than 60 percent higher than in fiscal 2009 – compared to its previous forecast of up more than 50 percent.
“Applied Materials has engineered a solid operating model for the future, backed by innovative technologies and the strength of our most profitable businesses,” said Mike Splinter, chairman and CEO.
“Our momentum is strong, and we believe we are in the early stages of a multi-year growth cycle in many of our served markets. Applied will take advantage of opportunities arising from key market trends, including accelerating demand for consumer electronics in emerging markets worldwide, for increased semiconductor functionality and pervasiveness, and for cost-effective, renewable energy solutions.”
George Davis, chief financial officer, discussed how the company has increased the efficiency of its businesses while creating new opportunities that increase the company’s served market by billions of dollars annually.
“We are focused on helping our customers increase production as their end markets recover and on expanding our operations in Asia to serve our customers more effectively and efficiently. Business in each of our segments is improving, generating the earnings and cash flow necessary to fund our growth opportunities and reward our stockholders over the long term.”
Dr. Randhir Thakur, general manager of the Silicon Systems Group, detailed Applied’s progress in delivering products to enable the next chip generations during a multi-year semiconductor growth cycle.
“We will gain market share for the second consecutive year – most notably in our inspection and etch businesses. Our focus continues to be on our customers – collaborating closely with them to deliver innovative new technologies across our product lines to meet their current and future needs. We have launched six new products in the past six months and plan to accelerate this product introduction strategy throughout 2010.
“Our acquisition of Semitool last December gives us the leadership position in advanced packaging – a market that is expected to grow to nearly $1 billion over the next several years. At the same time, by driving efficiencies in the way we develop and deliver our products around the world, we are on track to deliver as much as 10 additional points of profit margin to the company’s bottom line.”
Charlie Pappis, general manager of Applied Global Services, spoke to the resilient business model of the company’s services group, which generated positive cash flow during 2009 – one of the most challenging years on record for the semiconductor industry.
“Asia holds the greatest opportunity for growth. We are developing closer customer ties in this region, both on an operational and a relationship basis, and expect about ten percent growth in the next several years.”
Applied’s LCD flat panel display equipment business is rebounding, led by growth in consumer demand in emerging markets, especially in China where flat panel TV sales were up 100% in 2009.
Jim Scholhamer, general manager of the Display Group, discussed how Applied’s LCD business is growing faster than the overall market, spurred by its new Pivot PVD* product that significantly reduces the materials cost in manufacturing LCD TVs.
“Applied is also prepared to serve customers as they transition to the display market’s most advanced Generation 10 and above technology – which will enable even larger LCD TV screens. In addition, we are well-positioned with our innovative product line to take advantage of the increasing demand for the latest touch screen, advanced LCD TV technologies and e-reader applications.”
Dr. Mark Pinto, chief technology officer and general manager of the Energy and Display Systems Group, discussed the strategies and opportunities for Applied’s Energy and Environmental Solutions (EES) segment.
“This business has enormous potential for growth, and we are capitalizing on Applied’s core strengths in technology and manufacturing innovation to take advantage of these opportunities. We rapidly became the top supplier of PV solar equipment in 2008, and the EES segment achieved $1.15 billion in revenue in fiscal year 2009.
“We have developed new products and applications to expand our market share in crystalline silicon, and have made excellent progress with our thin film customers in establishing the technology and installation advantages of the SunFab line for lowering the cost of electricity. We expect 2010 to be another growth year due to our strong position in the rapidly expanding market in China, the investments we’ve made in emerging energy-related areas, and improvements we’ve made in our bottom line performance.”
Applied is seeing growth in demand across a number of its businesses, and the company now expects fiscal 2010 net sales to be more than 60 percent higher than in fiscal 2009 – compared to its previous forecast of up more than 50 percent.
“Applied Materials has engineered a solid operating model for the future, backed by innovative technologies and the strength of our most profitable businesses,” said Mike Splinter, chairman and CEO.
“Our momentum is strong, and we believe we are in the early stages of a multi-year growth cycle in many of our served markets. Applied will take advantage of opportunities arising from key market trends, including accelerating demand for consumer electronics in emerging markets worldwide, for increased semiconductor functionality and pervasiveness, and for cost-effective, renewable energy solutions.”
George Davis, chief financial officer, discussed how the company has increased the efficiency of its businesses while creating new opportunities that increase the company’s served market by billions of dollars annually.
“We are focused on helping our customers increase production as their end markets recover and on expanding our operations in Asia to serve our customers more effectively and efficiently. Business in each of our segments is improving, generating the earnings and cash flow necessary to fund our growth opportunities and reward our stockholders over the long term.”
Dr. Randhir Thakur, general manager of the Silicon Systems Group, detailed Applied’s progress in delivering products to enable the next chip generations during a multi-year semiconductor growth cycle.
“We will gain market share for the second consecutive year – most notably in our inspection and etch businesses. Our focus continues to be on our customers – collaborating closely with them to deliver innovative new technologies across our product lines to meet their current and future needs. We have launched six new products in the past six months and plan to accelerate this product introduction strategy throughout 2010.
“Our acquisition of Semitool last December gives us the leadership position in advanced packaging – a market that is expected to grow to nearly $1 billion over the next several years. At the same time, by driving efficiencies in the way we develop and deliver our products around the world, we are on track to deliver as much as 10 additional points of profit margin to the company’s bottom line.”
Charlie Pappis, general manager of Applied Global Services, spoke to the resilient business model of the company’s services group, which generated positive cash flow during 2009 – one of the most challenging years on record for the semiconductor industry.
“Asia holds the greatest opportunity for growth. We are developing closer customer ties in this region, both on an operational and a relationship basis, and expect about ten percent growth in the next several years.”
Applied’s LCD flat panel display equipment business is rebounding, led by growth in consumer demand in emerging markets, especially in China where flat panel TV sales were up 100% in 2009.
Jim Scholhamer, general manager of the Display Group, discussed how Applied’s LCD business is growing faster than the overall market, spurred by its new Pivot PVD* product that significantly reduces the materials cost in manufacturing LCD TVs.
“Applied is also prepared to serve customers as they transition to the display market’s most advanced Generation 10 and above technology – which will enable even larger LCD TV screens. In addition, we are well-positioned with our innovative product line to take advantage of the increasing demand for the latest touch screen, advanced LCD TV technologies and e-reader applications.”
Dr. Mark Pinto, chief technology officer and general manager of the Energy and Display Systems Group, discussed the strategies and opportunities for Applied’s Energy and Environmental Solutions (EES) segment.
“This business has enormous potential for growth, and we are capitalizing on Applied’s core strengths in technology and manufacturing innovation to take advantage of these opportunities. We rapidly became the top supplier of PV solar equipment in 2008, and the EES segment achieved $1.15 billion in revenue in fiscal year 2009.
“We have developed new products and applications to expand our market share in crystalline silicon, and have made excellent progress with our thin film customers in establishing the technology and installation advantages of the SunFab line for lowering the cost of electricity. We expect 2010 to be another growth year due to our strong position in the rapidly expanding market in China, the investments we’ve made in emerging energy-related areas, and improvements we’ve made in our bottom line performance.”
New Intel Xeon processor pushes mission critical into mainstream
SANTA CLARA, USA: Intel Corp. culminated the transition to the company’s award-winning “Nehalem” chip design with the launch of the Intel Xeon 7500 processor series.
In less than 90 days, Intel has introduced the all-new 2010 PC, laptop and server processors that increase energy efficiency and computing speed and include a multitude of new features that make computers more intelligent, flexible and reliable.
Expandable to include from two to 256 chips per server, the new Intel Xeon processors have an average performance three times that of Intel’s existing Xeon 7400 series on common, leading enterprise benchmarks, and come equipped with more than 20 new reliability features.
Twenty old servers – To one new one
The combined scalable performance, advanced reliability and total cost of ownership advantages of the Xeon 7500 series will further accelerate the shift from proprietary systems to industry-standard Intel processor-based servers.
These new capabilities enable IT managers to consolidate up to 20 older single-core, 4-chip servers onto a single server using Intel Xeon 7500 series processors while maintaining the same level of performance. In doing so, they could also see up to a 92 percent estimated reduction in energy costs and a return on their investment estimated within 1 year due to reductions in power, cooling and licensing costs.
“The Xeon 7500 brings mission critical capabilities to the mainstream by delivering the most significant leap in performance, scalability and reliability ever seen from Intel,” said Kirk Skaugen, vice president of the Intel architecture group and general manager of Intel’s data center group. “This combination will help users push to new levels of productivity, and accelerate the industry’s migration away from proprietary architectures. We are democratizing high-end computing.”
New standards in reliability and scalability
Mission-critical workloads run by customers that simply cannot afford unscheduled downtime such as hospitals or stock exchanges can take advantage of more than 20 new features that deliver a leap forward in reliability, availability and serviceability (RAS). These reliability capabilities are designed to improve the protection of data integrity, increase availability and minimize planned downtime.
For example, this is the first Xeon processor to possess Machine Check Architecture (MCA) Recovery, a feature that allows the silicon to work with the operating system and virtual machine manager to recover from otherwise fatal system errors, a mechanism until now found only in the company's Intel Itanium processor family and RISC processors.
The Intel Xeon processor 7500 series offers unique scalability through modular building blocks enabled by Intel QuickPath Technology (QPI) interconnect. With QPI, cost-effective and highly scalable eight-processor servers that don’t require specialized third-party node controller chips to “glue” the system together can be built.
Intel is also working with system vendors to deliver “ultra-scale” systems with 16 processors for the enterprise, and up to 256 processors and support for 16 terabytes (one terabyte is equal to 1,000 gigabytes) of memory for high- performance computing “super nodes” running bandwidth-demanding applications such as financial analysis, numerical weather predictions and genome sequencing.
Large-scale virtualization
The Intel Xeon processor 7500 series meets the growing trend of IT organizations virtualizing large mission-critical workloads for applications such as Enterprise Resource Planning.
With up to eight times the memory bandwidth of the Intel Xeon processor 7400 series and four times the memory capacity with 16 memory slots per processor, the Xeon 7500 series can support one terabyte (or 1,000 gigabytes) of memory in a four-socket platform.
Intel Virtualization Technologies, which include new I/O virtualization capabilities and Intel Virtualization Technology (VT) FlexMigration, enables live VM migration across all Intel Core microarchitecture-based platforms to ensure investment protection for administrators seeking to use pools of virtualized systems to facilitate failover, disaster recovery, load balancing and optimal server maintenance and downtime.
Two-chip and cost optimized servers
New two-chip expandable class platforms with large memory capacity based on the Intel Xeon processor 7500 series are ideal for memory intensive databases and virtualization environments.
The Intel Xeon processor 7500 series is available in quad, six and eight core versions with twice the number of threads thanks to Intel Hyper-Threading Technology. The Intel Xeon processor 6500 series provides a lower cost solution for 2-chip servers with large memory requirements.
The Intel Xeon processor 7500 series supports up to eight integrated cores and 16 threads, and can scale up to 32 cores and 64 threads per 4-chip platform or 64 cores and 128 threads per 8-chip platform, and is available with frequencies up to 2.66 GHz, and 24 MB of Intel Smart Cache memory, four Intel QPI links and Intel Turbo Boost technology. Thermal Design Point (TDP) power levels range from 95 watts to 130 watts.
The Intel Xeon processor X7560, with eight cores and 24MB cache size, is built for highly parallel, data demanding and mission-critical workloads, whereas the Intel Xeon processor X7542 is a frequency-optimized 6-core option at 2.66 GHz targeted for super node high-performance computing applications in science and financial services.
The innovative modular scaling of the Xeon 7500 processor works with the Intel 7500 Chipset and Intel 7500 Scalable Memory Buffers to enable unique OEM system designs and brings a wide range of socket, memory and I/O, form factor, and reliability feature sets never before available to the mainstream server market.
Enterprise software vendors expected to support the high-end features of Intel Xeon processor 7500-based platforms, include Citrix, IBM, Microsoft, Novell, Oracle, Red Hat, SAP AG and VMware.
System vendors are lining up to take advantage of the high-end Intel Xeon processor 7500 series capabilities and deliver highly innovative solutions at much lower costs than older proprietary solutions. With more than double the amount of designs versus the previous generation Intel Xeon processor 7400 series, system manufacturers were expected to announce systems based on the Intel Xeon processor 7500/6500 processor starting today.
In less than 90 days, Intel has introduced the all-new 2010 PC, laptop and server processors that increase energy efficiency and computing speed and include a multitude of new features that make computers more intelligent, flexible and reliable.Expandable to include from two to 256 chips per server, the new Intel Xeon processors have an average performance three times that of Intel’s existing Xeon 7400 series on common, leading enterprise benchmarks, and come equipped with more than 20 new reliability features.
Twenty old servers – To one new one
The combined scalable performance, advanced reliability and total cost of ownership advantages of the Xeon 7500 series will further accelerate the shift from proprietary systems to industry-standard Intel processor-based servers.
These new capabilities enable IT managers to consolidate up to 20 older single-core, 4-chip servers onto a single server using Intel Xeon 7500 series processors while maintaining the same level of performance. In doing so, they could also see up to a 92 percent estimated reduction in energy costs and a return on their investment estimated within 1 year due to reductions in power, cooling and licensing costs.
“The Xeon 7500 brings mission critical capabilities to the mainstream by delivering the most significant leap in performance, scalability and reliability ever seen from Intel,” said Kirk Skaugen, vice president of the Intel architecture group and general manager of Intel’s data center group. “This combination will help users push to new levels of productivity, and accelerate the industry’s migration away from proprietary architectures. We are democratizing high-end computing.”
New standards in reliability and scalability
Mission-critical workloads run by customers that simply cannot afford unscheduled downtime such as hospitals or stock exchanges can take advantage of more than 20 new features that deliver a leap forward in reliability, availability and serviceability (RAS). These reliability capabilities are designed to improve the protection of data integrity, increase availability and minimize planned downtime.
For example, this is the first Xeon processor to possess Machine Check Architecture (MCA) Recovery, a feature that allows the silicon to work with the operating system and virtual machine manager to recover from otherwise fatal system errors, a mechanism until now found only in the company's Intel Itanium processor family and RISC processors.
The Intel Xeon processor 7500 series offers unique scalability through modular building blocks enabled by Intel QuickPath Technology (QPI) interconnect. With QPI, cost-effective and highly scalable eight-processor servers that don’t require specialized third-party node controller chips to “glue” the system together can be built.
Intel is also working with system vendors to deliver “ultra-scale” systems with 16 processors for the enterprise, and up to 256 processors and support for 16 terabytes (one terabyte is equal to 1,000 gigabytes) of memory for high- performance computing “super nodes” running bandwidth-demanding applications such as financial analysis, numerical weather predictions and genome sequencing.
Large-scale virtualization
The Intel Xeon processor 7500 series meets the growing trend of IT organizations virtualizing large mission-critical workloads for applications such as Enterprise Resource Planning.
With up to eight times the memory bandwidth of the Intel Xeon processor 7400 series and four times the memory capacity with 16 memory slots per processor, the Xeon 7500 series can support one terabyte (or 1,000 gigabytes) of memory in a four-socket platform.
Intel Virtualization Technologies, which include new I/O virtualization capabilities and Intel Virtualization Technology (VT) FlexMigration, enables live VM migration across all Intel Core microarchitecture-based platforms to ensure investment protection for administrators seeking to use pools of virtualized systems to facilitate failover, disaster recovery, load balancing and optimal server maintenance and downtime.
Two-chip and cost optimized servers
New two-chip expandable class platforms with large memory capacity based on the Intel Xeon processor 7500 series are ideal for memory intensive databases and virtualization environments.
The Intel Xeon processor 7500 series is available in quad, six and eight core versions with twice the number of threads thanks to Intel Hyper-Threading Technology. The Intel Xeon processor 6500 series provides a lower cost solution for 2-chip servers with large memory requirements.
The Intel Xeon processor 7500 series supports up to eight integrated cores and 16 threads, and can scale up to 32 cores and 64 threads per 4-chip platform or 64 cores and 128 threads per 8-chip platform, and is available with frequencies up to 2.66 GHz, and 24 MB of Intel Smart Cache memory, four Intel QPI links and Intel Turbo Boost technology. Thermal Design Point (TDP) power levels range from 95 watts to 130 watts.
The Intel Xeon processor X7560, with eight cores and 24MB cache size, is built for highly parallel, data demanding and mission-critical workloads, whereas the Intel Xeon processor X7542 is a frequency-optimized 6-core option at 2.66 GHz targeted for super node high-performance computing applications in science and financial services.
The innovative modular scaling of the Xeon 7500 processor works with the Intel 7500 Chipset and Intel 7500 Scalable Memory Buffers to enable unique OEM system designs and brings a wide range of socket, memory and I/O, form factor, and reliability feature sets never before available to the mainstream server market.
Enterprise software vendors expected to support the high-end features of Intel Xeon processor 7500-based platforms, include Citrix, IBM, Microsoft, Novell, Oracle, Red Hat, SAP AG and VMware.
System vendors are lining up to take advantage of the high-end Intel Xeon processor 7500 series capabilities and deliver highly innovative solutions at much lower costs than older proprietary solutions. With more than double the amount of designs versus the previous generation Intel Xeon processor 7400 series, system manufacturers were expected to announce systems based on the Intel Xeon processor 7500/6500 processor starting today.
Legacy Electronics releases 8GB very low profile modules for server apps
SAN CLEMENTE, USA: Design engineers and system integrators now have a new very low profile option for both registered dual in-line memory modules (RDIMMs) and mini-RDIMMs. Using Legacy Electronics’ patented Multiple Device Canopy (MDC) processes, designers can increase existing module density and still maintain 2-rank capability.
Jason Engle, president of Legacy Electronics, explains: “Our 4Gbit MDC DRAM is functionally and electrically equivalent to a dual die package DRAM, and can be configured to provide significant cost and space savings. We are currently offering two JEDEC Standard VLP registered ECC DIMM modules using the MDC solution: either a DDR2 8GB RDIMM or a DDR2 Mini-RDIMM. Custom MDC solutions are also available.”
Don Mecker, Legacy’s chief technology officer, added: “It’s every engineer’s dream to be able to add a whole new dimension to his or her design capabilities. And that’s what MDC® does for us; it gives us vertical space.”
The two 8GB DDR2 RDIMMs provide the 18.3 mm height low profile form factor, on either a 240-pin (RDIMM) or 244-pin (mini-RDIMM) glass epoxy substrate.
Jason Engle, president of Legacy Electronics, explains: “Our 4Gbit MDC DRAM is functionally and electrically equivalent to a dual die package DRAM, and can be configured to provide significant cost and space savings. We are currently offering two JEDEC Standard VLP registered ECC DIMM modules using the MDC solution: either a DDR2 8GB RDIMM or a DDR2 Mini-RDIMM. Custom MDC solutions are also available.”
Don Mecker, Legacy’s chief technology officer, added: “It’s every engineer’s dream to be able to add a whole new dimension to his or her design capabilities. And that’s what MDC® does for us; it gives us vertical space.”
The two 8GB DDR2 RDIMMs provide the 18.3 mm height low profile form factor, on either a 240-pin (RDIMM) or 244-pin (mini-RDIMM) glass epoxy substrate.
SMIC bases DFM sign-off strategy on Mentor Graphics Calibre platform
WILSONVILLE, USA: Mentor Graphics Corp. announced that Semiconductor Manufacturing International Corp. (SMIC) has qualified Mentor Graphics Calibre products as the reference platform for design-for-manufacturing (DFM) sign-off for 65nm and smaller processes.
The reference flow includes all elements of the Calibre DFM offering including: the Calibre LFD product for litho checking; the Calibre CMPAnalyzer product for CMP (planarity) simulation; the Calibre YieldAnalyzer product for critical area analysis (CAA) and simulation; and the Calibre YieldEnhancer product with SmartFill for automated DFM layout improvements, including highly-optimized planarity fill. SMIC is also using the Calibre solution for its DFM services offerings.
“We are moving aggressively to add DFM sign-off requirements for 65nm and below, making it mandatory at all levels, including full-chip, block and IP,” said Max Liu, vice president, Corporate Design Service Center at SMIC.
“We selected Calibre because we found it to be a complete, accurate and reliable platform for DFM, ensuring the effectiveness of SMIC’s reference flow. For example, Calibre LFD is a primary litho-checking tool accurate enough to be certified on our 65nm process. Consequently, process variability analysis tools used in our flow, including electrical analysis, use contours generated by Calibre LFD.
“Also, Calibre CMPAnalyzer provides the ability for SMIC to build and modify our CMP model, giving us greater flexibility and control of the DFM process. In addition, Calibre, as a widely-used platform in the industry for the entire post tapeout flow, makes it easy for our customers to integrate IP that has also been verified with Calibre into their designs.”
“Using DFM is becoming a competitive factor for both foundries and fabless designers,” said Joseph Sawicki, vice president and general manager for the Design-to-Silicon Division at Mentor Graphics.
“The Calibre platform makes DFM a seamless extension to our customers’ existing physical verification flow, making product adoption simple and delivering a performance advantage that reduces overall cycle time.”
The reference flow includes all elements of the Calibre DFM offering including: the Calibre LFD product for litho checking; the Calibre CMPAnalyzer product for CMP (planarity) simulation; the Calibre YieldAnalyzer product for critical area analysis (CAA) and simulation; and the Calibre YieldEnhancer product with SmartFill for automated DFM layout improvements, including highly-optimized planarity fill. SMIC is also using the Calibre solution for its DFM services offerings.
“We are moving aggressively to add DFM sign-off requirements for 65nm and below, making it mandatory at all levels, including full-chip, block and IP,” said Max Liu, vice president, Corporate Design Service Center at SMIC.
“We selected Calibre because we found it to be a complete, accurate and reliable platform for DFM, ensuring the effectiveness of SMIC’s reference flow. For example, Calibre LFD is a primary litho-checking tool accurate enough to be certified on our 65nm process. Consequently, process variability analysis tools used in our flow, including electrical analysis, use contours generated by Calibre LFD.
“Also, Calibre CMPAnalyzer provides the ability for SMIC to build and modify our CMP model, giving us greater flexibility and control of the DFM process. In addition, Calibre, as a widely-used platform in the industry for the entire post tapeout flow, makes it easy for our customers to integrate IP that has also been verified with Calibre into their designs.”
“Using DFM is becoming a competitive factor for both foundries and fabless designers,” said Joseph Sawicki, vice president and general manager for the Design-to-Silicon Division at Mentor Graphics.
“The Calibre platform makes DFM a seamless extension to our customers’ existing physical verification flow, making product adoption simple and delivering a performance advantage that reduces overall cycle time.”
Rohde&Schwarz achieves higher quality RFICs with Cadence Virtuoso APS
FELDKIRCHEN, GERMANY: Cadence Design Systems Inc. announced that Rohde & Schwarz, a market leader in complex RF test and measurement products, improved the quality and functionality of its complex RF integrated circuits (RFICs) through an increased simulation depth using Cadence Virtuoso Accelerated Parallel Simulator (APS).
Rohde & Schwarz seeks to maximize simulation efficiency when developing key ASIC components to stay ahead of the competition and protect its IP. The Cadence simulator’s accuracy, performance and ease of use enabled the company to experience a significant simulation gain with mixed-signal RF circuits featuring as many as 64,000 mutual inductors and 3,000 actual inductors.
“The Virtuoso Accelerated Parallel Simulator increased the productivity in our analog verification efforts, enabling exhaustive simulation and reducing the risk of errors,” said Gerhard Kahmen, head of R&D Mixed-Signal IC at Rohde & Schwarz. ”We were very pleased to increase overall simulation depth across various classes of circuits by factors of 4 to 16.”
“Conventional simulators are not able to simulate and verify ICs with such a complexity and accuracy,” said Zhihong Lui, corporate vice president at Cadence.
“With the Virtuoso Accelerated Parallel Simulator, Rohde & Schwarz is now in the position to create RF simulation plans that are substantially more comprehensive than before. Our simulator helps our customers to simulate not just parts of the circuits but to simulate RF subsystems with large numbers of mutual and actual inductors, regardless of the process nodes used.”
The Virtuoso Accelerated Parallel Simulator delivers the full accuracy of the Virtuoso Spectre Circuit Simulator, used by Rohde & Schwarz as their sign-off simulator.
Developed to solve the largest and most complex analog and mixed-signal designs across all process nodes, the APS simulator consists of a combination of proven Cadence simulation technologies and a breakthrough parallel circuit solver, along with a newly architected engine that efficiently harnesses the power of multiprocessing computing platforms.
Rohde & Schwarz seeks to maximize simulation efficiency when developing key ASIC components to stay ahead of the competition and protect its IP. The Cadence simulator’s accuracy, performance and ease of use enabled the company to experience a significant simulation gain with mixed-signal RF circuits featuring as many as 64,000 mutual inductors and 3,000 actual inductors.
“The Virtuoso Accelerated Parallel Simulator increased the productivity in our analog verification efforts, enabling exhaustive simulation and reducing the risk of errors,” said Gerhard Kahmen, head of R&D Mixed-Signal IC at Rohde & Schwarz. ”We were very pleased to increase overall simulation depth across various classes of circuits by factors of 4 to 16.”
“Conventional simulators are not able to simulate and verify ICs with such a complexity and accuracy,” said Zhihong Lui, corporate vice president at Cadence.
“With the Virtuoso Accelerated Parallel Simulator, Rohde & Schwarz is now in the position to create RF simulation plans that are substantially more comprehensive than before. Our simulator helps our customers to simulate not just parts of the circuits but to simulate RF subsystems with large numbers of mutual and actual inductors, regardless of the process nodes used.”
The Virtuoso Accelerated Parallel Simulator delivers the full accuracy of the Virtuoso Spectre Circuit Simulator, used by Rohde & Schwarz as their sign-off simulator.
Developed to solve the largest and most complex analog and mixed-signal designs across all process nodes, the APS simulator consists of a combination of proven Cadence simulation technologies and a breakthrough parallel circuit solver, along with a newly architected engine that efficiently harnesses the power of multiprocessing computing platforms.
Tuesday, March 30, 2010
3M, Yushin Precision Equipment ally on temporary wafer bonding to enable 3-D semiconductors
ST. PAUL, USA: 3M, a leading supplier of advanced materials to the semiconductor industry, and Yushin Precision Equipment Co. Ltd, of Japan, a leading supplier of automation and packaging equipment, announced an agreement to allow Yushin Precision Equipment to manufacture and sell equipment for temporary bonding of ultrathin wafers required for 3-D packaging.
As part of this agreement, Yushin Precision Equipment becomes a 3M Authorized Equipment Supplier for equipment that is configured to use 3M Wafer Support System (WSS) materials including 3M’s Liquid UV-Curable Adhesive and Light-To-Heat Conversion coating. Under the agreement both companies will continue to work closely to address customer demands for high-performance process solutions that support high-volume manufacturing with a competitive cost of ownership.
The 3M Wafer Support System includes equipment and materials that allow temporary wafer bonding to support wafer thinning and subsequent processing of ultra thin wafers for 3D packaging. 3M’s innovative use of a UV curable adhesive for wafer bonding to glass carriers provides robust wafer support throughout wafer grinding and subsequent multiple high-temperature processing cycles.
After processing, 3M’s unique Light-To-Heat Conversion layer allows low stress, room temperature debonding of the thinned wafer directly to a tape carrier. The thinned wafer is supported throughout the entire process thereby minimizing warpage, stress and process complexity. As compared to other processes that expose the thinned wafer to high-temperature and stress or other processes that use solvents to release the thinned wafer, 3M’s process and materials solutions enables high-volume manufacturing at multiple semiconductor sites worldwide today.
“The agreement ensures our joint customers access to Yushin supplied equipment that was previously sold under the 3M brand and builds on the successful relationship the two companies have had over several years,” said Mike Bowman, marketing development manager for 3M Electronics Markets Materials Division.
“Customers can now simplify the equipment sales and support process by purchasing the equipment directly from any of 3M’s three Authorized WSS Equipment Suppliers, which includes Yushin Precision Equipment. This enables 3M to focus on its core strengths in materials development to address customer requirements for advanced materials for 3-D semiconductor manufacturing.”
Since 2004 Yushin Precision Equipment has worked with 3M to design and develop equipment for temporary bonding of ultrathin wafers to optimize 3M’s materials. This joint development has resulted in multiple systems that have been placed worldwide.
“Our strong relationship with 3M allows both companies to support customer requirements for equipment and materials for advanced 3-D packaging solutions on a global scale,” said Satoshi Kimura, executive managing director at Yushin Precision Equipment. “Together we are able to offer world-class precision material handling and packaging experience and the best process materials.
As part of this agreement, Yushin Precision Equipment becomes a 3M Authorized Equipment Supplier for equipment that is configured to use 3M Wafer Support System (WSS) materials including 3M’s Liquid UV-Curable Adhesive and Light-To-Heat Conversion coating. Under the agreement both companies will continue to work closely to address customer demands for high-performance process solutions that support high-volume manufacturing with a competitive cost of ownership.
The 3M Wafer Support System includes equipment and materials that allow temporary wafer bonding to support wafer thinning and subsequent processing of ultra thin wafers for 3D packaging. 3M’s innovative use of a UV curable adhesive for wafer bonding to glass carriers provides robust wafer support throughout wafer grinding and subsequent multiple high-temperature processing cycles.
After processing, 3M’s unique Light-To-Heat Conversion layer allows low stress, room temperature debonding of the thinned wafer directly to a tape carrier. The thinned wafer is supported throughout the entire process thereby minimizing warpage, stress and process complexity. As compared to other processes that expose the thinned wafer to high-temperature and stress or other processes that use solvents to release the thinned wafer, 3M’s process and materials solutions enables high-volume manufacturing at multiple semiconductor sites worldwide today.
“The agreement ensures our joint customers access to Yushin supplied equipment that was previously sold under the 3M brand and builds on the successful relationship the two companies have had over several years,” said Mike Bowman, marketing development manager for 3M Electronics Markets Materials Division.
“Customers can now simplify the equipment sales and support process by purchasing the equipment directly from any of 3M’s three Authorized WSS Equipment Suppliers, which includes Yushin Precision Equipment. This enables 3M to focus on its core strengths in materials development to address customer requirements for advanced materials for 3-D semiconductor manufacturing.”
Since 2004 Yushin Precision Equipment has worked with 3M to design and develop equipment for temporary bonding of ultrathin wafers to optimize 3M’s materials. This joint development has resulted in multiple systems that have been placed worldwide.
“Our strong relationship with 3M allows both companies to support customer requirements for equipment and materials for advanced 3-D packaging solutions on a global scale,” said Satoshi Kimura, executive managing director at Yushin Precision Equipment. “Together we are able to offer world-class precision material handling and packaging experience and the best process materials.
NEC Electronics America expands 8-bit all Flash MCUs for industrial, consumer electronics precision control
SANTA CLARA, USA: NEC Electronics America, Inc. has expanded its robust 8-bit microcontroller (MCU) portfolio with the new All Flash 78K0/Kx2-A MCU series, featuring enhanced analog functionality for battery-operated portable devices.
The four new MCUs offer robust peripherals combined with NEC Electronics’ proven 78K0 MCU interface and safety features to support applications that require high-precision analog sensing capabilities. Target applications include industrial building automation sensors and monitoring devices, and consumer electronics devices with human interface systems such as game-control handsets.
The new 78K0/Kx2-A series extends the rich analog peripheral set offered in NEC Electronics’ 78K0/Kx2 general-purpose MCUs and includes up to 12 channels of 12-bit analog-to-digital converters (ADCs), and 3-channel operational amplifiers (op-amps) interlocked with 12-bit ADC inputs.
To facilitate easy migration within the 78K0/Kx2 series, the new 78K0/Kx2-A MCUs also share many of the built-in features common to the 78K0 MCU family. The peripheral set includes UART, I2C and CSI/SPI serial interfaces, 8- and 16-bit timers to manage an array of real-time input and output events, clock generators, and a real-time counter with clock and calendar functions to maintain time-of-day clock without CPU intervention.
The analog and serial interface integration helps to reduce system costs, while the optimized 8-bit circuit design helps designers achieve low power consumption and high performance levels similar to those associated with NEC Electronics’ other 78K0/Kx2 devices.
NEC Electronics America also provides a comprehensive suite of development tools to support the new 78K0/Kx2-A series. This includes software tools such as the CubeSuite integrated development environment, compiler, assembler, software debugger and code generator, as well as hardware tools such as NEC Electronics’ full-function IECube in-circuit emulator with real-time trace and MINICUBE2 on-chip debug emulator and stand-alone flash programmer.
The new 78K0/Kx2-A MCUs will be available in a 30-pin shrink-small outline package (SSOP) and 48-pin low-profile quad flat package (QFP) with flash memory capacities ranging from 16 to 32 kilobytes (KB).
Samples are available now and distribution suggested resale pricing begins at $1.65 in volumes of 10,000 units. Mass production of the new devices is slated to begin in July 2010.
The four new MCUs offer robust peripherals combined with NEC Electronics’ proven 78K0 MCU interface and safety features to support applications that require high-precision analog sensing capabilities. Target applications include industrial building automation sensors and monitoring devices, and consumer electronics devices with human interface systems such as game-control handsets.
The new 78K0/Kx2-A series extends the rich analog peripheral set offered in NEC Electronics’ 78K0/Kx2 general-purpose MCUs and includes up to 12 channels of 12-bit analog-to-digital converters (ADCs), and 3-channel operational amplifiers (op-amps) interlocked with 12-bit ADC inputs.
To facilitate easy migration within the 78K0/Kx2 series, the new 78K0/Kx2-A MCUs also share many of the built-in features common to the 78K0 MCU family. The peripheral set includes UART, I2C and CSI/SPI serial interfaces, 8- and 16-bit timers to manage an array of real-time input and output events, clock generators, and a real-time counter with clock and calendar functions to maintain time-of-day clock without CPU intervention.
The analog and serial interface integration helps to reduce system costs, while the optimized 8-bit circuit design helps designers achieve low power consumption and high performance levels similar to those associated with NEC Electronics’ other 78K0/Kx2 devices.
NEC Electronics America also provides a comprehensive suite of development tools to support the new 78K0/Kx2-A series. This includes software tools such as the CubeSuite integrated development environment, compiler, assembler, software debugger and code generator, as well as hardware tools such as NEC Electronics’ full-function IECube in-circuit emulator with real-time trace and MINICUBE2 on-chip debug emulator and stand-alone flash programmer.
The new 78K0/Kx2-A MCUs will be available in a 30-pin shrink-small outline package (SSOP) and 48-pin low-profile quad flat package (QFP) with flash memory capacities ranging from 16 to 32 kilobytes (KB).
Samples are available now and distribution suggested resale pricing begins at $1.65 in volumes of 10,000 units. Mass production of the new devices is slated to begin in July 2010.
Cypress intros PSoC 3 and PSoC 5 device selection tool for designers
SAN JOSE, USA: Cypress Semiconductor Corp. has introduced a new online product selection tool for its powerful new PSoC 3 and PSoC 5 architectures.
The Electronic Product Selector Guide, now available at www.cypress.com/go/PSoCePSG, streamlines the selection of the optimal PSoC device based on the peripheral functions a designer wants to implement in the programmable analog and digital resources.
As a user makes selections in the tool’s intuitive user interface, the “Results” field of applicable parts dynamically narrows down, displaying the part with the best match first. Once the search criteria are entered, the user can select devices to compare, click on the part numbers for more information, and rearrange the feature columns to highlight the most relevant data.
“It helps PSoC veterans and newcomers alike to quickly identify the ideal part for a design based on the desired peripheral functions, while also highlighting the unique flexibility of PSoC to solve a wide range of applications with the on-chip programmable analog and digital resources.”
The Electronic Product Selector Guide allows designers to easily customize:
* the number of ADCs, DACs, comparators, OpAmps, PGAs, TIAs and mixers needed in the analog subsystem;
* the number of timers, PWMs, counters and communications interfaces, including I2C, SPI, UART, I2S, Full-Speed USB and CAN, needed in the digital subsystem;
* the speed, microcontroller core, memory, voltage, temperature range and package in the CPU subsystem;
* advanced features such as CapSense touch-sensing, LCD direct drive and more.
PSoC 3 and PSoC 5 devices extend the world’s only programmable analog and digital embedded design platform, delivering unmatched time-to-market, integration and flexibility across 8-, 16-, and 32-bit applications.
The platform is powered by the revolutionary PSoC Creator Integrated Development Environment (IDE), which introduces a unique schematic-based design methodology along with fully tested, pre-packaged analog and digital peripherals easily customizable through user-intuitive wizards and APIs to meet specific design requirements.
“This new product selection tool makes it even easier to add the flexibility and integration of the PSoC platform into a design,” said Matt Branda, marketing director of PSoC Platform products at Cypress.
“It helps PSoC veterans and newcomers alike to quickly identify the ideal part for a design based on the desired peripheral functions, while also highlighting the unique flexibility of PSoC to solve a wide range of applications with the on-chip programmable analog and digital resources.”
Cypress is planning to expand the Electronic Product Selector Guide to include PSoC 1 devices later this year.
The Electronic Product Selector Guide, now available at www.cypress.com/go/PSoCePSG, streamlines the selection of the optimal PSoC device based on the peripheral functions a designer wants to implement in the programmable analog and digital resources.
As a user makes selections in the tool’s intuitive user interface, the “Results” field of applicable parts dynamically narrows down, displaying the part with the best match first. Once the search criteria are entered, the user can select devices to compare, click on the part numbers for more information, and rearrange the feature columns to highlight the most relevant data.
“It helps PSoC veterans and newcomers alike to quickly identify the ideal part for a design based on the desired peripheral functions, while also highlighting the unique flexibility of PSoC to solve a wide range of applications with the on-chip programmable analog and digital resources.”
The Electronic Product Selector Guide allows designers to easily customize:
* the number of ADCs, DACs, comparators, OpAmps, PGAs, TIAs and mixers needed in the analog subsystem;
* the number of timers, PWMs, counters and communications interfaces, including I2C, SPI, UART, I2S, Full-Speed USB and CAN, needed in the digital subsystem;
* the speed, microcontroller core, memory, voltage, temperature range and package in the CPU subsystem;
* advanced features such as CapSense touch-sensing, LCD direct drive and more.
PSoC 3 and PSoC 5 devices extend the world’s only programmable analog and digital embedded design platform, delivering unmatched time-to-market, integration and flexibility across 8-, 16-, and 32-bit applications.
The platform is powered by the revolutionary PSoC Creator Integrated Development Environment (IDE), which introduces a unique schematic-based design methodology along with fully tested, pre-packaged analog and digital peripherals easily customizable through user-intuitive wizards and APIs to meet specific design requirements.
“This new product selection tool makes it even easier to add the flexibility and integration of the PSoC platform into a design,” said Matt Branda, marketing director of PSoC Platform products at Cypress.
“It helps PSoC veterans and newcomers alike to quickly identify the ideal part for a design based on the desired peripheral functions, while also highlighting the unique flexibility of PSoC to solve a wide range of applications with the on-chip programmable analog and digital resources.”
Cypress is planning to expand the Electronic Product Selector Guide to include PSoC 1 devices later this year.
Tanner EDA adds Kelleher Systems as distributor for full-flow analog IC design tool suite
MONROVIA, USA: Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs) has signed a distribution agreement with Kelleher Systems, a New York-based reseller of electronic design automation (EDA) tools.
The agreement covers sales of Tanner’s full-flow analog IC design suite, HiPer Silicon, as well as related specialty design tools and services.
HiPer Silicon gives designers a complete analog design flow, from schematic capture, circuit simulation, and waveform probing to physical layout and verification, which is ideal for analog, mixed-signal, RF, and MEMS IC design.
The integrated tool suite shares a common architecture and common user interface that is consistent across all tools, resulting in a comprehensive, unified software solution. Over 5,000 customers worldwide use some or all of the HiPer Silicon suite to maximize design productivity in areas such as Verilog-A simulation, device layout acceleration, interactive auto-routing, foundry-compatible physical verification, and parasitic extraction.
“Tanner EDA’s 22-year track record of quality tools and superb customer support aligns perfectly with the needs of today’s IC designer,” said Bob Kelleher, president of Kelleher Systems. “We look forward to helping Tanner EDA bring improved productivity and shorter design cycles to A/MS designers throughout North America.”
Tanner EDA president Greg Lebsack added: “Bob Kelleher has been a powerful force in EDA sales for over 15 years. Our strong value proposition plus Bob’s understanding of the market and excellent track record will be a winning combination for our customers.”
The agreement covers sales of Tanner’s full-flow analog IC design suite, HiPer Silicon, as well as related specialty design tools and services.
HiPer Silicon gives designers a complete analog design flow, from schematic capture, circuit simulation, and waveform probing to physical layout and verification, which is ideal for analog, mixed-signal, RF, and MEMS IC design.
The integrated tool suite shares a common architecture and common user interface that is consistent across all tools, resulting in a comprehensive, unified software solution. Over 5,000 customers worldwide use some or all of the HiPer Silicon suite to maximize design productivity in areas such as Verilog-A simulation, device layout acceleration, interactive auto-routing, foundry-compatible physical verification, and parasitic extraction.
“Tanner EDA’s 22-year track record of quality tools and superb customer support aligns perfectly with the needs of today’s IC designer,” said Bob Kelleher, president of Kelleher Systems. “We look forward to helping Tanner EDA bring improved productivity and shorter design cycles to A/MS designers throughout North America.”
Tanner EDA president Greg Lebsack added: “Bob Kelleher has been a powerful force in EDA sales for over 15 years. Our strong value proposition plus Bob’s understanding of the market and excellent track record will be a winning combination for our customers.”
Avago files optical sensor IP lawsuit against STMicroelectronics
SAN JOSE, USA & SINGAPORE: Avago Technologies, a leading supplier of analog interface components for wired and wireless communications, industrial and consumer applications, announced that on March 15, 2010 Avago filed a patent infringement lawsuit in the U.S. District Court for the Eastern District of Texas against STMicroelectronics.
Avago alleges that certain STMicroelectronics products infringe four of Avago’s patents covering optical navigation technology and is seeks cash compensation and an order preventing further infringement of the technology.
Avago Technologies is a pioneer in the field of navigation sensors and has spent millions of dollars over many years developing the fundamental enabling technology behind optical mouse sensors as well as a number of novel improvements.
Avago’s General Counsel, Patricia H. McCall, stated: “Avago has devoted significant resources to inventing, developing and progressing the technology that enables the optical mouse. When necessary, we will defend our intellectual property against infringement.”
The case is Avago Technologies U.S. Inc. et al. v. STMicroelectronics Inc. et al., case number 10-cv-00092 in the U.S. District Court for the Eastern District of Texas. Avago is represented by Mayer Brown LLP and Potter Minton PC.
Avago alleges that certain STMicroelectronics products infringe four of Avago’s patents covering optical navigation technology and is seeks cash compensation and an order preventing further infringement of the technology.
Avago Technologies is a pioneer in the field of navigation sensors and has spent millions of dollars over many years developing the fundamental enabling technology behind optical mouse sensors as well as a number of novel improvements.
Avago’s General Counsel, Patricia H. McCall, stated: “Avago has devoted significant resources to inventing, developing and progressing the technology that enables the optical mouse. When necessary, we will defend our intellectual property against infringement.”
The case is Avago Technologies U.S. Inc. et al. v. STMicroelectronics Inc. et al., case number 10-cv-00092 in the U.S. District Court for the Eastern District of Texas. Avago is represented by Mayer Brown LLP and Potter Minton PC.
Amkor announces initial determination in ITC patent infringement case against Carsem
CHANDLER, USA: Amkor Technology Inc. said that the Administrative Law Judge in Amkor’s patent infringement case against Carsem in the International Trade Commission has issued a Supplemental Initial Determination.
Although the ALJ’s ruling did not disturb the prior finding that Carsem Dual and Quad Flat No-Lead Packages infringe some of Amkor’s patent claims relating to MicroLeadFrame (MLF) technology, the ALJ found that some of Amkor’s patent claims are invalid and, as a result, the ALJ did not find a statutory violation of the Tariff Act.
“The ALJ’s ruling is not final and we will now be taking steps to seek a ruling by the Commission to modify the ALJ’s decision and issue an exclusion order that would prohibit Carsem from importing its infringing QFN products into the United States.”
"We are disappointed that the Supplemental Initial Determination did not find a statutory violation of the Tariff Act and disagree with the ALJ’s conclusions regarding the invalidity of some of our asserted patent claims," said Ken Joyce, Amkor's President and CEO.
"The ALJ’s ruling is not final and we will now be taking steps to seek a ruling by the Commission to modify the ALJ’s decision and issue an exclusion order that would prohibit Carsem from importing its infringing QFN products into the United States.”
The target date for a final ruling by the Commission is July 20, 2010.
Although the ALJ’s ruling did not disturb the prior finding that Carsem Dual and Quad Flat No-Lead Packages infringe some of Amkor’s patent claims relating to MicroLeadFrame (MLF) technology, the ALJ found that some of Amkor’s patent claims are invalid and, as a result, the ALJ did not find a statutory violation of the Tariff Act.
“The ALJ’s ruling is not final and we will now be taking steps to seek a ruling by the Commission to modify the ALJ’s decision and issue an exclusion order that would prohibit Carsem from importing its infringing QFN products into the United States.”
"We are disappointed that the Supplemental Initial Determination did not find a statutory violation of the Tariff Act and disagree with the ALJ’s conclusions regarding the invalidity of some of our asserted patent claims," said Ken Joyce, Amkor's President and CEO.
"The ALJ’s ruling is not final and we will now be taking steps to seek a ruling by the Commission to modify the ALJ’s decision and issue an exclusion order that would prohibit Carsem from importing its infringing QFN products into the United States.”
The target date for a final ruling by the Commission is July 20, 2010.
Mentor Graphics, Platform Computing optimize use of Veloce emulation systems as shared resources
WILSONVILLE, USA: Mentor Graphics Corp. and Platform Computing, a leader in cluster, grid and cloud management software, have successfully deployed Platform LSF to optimize the use of Veloce emulation systems as shared resources. The implementation allows users to maximize utilization and increase emulation return on investment.
For companies that use Veloce emulators as a networked, shared resource, Platform LSF allows them to access multiple Veloce systems and partitions within individual systems without recompiling their designs.
This approach is in contrast to other emulators where the design is locked to a specific user partition during compilation. In this scenario, even when a partition becomes ‘free,’ there is no flexibility to run a job on the ‘free’ partition without a full recompile of the design.
In addition, to further leverage Platform LSF and the optimization of Veloce emulation systems, the Veloce Testbench Express (TBX) capabilities can replace the fixed hardware setup of in-circuit emulation with interface transactors. The transaction-based implementation takes the Veloce system from being configured to a single design to a general purpose emulation resource capable of running any design.
Maximize utilization with Platform LSF and Veloce
Platform LSF schedules jobs and establishes priority-based queues. Further, Platform LSF allocates the appropriate Veloce emulation resources to meet the specific verification needs and capacity requirements for verification job across multiple projects within a company. This scheduling maximizes the use of the Veloce systems, and is instrumental in supporting transaction-based accelerated verification environments.
To facilitate the optimized chip design and testing environment, both Mentor and Platform Computing added features to their products. The Veloce emulators now provide improved flexibility for multi-user access to available partitions without the need for compilation to a specific partition. Platform Computing added a knowledge base of the various Veloce family systems to be able to optimally queue up and allocate resources for verification jobs of different sizes across multiple projects.
“Our close collaboration with Mentor will empower our mutual customers in systems design and fabrication to maximize their resources and speed the time to market for the latest embedded chip technologies,” said Peter Nichol, general manager, HPC Business Unit, Platform Computing. “The custom-designed Veloce verification platforms that have been integrated with Platform LSF as part of the joint solution ensure a solution that easily allows designers to work on multiple work-load-intensive projects faster.”
“We worked closely with Platform Computing to leverage their expertise and create an environment that approaches ‘cloud emulation’,” said Eric Selosse, vice president and general manager, Mentor Emulation Division. “Our customers find that with the infrastructure we now provide, the ROI for their emulation investment is maximized, and they can better address the challenges in verifying their complex SoC designs.”
For companies that use Veloce emulators as a networked, shared resource, Platform LSF allows them to access multiple Veloce systems and partitions within individual systems without recompiling their designs.
This approach is in contrast to other emulators where the design is locked to a specific user partition during compilation. In this scenario, even when a partition becomes ‘free,’ there is no flexibility to run a job on the ‘free’ partition without a full recompile of the design.
In addition, to further leverage Platform LSF and the optimization of Veloce emulation systems, the Veloce Testbench Express (TBX) capabilities can replace the fixed hardware setup of in-circuit emulation with interface transactors. The transaction-based implementation takes the Veloce system from being configured to a single design to a general purpose emulation resource capable of running any design.
Maximize utilization with Platform LSF and Veloce
Platform LSF schedules jobs and establishes priority-based queues. Further, Platform LSF allocates the appropriate Veloce emulation resources to meet the specific verification needs and capacity requirements for verification job across multiple projects within a company. This scheduling maximizes the use of the Veloce systems, and is instrumental in supporting transaction-based accelerated verification environments.
To facilitate the optimized chip design and testing environment, both Mentor and Platform Computing added features to their products. The Veloce emulators now provide improved flexibility for multi-user access to available partitions without the need for compilation to a specific partition. Platform Computing added a knowledge base of the various Veloce family systems to be able to optimally queue up and allocate resources for verification jobs of different sizes across multiple projects.
“Our close collaboration with Mentor will empower our mutual customers in systems design and fabrication to maximize their resources and speed the time to market for the latest embedded chip technologies,” said Peter Nichol, general manager, HPC Business Unit, Platform Computing. “The custom-designed Veloce verification platforms that have been integrated with Platform LSF as part of the joint solution ensure a solution that easily allows designers to work on multiple work-load-intensive projects faster.”
“We worked closely with Platform Computing to leverage their expertise and create an environment that approaches ‘cloud emulation’,” said Eric Selosse, vice president and general manager, Mentor Emulation Division. “Our customers find that with the infrastructure we now provide, the ROI for their emulation investment is maximized, and they can better address the challenges in verifying their complex SoC designs.”
Cadence teams with AcAe to accelerate customer transitions to Allegro PCB products
SAN JOSE, USA: Cadence Design Systems Inc. is teaming with American Computer Aided Engineering (AcAe), a dedicated CAD/CAE support services provider and design bureau, to assist customers transitioning from competing legacy CAD systems to Cadence Allegro PCB technologies and methodologies.
With 24 years of experience in the electronic design automation industry, AcAe is helping Cadence PCB customers meet time-to-market commitments with design services and ease new product adoption as they migrate to and deploy Cadence Allegro technology.
“The translation results from Expedition to Allegro PCB Editor look great,” said Brian Doherty, manufacturing engineer of Polychromix. “I wasn’t sure what to expect based on how other translators have historically handled design translations but the Allegro design is a one-for-one match in every way that I can see. By utilizing the services provided by AcAe, we were able to save weeks in our re-spin cycle thereby comfortably meeting our schedule demands.”
Cadence customers migrating to Allegro PCB solutions can now take advantage of the worldwide onsite and remote access design services that AcAe provides, including Cadence Allegro library development, schematic entry and PCB design layout services. AcAe also delivers Allegro schematic and PCB design migration services via its innovative DART technology.
This technology can help customers quickly and easily reuse existing legacy schematic and PCB design data in a Cadence environment, thereby reducing adoption time and minimizing the risk of transition by maintaining the integrity of their designs.
“As more companies turn to Cadence to address their toughest PCB challenges, AcAe’s capabilities and experience should make the migration of legacy data and integration of our products easier than ever,” said Linda Mazzitelli, product marketing director at Cadence Design Systems. “That can translate to improved productivity with shorter implementation time. With AcAe and Cadence working together, customers can count on a team of experienced professionals to help them make a smooth transition to our world-class PCB technology.”
“AcAe software has taken migration from the dark ages of translators into the 21st century. Our DART technology can migrate the most complex PCB designs with an ease and accuracy never before achieved,” said Bill Basten, CEO of AcAe (www.AcAe.com). “This means companies moving to Cadence PCB technology can likely avoid spending days or weeks performing ‘cleanup’ on poorly translated data. Migrated data is fully usable and ready to go.”
With 24 years of experience in the electronic design automation industry, AcAe is helping Cadence PCB customers meet time-to-market commitments with design services and ease new product adoption as they migrate to and deploy Cadence Allegro technology.
“The translation results from Expedition to Allegro PCB Editor look great,” said Brian Doherty, manufacturing engineer of Polychromix. “I wasn’t sure what to expect based on how other translators have historically handled design translations but the Allegro design is a one-for-one match in every way that I can see. By utilizing the services provided by AcAe, we were able to save weeks in our re-spin cycle thereby comfortably meeting our schedule demands.”
Cadence customers migrating to Allegro PCB solutions can now take advantage of the worldwide onsite and remote access design services that AcAe provides, including Cadence Allegro library development, schematic entry and PCB design layout services. AcAe also delivers Allegro schematic and PCB design migration services via its innovative DART technology.
This technology can help customers quickly and easily reuse existing legacy schematic and PCB design data in a Cadence environment, thereby reducing adoption time and minimizing the risk of transition by maintaining the integrity of their designs.
“As more companies turn to Cadence to address their toughest PCB challenges, AcAe’s capabilities and experience should make the migration of legacy data and integration of our products easier than ever,” said Linda Mazzitelli, product marketing director at Cadence Design Systems. “That can translate to improved productivity with shorter implementation time. With AcAe and Cadence working together, customers can count on a team of experienced professionals to help them make a smooth transition to our world-class PCB technology.”
“AcAe software has taken migration from the dark ages of translators into the 21st century. Our DART technology can migrate the most complex PCB designs with an ease and accuracy never before achieved,” said Bill Basten, CEO of AcAe (www.AcAe.com). “This means companies moving to Cadence PCB technology can likely avoid spending days or weeks performing ‘cleanup’ on poorly translated data. Migrated data is fully usable and ready to go.”
Synopsys Galaxy Implementation Platform enables first-pass silicon success on Infineon's 40nm X-GOLD 626 wireless product
MOUNTAIN VIEW, USA: Synopsys Inc. announced that the Galaxy Implementation Platform has helped Infineon Technologies AG achieve first-pass silicon success of the 40-nanometer (nm) baseband processor for its X-GOLD 626 3G wireless analog and digital system-in-package (SIP).
Infineon utilized the Galaxy platform's powerful implementation flow to optimize the chip's multiple functional modes with multi-corner/multi-mode (MCMM) technology, taking advantage of the links between Synopsys' Design Compiler RTL synthesis solution and IC Compiler placement and routing.
The Galaxy platform's extensive support for low power and hierarchical design techniques, coupled with its signoff capabilities, was essential to achieve Infineon's tight schedule and high-performance, low power and area goals. As a result, Infineon met its design targets and taped out the baseband processor for the X-GOLD 626 wireless product ahead of schedule.
"One of the key challenges we had in designing the X-GOLD 626 baseband processor was optimizing the design for highest performance and lowest power, without compromising on robustness and quality," said Hartmut Hiller, vice president of Design Methodology and Implementation at Infineon Technologies.
"Synopsys' Galaxy platform includes essential advanced low power capabilities which, along with its strength in hierarchical design and concurrent MCMM optimization, were critical to our first-pass silicon success. Synopsys' excellent global support and the Galaxy platform's robust implementation and signoff technologies, we successfully taped out the chip ahead of schedule."
Infineon's X-GOLD 626 is a complex multi-million-gate analog and digital SIP that integrates a power management unit to enable best-in-class power consumption in both active and idle modes. Infineon's design team captured the chip's complex power architecture with the IEEE 1801 (UPF) standard.
Power management features implemented using the Galaxy platform included voltage islands with MTCMOS power gating and multi-threshold libraries. In addition, by implementing a hierarchical design flow and support for multiple internal clocks, the Galaxy platform delivered outstanding quality of results, meeting Infineon's high-performance, low power and area goals.
"Our customers are facing several challenges: to produce the highest-quality products within the shortest amount of time and with best-in-class performance, power and area," said Dr. Antun Domic, senior vice president and general manager, Implementation Group at Synopsys.
"Infineon's decision to deploy our Galaxy Implementation Platform, including IC Compiler, for their advanced wireless designs will enable them to continue to aggressively focus on bringing differentiated wireless SoC solutions to market."
Infineon utilized the Galaxy platform's powerful implementation flow to optimize the chip's multiple functional modes with multi-corner/multi-mode (MCMM) technology, taking advantage of the links between Synopsys' Design Compiler RTL synthesis solution and IC Compiler placement and routing.
The Galaxy platform's extensive support for low power and hierarchical design techniques, coupled with its signoff capabilities, was essential to achieve Infineon's tight schedule and high-performance, low power and area goals. As a result, Infineon met its design targets and taped out the baseband processor for the X-GOLD 626 wireless product ahead of schedule.
"One of the key challenges we had in designing the X-GOLD 626 baseband processor was optimizing the design for highest performance and lowest power, without compromising on robustness and quality," said Hartmut Hiller, vice president of Design Methodology and Implementation at Infineon Technologies.
"Synopsys' Galaxy platform includes essential advanced low power capabilities which, along with its strength in hierarchical design and concurrent MCMM optimization, were critical to our first-pass silicon success. Synopsys' excellent global support and the Galaxy platform's robust implementation and signoff technologies, we successfully taped out the chip ahead of schedule."
Infineon's X-GOLD 626 is a complex multi-million-gate analog and digital SIP that integrates a power management unit to enable best-in-class power consumption in both active and idle modes. Infineon's design team captured the chip's complex power architecture with the IEEE 1801 (UPF) standard.
Power management features implemented using the Galaxy platform included voltage islands with MTCMOS power gating and multi-threshold libraries. In addition, by implementing a hierarchical design flow and support for multiple internal clocks, the Galaxy platform delivered outstanding quality of results, meeting Infineon's high-performance, low power and area goals.
"Our customers are facing several challenges: to produce the highest-quality products within the shortest amount of time and with best-in-class performance, power and area," said Dr. Antun Domic, senior vice president and general manager, Implementation Group at Synopsys.
"Infineon's decision to deploy our Galaxy Implementation Platform, including IC Compiler, for their advanced wireless designs will enable them to continue to aggressively focus on bringing differentiated wireless SoC solutions to market."
Global semicon revenue fell by over 10 percent in 2009
STAMFORD, USA: The total worldwide semiconductor revenue reached $228.4 billion in 2009, down $26.8 billion, or 10.5 percent, from 2008, according to Gartner Inc.
Gartner said that this is the first time the industry has seen two consecutive years of revenue declines. However, the industry performed much better than expected in the second half, setting the stage for strong 2010 growth against weak comparables.
"After an unprecedented decline in the fourth quarter of 2008 and the first quarter of 2009, sequential quarterly revenue growth for the industry overall was very strong in the last three quarters of 2009," said Peter Middleton, principal research analyst at Gartner. "As a result, 2009 performance overall was much milder than initially feared in the aftermath of the financial crisis."
Gartner's annual semiconductor market share analysis examines and ranks the worldwide and regional revenue for more than 270 semiconductor suppliers in 64 separate product categories and eight major market categories. It serves as a benchmark for semiconductor industry performance, as well as a means for individual companies to assess their revenue performance against their competitors.
Intel held the No. 1 position for the 18th consecutive year. It increased its market share to 14.6 percent in 2009 from 13.6 percent (see Table 1) despite its revenue declining $1.6 billion. This performance was primarily due to the relative strength of the PC market, mobiles in particular, which sold well despite the recession.
Table 1: Top 10 Semiconductor Vendors by Revenue Estimates, 2009 (Millions of US Dollars)
Source: Gartner (March 2010)
Samsung Electronics was one of the few companies to see a revenue increase in 2009. Part of the reason for this was that its main product lines, DRAM and NAND flash, had already seen strong declines in 2008, causing the vendors to quickly react to 2009 conditions by adjusting supply. This forced up pricing substantially through the year for both product areas and, combined with Samsung's technology lead and strong financial position, resulted in revenue growth.
Hynix Semiconductor, like its rival Samsung, saw revenue growth. For Hynix, the growth came from the DRAM market, where it was able to gain share and increase revenue in a market that saw revenue decline.
Infineon had the largest decline, with its overall revenue down 43.1 percent, due to the bankruptcy of its Qimonda memory business and the divestiture of its Wireline Communications unit. When these two business units are removed from the equation, the remainder of Infineon declined 16.1 percent overall, which was roughly in line with its direct peers.
Vendor relative industry performance
Market share tables by themselves give a good indication of which vendors did well or badly during a year, but they do not tell the whole story. More often than not, a strong or weak performance by a vendor is a result of the overall market growth of the device areas that the vendor participates in.
Gartner's relative industry performance (RIP) index measures the difference between industry-specific growth for a company and actual growth, showing which are transforming their businesses by growing share or moving into new markets and choosing their customers wisely.
MediaTek led the RIP index in 2009, and its impressive performance was achieved almost entirely based on its performance in the wireless market, though it also performed relatively well in the consumer area. MediaTek (No. 18 overall) was the strongest-performing wireless semiconductor vendor with 42.5 percent growth compared with 2008. The company benefited from strong unit growth in the Chinese gray market but also expanded its design wins with Tier 1 vendors, including LG and Motorola.
Elpida (No. 16 overall) was once again the No. 2 vendor in Gartner's RIP ranking. It was able to gain share in the DRAM market because its capacity growth was almost twice that of the industry as it took more production from its joint venture production company, Rexchip, as its partner Powerchip struggled for survival. This additional capacity allowed Elpida to pick up market share from the bankrupt Qimonda.
Gartner said that this is the first time the industry has seen two consecutive years of revenue declines. However, the industry performed much better than expected in the second half, setting the stage for strong 2010 growth against weak comparables.
"After an unprecedented decline in the fourth quarter of 2008 and the first quarter of 2009, sequential quarterly revenue growth for the industry overall was very strong in the last three quarters of 2009," said Peter Middleton, principal research analyst at Gartner. "As a result, 2009 performance overall was much milder than initially feared in the aftermath of the financial crisis."
Gartner's annual semiconductor market share analysis examines and ranks the worldwide and regional revenue for more than 270 semiconductor suppliers in 64 separate product categories and eight major market categories. It serves as a benchmark for semiconductor industry performance, as well as a means for individual companies to assess their revenue performance against their competitors.
Intel held the No. 1 position for the 18th consecutive year. It increased its market share to 14.6 percent in 2009 from 13.6 percent (see Table 1) despite its revenue declining $1.6 billion. This performance was primarily due to the relative strength of the PC market, mobiles in particular, which sold well despite the recession.
Table 1: Top 10 Semiconductor Vendors by Revenue Estimates, 2009 (Millions of US Dollars)
Source: Gartner (March 2010)Samsung Electronics was one of the few companies to see a revenue increase in 2009. Part of the reason for this was that its main product lines, DRAM and NAND flash, had already seen strong declines in 2008, causing the vendors to quickly react to 2009 conditions by adjusting supply. This forced up pricing substantially through the year for both product areas and, combined with Samsung's technology lead and strong financial position, resulted in revenue growth.
Hynix Semiconductor, like its rival Samsung, saw revenue growth. For Hynix, the growth came from the DRAM market, where it was able to gain share and increase revenue in a market that saw revenue decline.
Infineon had the largest decline, with its overall revenue down 43.1 percent, due to the bankruptcy of its Qimonda memory business and the divestiture of its Wireline Communications unit. When these two business units are removed from the equation, the remainder of Infineon declined 16.1 percent overall, which was roughly in line with its direct peers.
Vendor relative industry performance
Market share tables by themselves give a good indication of which vendors did well or badly during a year, but they do not tell the whole story. More often than not, a strong or weak performance by a vendor is a result of the overall market growth of the device areas that the vendor participates in.
Gartner's relative industry performance (RIP) index measures the difference between industry-specific growth for a company and actual growth, showing which are transforming their businesses by growing share or moving into new markets and choosing their customers wisely.
MediaTek led the RIP index in 2009, and its impressive performance was achieved almost entirely based on its performance in the wireless market, though it also performed relatively well in the consumer area. MediaTek (No. 18 overall) was the strongest-performing wireless semiconductor vendor with 42.5 percent growth compared with 2008. The company benefited from strong unit growth in the Chinese gray market but also expanded its design wins with Tier 1 vendors, including LG and Motorola.
Elpida (No. 16 overall) was once again the No. 2 vendor in Gartner's RIP ranking. It was able to gain share in the DRAM market because its capacity growth was almost twice that of the industry as it took more production from its joint venture production company, Rexchip, as its partner Powerchip struggled for survival. This additional capacity allowed Elpida to pick up market share from the bankrupt Qimonda.
ZT Systems launches AMD Opteron 6100 series processor-based servers
SECAUCUS, USA: ZT Systems, a leading provider of customized, cost-effective server solutions for large-scale data centers, today announced new server solutions featuring the powerful AMD Opteron 6100 Series processor, previously codenamed “Magny-Cours.”
The 1U ZT Systems1241Ra and 2U 2210Ra servers based on this new technology provide advanced scalability and performance, with up to 24 cores in a 2P platform and approximately twice the memory bandwidth of ZT’s previous generation AMD Opteron processor-powered 2P servers.
ZT’s custom platform engineering, integration and delivery capabilities combine with this new technology to enable precision-fit solutions to the unique technical and business requirements of individual data centers, from the small and medium enterprise to large-scale cloud computing providers.
“ZT is pleased work with AMD in supporting customers with this new platform,” said Bob Weisickle, ZT Systems Chief Technical Officer.
“With the potential to achieve 4P performance at 2P economics, the AMD Opteron 6000 Series platform is a great complement to ZT’s expertise in engineering cost-effective solutions designed for the requirements of individual data centers. The promise of full-featured performance in a high efficiency solution is compelling for our cloud computing customers, who need to get the most out of every watt in high density server installations.”
"ZT Systems servers featuring the AMD Opteron 6100 Series processor provide greater throughput, exceptional value and readiness to scale than previous generations," said Patrick Patla, vice president and general manager, Server and Embedded Divisions, AMD. "With ZT rapidly bringing customized solutions featuring this new technology to market, we look forward to together enabling data center customers to help reach new levels of performance and energy efficiency.”
ZT Systems’ customized hardware featuring groundbreaking new technology is complemented by specialized programs designed exclusively for data center clients -- with individualized service and support offerings, and custom, streamlined logistics solutions. Data center customers can work with experienced, highly knowledgeable engineering staff to develop unique solutions to meet their technical priorities.
ZT’s customized products and programs offer an array of advantages to deliver true business value to data center operations, finance, and engineering stakeholders within the enterprise.
The 1U ZT Systems1241Ra and 2U 2210Ra servers based on this new technology provide advanced scalability and performance, with up to 24 cores in a 2P platform and approximately twice the memory bandwidth of ZT’s previous generation AMD Opteron processor-powered 2P servers.
ZT’s custom platform engineering, integration and delivery capabilities combine with this new technology to enable precision-fit solutions to the unique technical and business requirements of individual data centers, from the small and medium enterprise to large-scale cloud computing providers.
“ZT is pleased work with AMD in supporting customers with this new platform,” said Bob Weisickle, ZT Systems Chief Technical Officer.
“With the potential to achieve 4P performance at 2P economics, the AMD Opteron 6000 Series platform is a great complement to ZT’s expertise in engineering cost-effective solutions designed for the requirements of individual data centers. The promise of full-featured performance in a high efficiency solution is compelling for our cloud computing customers, who need to get the most out of every watt in high density server installations.”
"ZT Systems servers featuring the AMD Opteron 6100 Series processor provide greater throughput, exceptional value and readiness to scale than previous generations," said Patrick Patla, vice president and general manager, Server and Embedded Divisions, AMD. "With ZT rapidly bringing customized solutions featuring this new technology to market, we look forward to together enabling data center customers to help reach new levels of performance and energy efficiency.”
ZT Systems’ customized hardware featuring groundbreaking new technology is complemented by specialized programs designed exclusively for data center clients -- with individualized service and support offerings, and custom, streamlined logistics solutions. Data center customers can work with experienced, highly knowledgeable engineering staff to develop unique solutions to meet their technical priorities.
ZT’s customized products and programs offer an array of advantages to deliver true business value to data center operations, finance, and engineering stakeholders within the enterprise.
MIPS Technologies, Virage Logic to offer optimized embedded memory IP
SUNNYVALE & FREMONT, USA: MIPS Technologies, a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, and Virage Logic Corp., the semiconductor industry's trusted IP partner, are teaming to offer optimized embedded memory IP for joint customers.
With SRAM memory instances from the Virage Logic ASAP 90nm and SiWare 65GP High Density SRAM compiler families specifically optimized for MIPS32 processors, customers can speed development of complex SoCs targeted for Blu-ray DVD, HDTV, IPTV, set-top box and broadband customer premises equipment (CPE) devices.
"To support the rapidly growing consumer multimedia market, we're working with companies in the MIPS ecosystem to provide integrated solutions that help customers get to market quickly with greatly reduced system costs," said Art Swift, vice president of marketing, MIPS Technologies. "As a part of this strategy, we are pleased to team with our long-time physical IP partner Virage Logic to offer optimized memories that help customers reach performance levels simply not possible from other embedded CPU vendors at these price points."
"Virage Logic is excited to work with MIPS Technologies on yet another collaborative effort to benefit set-top box and broadband developers," said Brani Buric, executive vice president of marketing and sales at Virage Logic. "By integrating high speed instances from Virage Logic's SiWare and ASAP memories with MIPS processors, our customers can achieve a tightly-integrated, high-performance solution that accelerates chip development, helps manage cost, and shortens time-to-market."
The ASAP 90nm and SiWare 65GP SRAM instances were jointly developed by MIPS Technologies and Virage Logic for the MIPS32 4KE, 24K, 24KE, 34K, 74K and 1004K processor core families.
Each Virage Logic ASAP and SiWare Memory High Density SRAM instance is offered at a special price compared to a full-featured SRAM compiler. Additional instances and full featured compilers are also available.
With SRAM memory instances from the Virage Logic ASAP 90nm and SiWare 65GP High Density SRAM compiler families specifically optimized for MIPS32 processors, customers can speed development of complex SoCs targeted for Blu-ray DVD, HDTV, IPTV, set-top box and broadband customer premises equipment (CPE) devices.
"To support the rapidly growing consumer multimedia market, we're working with companies in the MIPS ecosystem to provide integrated solutions that help customers get to market quickly with greatly reduced system costs," said Art Swift, vice president of marketing, MIPS Technologies. "As a part of this strategy, we are pleased to team with our long-time physical IP partner Virage Logic to offer optimized memories that help customers reach performance levels simply not possible from other embedded CPU vendors at these price points."
"Virage Logic is excited to work with MIPS Technologies on yet another collaborative effort to benefit set-top box and broadband developers," said Brani Buric, executive vice president of marketing and sales at Virage Logic. "By integrating high speed instances from Virage Logic's SiWare and ASAP memories with MIPS processors, our customers can achieve a tightly-integrated, high-performance solution that accelerates chip development, helps manage cost, and shortens time-to-market."
The ASAP 90nm and SiWare 65GP SRAM instances were jointly developed by MIPS Technologies and Virage Logic for the MIPS32 4KE, 24K, 24KE, 34K, 74K and 1004K processor core families.
Each Virage Logic ASAP and SiWare Memory High Density SRAM instance is offered at a special price compared to a full-featured SRAM compiler. Additional instances and full featured compilers are also available.
Pigeon Point Systems delivers MMC management solution using SmartFusion FPGAs
MOUNTAIN VIEW, USA: Pigeon Point Systems (PPS), an Actel company has announced a new Module Management Controller (MMC) Board Management Reference (BMR) Starter Kit based on Actel's SmartFusion intelligent mixed signal FPGAs.
SmartFusion is the only device that integrates an FPGA, hard ARM® Cortex-M3-based microcontroller subsystem (MSS) and programmable analog. The new kit addresses the MMCs on AdvancedMC (AMC) modules, which are used in both AdvancedTCA (ATCA) carriers and MicroTCA (uTCA) shelves, collectively referenced as xTCA.
Combining compliance, interoperability and responsive support from Pigeon Point Systems with the unique intelligent mixed-signal capabilities of the flash-based SmartFusion device accelerates customer design cycles and enables designers to concentrate on differentiating their AMC module products.
Actel's commitment to the strong worldwide adoption of xTCA by telecom equipment manufacturers is reinforced by continuing to deliver such comprehensive solutions to its customers.
The newest solution from Pigeon Point Systems delivers a complete hardware plus firmware solution with solid documentation and support. Pigeon Point has built an extensive track record of success in hardware platform management applications with the most demanding telecommunications equipment manufacturers and their suppliers.
Now, with the new MMC BMR Starter Kit based on the SmartFusion chip, Pigeon Point Systems provides another strong solution to xTCA system designers.
Compared to other core silicon used for xTCA management controllers, SmartFusion extends valuable features for xTCA management controllers including:
* Customizability due to the built-in flash FPGA, which can integrate board-specific logic into the SmartFusion chip, reducing footprint and cost; in addition, relevant selections from Actel's rich library of IP blocks can be installed in the FPGA fabric to augment the hard-logic peripherals as needed.
* Higher processor performance with a 32-bit ARM Cortex-M3 core, which runs at 40 MHz in this context.
* Advanced analog processing with zero load on the ARM processor to do xTCA-aware analog sensor monitoring; xTCA-oriented analog sensors and other analog sensors are configured and processed in a unified way in the programmable analog subsystem.
Included in the kit is a benchtop management controller development board that is implemented in an AMC form factor, which means that it can be inserted into any compliant AMC slot.
In addition, the kit incorporates a complete SmartFusion FPGA design in a Libero Integrated Design Environment (IDE) project, complete firmware including full source code in C for both the management controller code and development tools, comprehensive documentation and a production license that grants designers the rights needed to design and bring to market an AMC product.
There are two kit variants: one for customers who choose to work in an ATCA-focused bench top context and the other for companies who prefer to work in a uTCA-focused bench top context.
SmartFusion is the only device that integrates an FPGA, hard ARM® Cortex-M3-based microcontroller subsystem (MSS) and programmable analog. The new kit addresses the MMCs on AdvancedMC (AMC) modules, which are used in both AdvancedTCA (ATCA) carriers and MicroTCA (uTCA) shelves, collectively referenced as xTCA.
Combining compliance, interoperability and responsive support from Pigeon Point Systems with the unique intelligent mixed-signal capabilities of the flash-based SmartFusion device accelerates customer design cycles and enables designers to concentrate on differentiating their AMC module products.
Actel's commitment to the strong worldwide adoption of xTCA by telecom equipment manufacturers is reinforced by continuing to deliver such comprehensive solutions to its customers.
The newest solution from Pigeon Point Systems delivers a complete hardware plus firmware solution with solid documentation and support. Pigeon Point has built an extensive track record of success in hardware platform management applications with the most demanding telecommunications equipment manufacturers and their suppliers.
Now, with the new MMC BMR Starter Kit based on the SmartFusion chip, Pigeon Point Systems provides another strong solution to xTCA system designers.
Compared to other core silicon used for xTCA management controllers, SmartFusion extends valuable features for xTCA management controllers including:
* Customizability due to the built-in flash FPGA, which can integrate board-specific logic into the SmartFusion chip, reducing footprint and cost; in addition, relevant selections from Actel's rich library of IP blocks can be installed in the FPGA fabric to augment the hard-logic peripherals as needed.
* Higher processor performance with a 32-bit ARM Cortex-M3 core, which runs at 40 MHz in this context.
* Advanced analog processing with zero load on the ARM processor to do xTCA-aware analog sensor monitoring; xTCA-oriented analog sensors and other analog sensors are configured and processed in a unified way in the programmable analog subsystem.
Included in the kit is a benchtop management controller development board that is implemented in an AMC form factor, which means that it can be inserted into any compliant AMC slot.
In addition, the kit incorporates a complete SmartFusion FPGA design in a Libero Integrated Design Environment (IDE) project, complete firmware including full source code in C for both the management controller code and development tools, comprehensive documentation and a production license that grants designers the rights needed to design and bring to market an AMC product.
There are two kit variants: one for customers who choose to work in an ATCA-focused bench top context and the other for companies who prefer to work in a uTCA-focused bench top context.
QuickLogic first to market display controller solution supporting 60 fps content refresh over MDDI Type 2
SUNNYVALE, USA: QuickLogic Corp., the lowest power programmable solutions leader, has successfully delivered the first complete display controller solution using the Mobile Display Data Interface (MDDI) Type 2 interface for smartbook, smartphone and tablet applications using Qualcomm chipsets.
Additionally, QuickLogic has verified the solution’s operation as an MDDI Type 2 (dual lane) client running 60 frames/second (fps) at Full-Wide VGA (FWVGA) resolution. The solution is implemented on an ArcticLink II VX4C solution platform, which includes QuickLogic’s Visual Enhancement Engine (VEE) and Display Power Optimizer (DPO). This allows developers to deliver smoother, more fluid-like movement for multimedia and high-resolution gaming applications.
QuickLogic’s MDDI Type 2 solution is available as a Proven System Block (PSB) for Customer Specific Standard Products (CSSPs) developed from the ArcticLink II VX4C solution platform. Also included in the VX4C solution platform are the VEE and DPO PSBs. VEE enables sunlight viewability on mobile displays through pixel-by-pixel dynamic range control, while DPO significantly reduces display power consumption through intelligent control of backlight brightness.
“Mobile processors have reached the horsepower threshold at which they can support higher end multimedia and gaming applications,” said Brian Faith, QuickLogic’s vice president of worldwide marketing.
“Additionally, cost effective, high resolution mobile touchscreen technology, and the opening up of mobile operating systems to third party developers has enabled consumer use cases traditionally only achievable on PCs or laptops. Developers using this technology now have a VEE and DPO-enabled solution that reaches the 60 fps threshold via the MDDI Type 2 interface.”
Reference designs of the MDDI Type 2 Display Controller Solution have been system-proven with Qualcomm’s MSM7x30 and QSD8x50 chipsets running the Google Android operating system and are available immediately.
Additionally, QuickLogic has verified the solution’s operation as an MDDI Type 2 (dual lane) client running 60 frames/second (fps) at Full-Wide VGA (FWVGA) resolution. The solution is implemented on an ArcticLink II VX4C solution platform, which includes QuickLogic’s Visual Enhancement Engine (VEE) and Display Power Optimizer (DPO). This allows developers to deliver smoother, more fluid-like movement for multimedia and high-resolution gaming applications.
QuickLogic’s MDDI Type 2 solution is available as a Proven System Block (PSB) for Customer Specific Standard Products (CSSPs) developed from the ArcticLink II VX4C solution platform. Also included in the VX4C solution platform are the VEE and DPO PSBs. VEE enables sunlight viewability on mobile displays through pixel-by-pixel dynamic range control, while DPO significantly reduces display power consumption through intelligent control of backlight brightness.
“Mobile processors have reached the horsepower threshold at which they can support higher end multimedia and gaming applications,” said Brian Faith, QuickLogic’s vice president of worldwide marketing.
“Additionally, cost effective, high resolution mobile touchscreen technology, and the opening up of mobile operating systems to third party developers has enabled consumer use cases traditionally only achievable on PCs or laptops. Developers using this technology now have a VEE and DPO-enabled solution that reaches the 60 fps threshold via the MDDI Type 2 interface.”
Reference designs of the MDDI Type 2 Display Controller Solution have been system-proven with Qualcomm’s MSM7x30 and QSD8x50 chipsets running the Google Android operating system and are available immediately.
IDT intros industry-first programmable low power timing devices optimized for portable consumer apps
SAN JOSE, USA: IDT (Integrated Device Technology Inc.) has announced the newest members of its IDT VersaClock family of timing devices.
The VersaClock low power (LP) devices are programmable clock generators specifically designed to reduce power consumption and optimize board layout in battery-operated consumer applications including smart mobile handsets, personal navigation devices, MP3 players, camcorders, and other handheld applications
The new timing devices offer a significant reduction in power consumption to meet the increasing demand for power efficiency in consumer electronic devices. The VersaClock LP devices help extend the battery life for today’s portable electronics by reducing the power requirement from 30-40mW to 4-8mW for a single clock output.
The VersaClock LP solutions also significantly reduce the power usage during power down (20uW) and sleep mode with 32kHz clock active (200uW). These are new low power benchmarks for the industry.
The five new VersaClock LP devices (5P49EE801, 5P49EE802, 5P49EE601, 5P49EE602 and 5P49EE502) all feature four internal PLLs, each individually programmable and able to generate four unique frequencies, helping optimize the performance of each individual clock output and improving system accuracy. To give designers great flexibility, the frequencies are may be generated from a clock input, a single TCXO or fundamental mode crystal reference. Using a single reference clock allows designers to simplify design and save board space while still maintaining accuracy.
One of the four internal PLLs supports spread spectrum generation which reduces electromagnetic interference (EMI), which is necessary for meeting FCC and other certification requirements. Moreover, the new VersaClock devices can generate frequencies from 5kHz to 120MHz, which enables greater design flexibility for portable consumer applications.
In addition, the devices are also compatible with many different output types — from single-ended LVCMOS to differential LVDS — to support various types of timing systems with a single device, simplifying design and optimizing board layout.
The VersaClock low power devices are available in several package options, including 20-pin and 24-pin QFN. The new devices are sampling to qualified customers and range in price from $0.80 to $1.25 for 10,000 units. Evaluation boards are available for qualified customers.
The VersaClock low power (LP) devices are programmable clock generators specifically designed to reduce power consumption and optimize board layout in battery-operated consumer applications including smart mobile handsets, personal navigation devices, MP3 players, camcorders, and other handheld applications
The new timing devices offer a significant reduction in power consumption to meet the increasing demand for power efficiency in consumer electronic devices. The VersaClock LP devices help extend the battery life for today’s portable electronics by reducing the power requirement from 30-40mW to 4-8mW for a single clock output.
The VersaClock LP solutions also significantly reduce the power usage during power down (20uW) and sleep mode with 32kHz clock active (200uW). These are new low power benchmarks for the industry.
The five new VersaClock LP devices (5P49EE801, 5P49EE802, 5P49EE601, 5P49EE602 and 5P49EE502) all feature four internal PLLs, each individually programmable and able to generate four unique frequencies, helping optimize the performance of each individual clock output and improving system accuracy. To give designers great flexibility, the frequencies are may be generated from a clock input, a single TCXO or fundamental mode crystal reference. Using a single reference clock allows designers to simplify design and save board space while still maintaining accuracy.
One of the four internal PLLs supports spread spectrum generation which reduces electromagnetic interference (EMI), which is necessary for meeting FCC and other certification requirements. Moreover, the new VersaClock devices can generate frequencies from 5kHz to 120MHz, which enables greater design flexibility for portable consumer applications.
In addition, the devices are also compatible with many different output types — from single-ended LVCMOS to differential LVDS — to support various types of timing systems with a single device, simplifying design and optimizing board layout.
The VersaClock low power devices are available in several package options, including 20-pin and 24-pin QFN. The new devices are sampling to qualified customers and range in price from $0.80 to $1.25 for 10,000 units. Evaluation boards are available for qualified customers.
Monday, March 29, 2010
Linde’s Electronics and Specialty Gases business in North America completes integration of Spectra Gases
MURRAY HILL & NEW PROVIDENCE, USA: The integration of Spectra Gases into Linde North America is now complete and customers throughout the world will benefit from the synergy it has created.
Linde North America is a member of The Linde Group, a leading global gases and engineering company. Spectra Gases, which Linde purchased in 2006, has been a global leader in the next generation of fine chemicals and high-purity gases and is now part of Linde North America’s Electronics and Specialty Gases business.
The integration of Spectra’s high-end line of specialty gases, chemicals, isotopic gases and fluorine based mixtures for niche and critical applications complements Linde’s broader range of offerings across the balance of packaged gases products and applications.
“With this integration Linde now offers customers the most comprehensive line of packaged gas products and services in the industry,” said Cliff Caldwell, vice president for Linde’s Electronics and Specialty Gases business in North America.
Linde’s Electronics and Specialty Gases business is a leading global supplier of a wide array of products and services, ranging from rare gases and calibration gases in the parts per billion to electronic process gases such as hydrogen chloride, sulfur hexafluoride, silane and halothanes.
Industries served include medicine, scientific research, fiber optics, semiconductor manufacturing, environmental testing and compliance, laser applications, homeland security and lighting.
“Our strengthened capabilities in high purity gases and chemicals, combined with world-class applications engineering and technology expertise creates a business that is unparalleled in the industry,” Caldwell said. “Linde’s ability to produce and purify rare and electronic process gases provides the high quality, security of supply and lower cost of ownership that is critically important in today’s highly competitive global marketplace,” he said.
Linde is the world’s largest, fully integrated producer and supplier of bulk and cylinder supply, and can provide customers with the most comprehensive vertical production and supply solution in the electronics and specialty gases industry.
The Electronics and Specialty Gases business also recently consolidated its customer service organization into a new state-of-the-art facility in Stewartsville, New Jersey, where it will manage all domestic and international order processing. Previously, customer service had been handled at multiple facilities in New Jersey and Massachusetts. The new facility also serves as the headquarters for Linde’s US Electronics and Specialty Gases business.
Also housed in this location is the Linde national operations center, which is responsible for customer engineering services, logistics, delivery scheduling and fleet management, remote operations and monitoring of the company’s network of over 70 atmospheric and process gas plants throughout the US, Canada and Mexico.
The Linde Group is a world leading gases and engineering company with almost 48,000 employees working in more than 100 countries worldwide. In the 2009 financial year it achieved sales of EUR 11.2 billion (USD 15.3 billion). The strategy of The Linde Group is geared toward sustainable earnings-based growth and focuses on the expansion of its international business with forward-looking products and services.
Linde North America is a member of The Linde Group, a leading global gases and engineering company. Spectra Gases, which Linde purchased in 2006, has been a global leader in the next generation of fine chemicals and high-purity gases and is now part of Linde North America’s Electronics and Specialty Gases business.
The integration of Spectra’s high-end line of specialty gases, chemicals, isotopic gases and fluorine based mixtures for niche and critical applications complements Linde’s broader range of offerings across the balance of packaged gases products and applications.
“With this integration Linde now offers customers the most comprehensive line of packaged gas products and services in the industry,” said Cliff Caldwell, vice president for Linde’s Electronics and Specialty Gases business in North America.
Linde’s Electronics and Specialty Gases business is a leading global supplier of a wide array of products and services, ranging from rare gases and calibration gases in the parts per billion to electronic process gases such as hydrogen chloride, sulfur hexafluoride, silane and halothanes.
Industries served include medicine, scientific research, fiber optics, semiconductor manufacturing, environmental testing and compliance, laser applications, homeland security and lighting.
“Our strengthened capabilities in high purity gases and chemicals, combined with world-class applications engineering and technology expertise creates a business that is unparalleled in the industry,” Caldwell said. “Linde’s ability to produce and purify rare and electronic process gases provides the high quality, security of supply and lower cost of ownership that is critically important in today’s highly competitive global marketplace,” he said.
Linde is the world’s largest, fully integrated producer and supplier of bulk and cylinder supply, and can provide customers with the most comprehensive vertical production and supply solution in the electronics and specialty gases industry.
The Electronics and Specialty Gases business also recently consolidated its customer service organization into a new state-of-the-art facility in Stewartsville, New Jersey, where it will manage all domestic and international order processing. Previously, customer service had been handled at multiple facilities in New Jersey and Massachusetts. The new facility also serves as the headquarters for Linde’s US Electronics and Specialty Gases business.
Also housed in this location is the Linde national operations center, which is responsible for customer engineering services, logistics, delivery scheduling and fleet management, remote operations and monitoring of the company’s network of over 70 atmospheric and process gas plants throughout the US, Canada and Mexico.
The Linde Group is a world leading gases and engineering company with almost 48,000 employees working in more than 100 countries worldwide. In the 2009 financial year it achieved sales of EUR 11.2 billion (USD 15.3 billion). The strategy of The Linde Group is geared toward sustainable earnings-based growth and focuses on the expansion of its international business with forward-looking products and services.
Pigeon Point Systems announces IPMC and carrier IPMC BMR starter kits using SmartFusion FPGAs
MOUNTAIN VIEW, USA: Pigeon Point Systems (PPS), an Actel company, has announced new AdvancedTCA (ATCA) IPM Controller (IPMC) and ATCA/AdvancedMC (AMC) Carrier IPMC Board Management Reference (BMR) Starter Kits using Actel's new SmartFusion intelligent mixed signal FPGA.
SmartFusion is the only device that integrates an FPGA, hard ARM Cortex-M3-based microcontroller subsystem (MSS) and programmable analog, offering full customization, IP protection and ease-of-use.
These comprehensive IPMC and Carrier IPMC solutions based on Pigeon Point's field-proven IPMC offerings and the SmartFusion intelligent mixed signal FPGA accelerate customer design cycles and enable designers to concentrate on differentiating their ATCA board products (including those with AMC slots) instead of expending internal effort meeting management requirements for xTCA specification compliance.
By leveraging Pigeon Point's proven record for compliance, interoperability and responsive support, together with the flash-based SmartFusion device for power and system management, Pigeon Point Systems delivers comprehensive IPMC and Carrier IPMC reference solutions that reinforce Actel's commitment to the strong worldwide adoption of xTCA by telecom equipment manufacturers.
xTCA includes the ATCA and AMC architectures, as well as the complementary MicroTCA architecture.
Compared to other core silicon used for xTCA management controllers, SmartFusion devices deliver:
* Customizability, due to the built-in flash FPGA; IP blocks can be added to the FPGA to provide management focused functionality, such as an IPMI-defined register-based external interface via the CoreLPC block, but also for board-specific functionality, eliminating the need for a separate PLD device on the board.
* Higher processor performance with a 32-bit ARM Cortex-M3 processor operating at 80 MHz, the optimum balance for controller, FPGA and analog operation. Typical existing core silicon used for management controllers operates at less than half that frequency.
* Advanced analog processing, with zero load on the ARM processor to do xTCA-aware analog sensor monitoring for up to 32 analog sensors. The analog compute engine can be configured so that xTCA analog sensors are sampled and processed via the sample sequencing engine and the post-processing engine.
The new kits deliver a world class solution for the mandatory management controllers used on ATCA boards and ATCA AMC carrier boards and enables customers to develop cost-effective, compliant and interoperable ATCA board and AMC carrier board products.
SmartFusion is the only device that integrates an FPGA, hard ARM Cortex-M3-based microcontroller subsystem (MSS) and programmable analog, offering full customization, IP protection and ease-of-use.
These comprehensive IPMC and Carrier IPMC solutions based on Pigeon Point's field-proven IPMC offerings and the SmartFusion intelligent mixed signal FPGA accelerate customer design cycles and enable designers to concentrate on differentiating their ATCA board products (including those with AMC slots) instead of expending internal effort meeting management requirements for xTCA specification compliance.
By leveraging Pigeon Point's proven record for compliance, interoperability and responsive support, together with the flash-based SmartFusion device for power and system management, Pigeon Point Systems delivers comprehensive IPMC and Carrier IPMC reference solutions that reinforce Actel's commitment to the strong worldwide adoption of xTCA by telecom equipment manufacturers.
xTCA includes the ATCA and AMC architectures, as well as the complementary MicroTCA architecture.
Compared to other core silicon used for xTCA management controllers, SmartFusion devices deliver:
* Customizability, due to the built-in flash FPGA; IP blocks can be added to the FPGA to provide management focused functionality, such as an IPMI-defined register-based external interface via the CoreLPC block, but also for board-specific functionality, eliminating the need for a separate PLD device on the board.
* Higher processor performance with a 32-bit ARM Cortex-M3 processor operating at 80 MHz, the optimum balance for controller, FPGA and analog operation. Typical existing core silicon used for management controllers operates at less than half that frequency.
* Advanced analog processing, with zero load on the ARM processor to do xTCA-aware analog sensor monitoring for up to 32 analog sensors. The analog compute engine can be configured so that xTCA analog sensors are sampled and processed via the sample sequencing engine and the post-processing engine.
The new kits deliver a world class solution for the mandatory management controllers used on ATCA boards and ATCA AMC carrier boards and enables customers to develop cost-effective, compliant and interoperable ATCA board and AMC carrier board products.
SGI announces strategic AMD processor adoption plan
FREMONT, USA: SGI, a global leader in HPC and data center solutions, re-affirmed its commitment to supporting AMD Opteron series platform choices, including the AMD Opteron 6000 series, across all SGI scale-out server platforms.
SGI server solutions will tackle mission critical server and workstation application workloads with increased performance and energy efficiency.
Day-one support for the new AMD Opteron 6000 series platforms is offered across SGI’s entire design-to-order server portfolio, including CloudRack and Rackable scale-out servers and SGI InfiniteStorage servers.
The ICE Cube modular data center also supports AMD Opteron processors for the first time. With up to 12 cores per processor, SGI servers gain dramatic increases in core density—up to 1,824 cores per rack with CloudRack™ C2 servers and up to 2,208 cores per rack with Rackable half-depth servers. ICE Cube modular data centers can now scale to 41,760 cores per container.
“SGI is excited to expand our AMD Opteron investment and support across our data center and HPC product lines,” said Mark J. Barrenechea, SGI CEO. “With AMD Opteron 6000 series platform support, SGI customers will be able to gain new levels of scale, efficiency, and price/performance metrics.”
As part of SGI’s increased commitment to AMD processor support, SGI expects to release AMD Opteron processor-based configurations of its Altix ICE high performance computing (HPC) clusters and Octane III personal supercomputer later this year. Similarly, the SGI HPC cluster software stack will also be available on the AMD Opteron platform for the first time.
“AMD is excited to extend our relationship with SGI,” said Patrick Patla, vice president and general manager, Server and Embedded Divisions, AMD. “Our AMD Opteron 6000 series platforms deliver unmatched efficiency and scalability and, with SGI’s continued performance leadership and dedication to innovation, we look forward to collaborating in new and meaningful ways with SGI.”
AMD processor and platform support can benefit SGI customers who have realized great advantages in memory throughput and price/performance/watt through the use of AMD Opteron processor-based SGI servers in the past.
“We are pleased about SGI’s commitment to embrace AMD’s newest cutting-edge processors and platforms,” said Burzin N. Engineer, vice president, technology at Shopzilla.
“SGI servers with AMD Opteron processors have been and will continue to be the backbone of our IT strategy and infrastructure. The addition of AMD Opteron 6000 series platforms to SGI’s server lines provides Shopzilla, Inc. with an increased core count and compelling density, and an unbeatable overall price performance.”
SGI server solutions will tackle mission critical server and workstation application workloads with increased performance and energy efficiency.
Day-one support for the new AMD Opteron 6000 series platforms is offered across SGI’s entire design-to-order server portfolio, including CloudRack and Rackable scale-out servers and SGI InfiniteStorage servers.
The ICE Cube modular data center also supports AMD Opteron processors for the first time. With up to 12 cores per processor, SGI servers gain dramatic increases in core density—up to 1,824 cores per rack with CloudRack™ C2 servers and up to 2,208 cores per rack with Rackable half-depth servers. ICE Cube modular data centers can now scale to 41,760 cores per container.
“SGI is excited to expand our AMD Opteron investment and support across our data center and HPC product lines,” said Mark J. Barrenechea, SGI CEO. “With AMD Opteron 6000 series platform support, SGI customers will be able to gain new levels of scale, efficiency, and price/performance metrics.”
As part of SGI’s increased commitment to AMD processor support, SGI expects to release AMD Opteron processor-based configurations of its Altix ICE high performance computing (HPC) clusters and Octane III personal supercomputer later this year. Similarly, the SGI HPC cluster software stack will also be available on the AMD Opteron platform for the first time.
“AMD is excited to extend our relationship with SGI,” said Patrick Patla, vice president and general manager, Server and Embedded Divisions, AMD. “Our AMD Opteron 6000 series platforms deliver unmatched efficiency and scalability and, with SGI’s continued performance leadership and dedication to innovation, we look forward to collaborating in new and meaningful ways with SGI.”
AMD processor and platform support can benefit SGI customers who have realized great advantages in memory throughput and price/performance/watt through the use of AMD Opteron processor-based SGI servers in the past.
“We are pleased about SGI’s commitment to embrace AMD’s newest cutting-edge processors and platforms,” said Burzin N. Engineer, vice president, technology at Shopzilla.
“SGI servers with AMD Opteron processors have been and will continue to be the backbone of our IT strategy and infrastructure. The addition of AMD Opteron 6000 series platforms to SGI’s server lines provides Shopzilla, Inc. with an increased core count and compelling density, and an unbeatable overall price performance.”
Design Compiler 2010 doubles productivity of synthesis and place and route
MOUNTAIN VIEW, USA: Synopsys Inc. has introduced Design Compiler 2010, the latest RTL synthesis innovation within the Galaxy Implementation platform, which delivers a twofold speedup in the synthesis and physical implementation flow.
To meet aggressive schedules for increasingly complex designs, engineers need an RTL synthesis solution that enables them to minimize iterations to speed up physical implementation.
To address these challenges, topographical technology in Design Compiler 2010 is being extended to produce "physical guidance" to Synopsys' flagship place-and-route solution, IC Compiler, tightening timing and area correlation to 5 percent while speeding up IC Compiler's placement phase by 1.5 times (1.5X).
A new capability allows RTL designers to perform floorplan exploration within the synthesis environment to efficiently achieve an optimal floorplan. Additionally, Design Compiler's new scalable infrastructure tuned for multicore processors yields 2X faster synthesis runtimes on four cores. These new Design Compiler 2010 productivity improvements will be highlighted by users at the Synopsys Users Group (SNUG) meeting in San Jose, California.
"Cutting design time and improving design performance are essential to keep our competitiveness in the marketplace," said Hitoshi Sugihara, department manager, DFM & Digital EDA Technology Development at Renesas. "With the new physical guidance extension to topographical technology we are seeing 5 percent correlation between Design Compiler and IC Compiler, up to 2X faster placement in IC Compiler and better design timing. We are adopting the new technology innovations in Design Compiler to minimize iterations while meeting our design goals in shorter timeframes."
To alleviate today's immense time-to-market pressures, Design Compiler 2010 extends topographical technology to further optimize its links with IC Compiler, tightening correlation down to 5 percent.
Additional physical optimization techniques are applied during synthesis, and physical guidance is created and passed to IC Compiler, streamlining the flow and speeding up placement in IC Compiler by 1.5X. Design Compiler 2010 also provides RTL designers access to IC Compiler's floorplanning capabilities from within the synthesis environment. With the push of a button, designers can perform what-if floorplan exploration, enabling them to identify and fix floorplan issues early and achieve faster design convergence.
"For the last few years, we have used Design Compiler's Topographical technology to find and fix design issues during synthesis to give us predictable implementation," said Shih-Arn Hwang, Deputy Director R&D Center at Realtek.
"We see Design Compiler 2010 synthesis results closely correlating to physical results, while accelerating placement in IC Compiler by 1.5X. This tight correlation between synthesis and layout, along with faster runtimes, is exactly what we need for reducing iterations and significantly shortening design schedules in 65 nanometer and smaller process technologies."
Design Compiler 2010 includes a new, scalable infrastructure designed to deliver significant runtime speedup on multicore compute servers. It employs an optimized scheme of distributed and multithreaded parallelization techniques, delivering an average of 2X faster runtime on quad-core compute servers while achieving zero deviation of the synthesis results.
"We've focused Design Compiler improvements on helping designers shorten design cycles and improve productivity," said Antun Domic, senior vice president and general manager, Synopsys Implementation Group.
"Since the introduction of topographical technology, the impact of logic synthesis on accelerating design closure with physical implementation has grown significantly. Design Compiler 2010 continues this trend, delivering a significant decrease in iterations and reducing run times in physical implementation. We have achieved this while dramatically updating our software infrastructure to best utilize the latest microprocessor architectures."
To meet aggressive schedules for increasingly complex designs, engineers need an RTL synthesis solution that enables them to minimize iterations to speed up physical implementation.
To address these challenges, topographical technology in Design Compiler 2010 is being extended to produce "physical guidance" to Synopsys' flagship place-and-route solution, IC Compiler, tightening timing and area correlation to 5 percent while speeding up IC Compiler's placement phase by 1.5 times (1.5X).
A new capability allows RTL designers to perform floorplan exploration within the synthesis environment to efficiently achieve an optimal floorplan. Additionally, Design Compiler's new scalable infrastructure tuned for multicore processors yields 2X faster synthesis runtimes on four cores. These new Design Compiler 2010 productivity improvements will be highlighted by users at the Synopsys Users Group (SNUG) meeting in San Jose, California.
"Cutting design time and improving design performance are essential to keep our competitiveness in the marketplace," said Hitoshi Sugihara, department manager, DFM & Digital EDA Technology Development at Renesas. "With the new physical guidance extension to topographical technology we are seeing 5 percent correlation between Design Compiler and IC Compiler, up to 2X faster placement in IC Compiler and better design timing. We are adopting the new technology innovations in Design Compiler to minimize iterations while meeting our design goals in shorter timeframes."
To alleviate today's immense time-to-market pressures, Design Compiler 2010 extends topographical technology to further optimize its links with IC Compiler, tightening correlation down to 5 percent.
Additional physical optimization techniques are applied during synthesis, and physical guidance is created and passed to IC Compiler, streamlining the flow and speeding up placement in IC Compiler by 1.5X. Design Compiler 2010 also provides RTL designers access to IC Compiler's floorplanning capabilities from within the synthesis environment. With the push of a button, designers can perform what-if floorplan exploration, enabling them to identify and fix floorplan issues early and achieve faster design convergence.
"For the last few years, we have used Design Compiler's Topographical technology to find and fix design issues during synthesis to give us predictable implementation," said Shih-Arn Hwang, Deputy Director R&D Center at Realtek.
"We see Design Compiler 2010 synthesis results closely correlating to physical results, while accelerating placement in IC Compiler by 1.5X. This tight correlation between synthesis and layout, along with faster runtimes, is exactly what we need for reducing iterations and significantly shortening design schedules in 65 nanometer and smaller process technologies."
Design Compiler 2010 includes a new, scalable infrastructure designed to deliver significant runtime speedup on multicore compute servers. It employs an optimized scheme of distributed and multithreaded parallelization techniques, delivering an average of 2X faster runtime on quad-core compute servers while achieving zero deviation of the synthesis results.
"We've focused Design Compiler improvements on helping designers shorten design cycles and improve productivity," said Antun Domic, senior vice president and general manager, Synopsys Implementation Group.
"Since the introduction of topographical technology, the impact of logic synthesis on accelerating design closure with physical implementation has grown significantly. Design Compiler 2010 continues this trend, delivering a significant decrease in iterations and reducing run times in physical implementation. We have achieved this while dramatically updating our software infrastructure to best utilize the latest microprocessor architectures."
ARM selects Librato to increase efficiency and productivity
SANTA CLARA, USA: Librato Inc., a leading provider of software solutions that increase the utilization of cloud, grid and data center resources, announced that ARM, the world’s leading semiconductor intellectual property supplier, has selected Librato Smart Suspend to increase the utilization of its existing server infrastructure.
Smart Suspend enables ARM to more efficiently manage job priority, by using lossless preemptive scheduling, which preserves all of a job’s completed work as well as the value of resources expended running it up to the point of preemption, while also enabling the consolidation of interactive and batch jobs on the same node.
“We had a number of new requirements when we began looking for a way to increase the utilization of our server infrastructure. We wanted a solution that could support diverse workloads, as well as our current design flows, so that our users didn’t have to change the way they worked. The solution had to provide fast, reliable job suspension and resumption, and also had to easily integrate with Platform LSF,” said Puneet Grover, US Manager of IT of ARM.
“Since deploying and running Librato Smart Suspend on our North American grids in Austin and San Jose over the past year we have significantly increased our server utilization. We are currently in the process of broadening our full US deployment and testing ahead of deployment in our other locations around the world.”
ARM selected Librato Smart Suspend to increase the number of simultaneously submitted jobs and to improve application access without overloading the existing grid infrastructure. Prior to using Smart Suspend, ARM faced difficulties during periods of peak demand and being able to dynamically and rapidly react to changes in workflow priorities.
ARM was looking for ways to alleviate and prevent the resulting “slot contention” these challenges present. Librato Smart Suspend has addressed these challenges by providing ARM with quantifiable increases in the efficiency of its Linux-based grids as well as in the number of jobs/users concurrently served by the shared infrastructure during peak demand. This results in higher engineering productivity as well.
Librato Smart Suspend overcame ARM’s issues by providing fast, safe, and lossless job preemption, which relinquishes all resources consumed by a running job, including any application licenses, in order to immediately run a higher priority job.
After the higher priority job completes, Librato Smart Suspend properly resumes the suspended job from its preemption point by reclaiming all resources it was using, including memory content and application licenses. Smart Suspend allows organizations to increase their job throughput and utilize application licenses as efficiently as possible, while maximizing server utilization and user productivity.
“Companies are looking for ways to get the most out of their existing resources, and to do so without making major changes or investments,” said Fred van den Bosch, CEO of Librato. “Librato Smart Suspend has enabled ARM to do just that – to help their engineers to get more designs through their grids in less time without disrupting their infrastructure and operations. The benefits ARM has received showcase Librato’s dedication to providing solutions that meet the technical challenges of today’s workload management market.”
Librato will be participating in the Synopsys Designer Community Expo held during the 2010 Synopsys User Group (SNUG) conference in Santa Clara, CA, March 29th-31st. There, Librato will be demonstrating its Smart Suspend and Availability Services (AvS) products for Linux-based HPC/Grid computing.
Smart Suspend enables ARM to more efficiently manage job priority, by using lossless preemptive scheduling, which preserves all of a job’s completed work as well as the value of resources expended running it up to the point of preemption, while also enabling the consolidation of interactive and batch jobs on the same node.
“We had a number of new requirements when we began looking for a way to increase the utilization of our server infrastructure. We wanted a solution that could support diverse workloads, as well as our current design flows, so that our users didn’t have to change the way they worked. The solution had to provide fast, reliable job suspension and resumption, and also had to easily integrate with Platform LSF,” said Puneet Grover, US Manager of IT of ARM.
“Since deploying and running Librato Smart Suspend on our North American grids in Austin and San Jose over the past year we have significantly increased our server utilization. We are currently in the process of broadening our full US deployment and testing ahead of deployment in our other locations around the world.”
ARM selected Librato Smart Suspend to increase the number of simultaneously submitted jobs and to improve application access without overloading the existing grid infrastructure. Prior to using Smart Suspend, ARM faced difficulties during periods of peak demand and being able to dynamically and rapidly react to changes in workflow priorities.
ARM was looking for ways to alleviate and prevent the resulting “slot contention” these challenges present. Librato Smart Suspend has addressed these challenges by providing ARM with quantifiable increases in the efficiency of its Linux-based grids as well as in the number of jobs/users concurrently served by the shared infrastructure during peak demand. This results in higher engineering productivity as well.
Librato Smart Suspend overcame ARM’s issues by providing fast, safe, and lossless job preemption, which relinquishes all resources consumed by a running job, including any application licenses, in order to immediately run a higher priority job.
After the higher priority job completes, Librato Smart Suspend properly resumes the suspended job from its preemption point by reclaiming all resources it was using, including memory content and application licenses. Smart Suspend allows organizations to increase their job throughput and utilize application licenses as efficiently as possible, while maximizing server utilization and user productivity.
“Companies are looking for ways to get the most out of their existing resources, and to do so without making major changes or investments,” said Fred van den Bosch, CEO of Librato. “Librato Smart Suspend has enabled ARM to do just that – to help their engineers to get more designs through their grids in less time without disrupting their infrastructure and operations. The benefits ARM has received showcase Librato’s dedication to providing solutions that meet the technical challenges of today’s workload management market.”
Librato will be participating in the Synopsys Designer Community Expo held during the 2010 Synopsys User Group (SNUG) conference in Santa Clara, CA, March 29th-31st. There, Librato will be demonstrating its Smart Suspend and Availability Services (AvS) products for Linux-based HPC/Grid computing.
Renesas starter kits and ecosystem for 200MHz/400DMIPS SH7216 and SH7264 MCUs
SAN JOSE, USA: Renesas Technology America Inc. announced the availability of Renesas Starter Kits (RSKs) and an enhanced third-party vendor ecosystem for its 32-bit SH7216 and SH7264 superscalar microcontrollers (MCUs).
Several lead customers are already using the SH7216 and SH7264. Now, with the availability of these RSKs and a rich variety of third-party support products, these MCUs are being offered to all customers.
The SH7216 and SH7264 MCUs share the same SH2A-FPU CPU core, peripherals, development tools and third-party infrastructure. These MCUs are optimized for high-performance real-time systems that require high-throughput connectivity, advanced GUI and digital audio capabilities.
The comprehensive RSKs supporting the devices have features that facilitate the development of prototype and proof-of-concept designs for a variety of system configurations. The RSKs include a system board, power supply, integrated development environment, full-featured evaluation compiler, and hardware debugger. The RSKs also include many example applications to shorten the system development cycle.
Renesas has assembled a large and growing list of professional software companies to create the ecosystem for the SH7216 and SH7264 MCUs. These firms provide operating systems, file systems, connectivity protocols (Ethernet, TCP/IP, USB, etc.), media player modules, GUI libraries and development suites.
Customers benefit from buying such software products because they get proven, verified designs; ongoing maintenance/upgrade programs; indemnification (which is especially valuable for safety and medical applications); local service & support; and the flexibility of choosing between alternative design approaches.
To encourage system designers to try the SH7216 and SH7264, Renesas and its distributors are now running a special, limited-time low-price offer for the microcontrollers’ RSKs: 50 percent off to qualified customers. This offer lowers the prices to only $381 for the RSK7216 and $625 for the RSK7264.
Several lead customers are already using the SH7216 and SH7264. Now, with the availability of these RSKs and a rich variety of third-party support products, these MCUs are being offered to all customers.
The SH7216 and SH7264 MCUs share the same SH2A-FPU CPU core, peripherals, development tools and third-party infrastructure. These MCUs are optimized for high-performance real-time systems that require high-throughput connectivity, advanced GUI and digital audio capabilities.
The comprehensive RSKs supporting the devices have features that facilitate the development of prototype and proof-of-concept designs for a variety of system configurations. The RSKs include a system board, power supply, integrated development environment, full-featured evaluation compiler, and hardware debugger. The RSKs also include many example applications to shorten the system development cycle.
Renesas has assembled a large and growing list of professional software companies to create the ecosystem for the SH7216 and SH7264 MCUs. These firms provide operating systems, file systems, connectivity protocols (Ethernet, TCP/IP, USB, etc.), media player modules, GUI libraries and development suites.
Customers benefit from buying such software products because they get proven, verified designs; ongoing maintenance/upgrade programs; indemnification (which is especially valuable for safety and medical applications); local service & support; and the flexibility of choosing between alternative design approaches.
To encourage system designers to try the SH7216 and SH7264, Renesas and its distributors are now running a special, limited-time low-price offer for the microcontrollers’ RSKs: 50 percent off to qualified customers. This offer lowers the prices to only $381 for the RSK7216 and $625 for the RSK7264.
TriQuint named 2009 “Best Global Partner” by ZTE
HILLSBORO, USA & SHENZHEN, CHINA: TriQuint Semiconductor Inc., a leading RF front-end product manufacturer and foundry services provider, announced it has received ZTE Corporation’s “Supplier of the Year” award.
A leading Chinese manufacturer of wireless communication system equipment, ZTE annually recognizes top suppliers with superior cost, quality, delivery and service performance. TriQuint has achieved top supplier recognition for the third consecutive year, while experiencing a compound annual growth rate of 70 percent with ZTE.
Zeng Zhaoxiang, Vice General Manager of ZTE Kang Xun, said: “TriQuint had excellent performance in areas of on-time delivery and business co-operation in 2009. TriQuint made outstanding contributions in enhancing the whole delivery performance of ZTE.”
“On behalf of all TriQuint employees who work very hard every day to deliver the radio frequency solutions that power both the systems and devices that enable voice, data and video, we are honored to accept this award from ZTE,” said Tim Dunn, Vice President Mobile Devices at TriQuint Semiconductor.
“TriQuint is committed to providing ZTE with quality products and excellent service as together we address the growth challenges inherent in the dynamic telecom industry. We look forward to continuing to supply ZTE with high-quality radio frequency solutions for wireless communications.”
A leading Chinese manufacturer of wireless communication system equipment, ZTE annually recognizes top suppliers with superior cost, quality, delivery and service performance. TriQuint has achieved top supplier recognition for the third consecutive year, while experiencing a compound annual growth rate of 70 percent with ZTE.
Zeng Zhaoxiang, Vice General Manager of ZTE Kang Xun, said: “TriQuint had excellent performance in areas of on-time delivery and business co-operation in 2009. TriQuint made outstanding contributions in enhancing the whole delivery performance of ZTE.”
“On behalf of all TriQuint employees who work very hard every day to deliver the radio frequency solutions that power both the systems and devices that enable voice, data and video, we are honored to accept this award from ZTE,” said Tim Dunn, Vice President Mobile Devices at TriQuint Semiconductor.
“TriQuint is committed to providing ZTE with quality products and excellent service as together we address the growth challenges inherent in the dynamic telecom industry. We look forward to continuing to supply ZTE with high-quality radio frequency solutions for wireless communications.”
Applied Materials extends Epi leadership with innovative critical pre-clean technology
SANTA CLARA, USA: Applied Materials Inc. announced the semiconductor industry’s first integrated low temperature pre-clean for epitaxial (epi) applications which is available on its market-leading Applied Centura RP Epi system.
The new pre-clean chamber, which features Applied’s proven Siconi technology, delivers the critical process performance needed for scaling sensitive, strain-engineered features in sub-32nm logic devices.
In addition, since the pre-clean and epi processes are integrated on the same vacuum platform, queue time is eliminated and interfacial contamination is reduced by more than an order of magnitude over stand-alone systems, creating pristine silicon surfaces for defect-free epi crystal growth.
Conventional pre-clean technology requires a wet clean followed by an 800°C bake. In advanced 32nm and below devices, the aggressive wet clean can erode circuit structures, while the high-temperature bake can significantly weaken existing strain levels. In contrast, the Siconi technology’s patented plasma-based cleaning chemistry provides gentle, yet highly effective, oxide removal at less than 130°C, maintaining optimal strain and preserving delicate features.
“Applied has built its longstanding leadership in epi deposition by continuously extending the technology with new, innovative capabilities,” said Steve Ghanayem, vice president and general manager of Applied’s Front End Products business unit. “Until now, leading-edge chipmakers have been unable to fully realize the transistor speed gains provided by multiple epi layers. The integrated Siconi pre-clean solves this problem, enabling customers to derive the full benefit of strain engineering for fabricating their highest performance devices.”
Designed for energy efficiency, the integrated Siconi process significantly reduces electricity and water consumption. By eliminating the need for a high-temperature bake, the Siconi pre-clean can save the equivalent of over 36,000kWh of energy or 40,000 pounds of CO2 emissions annually.*
The integrated Siconi pre-clean technology has been enthusiastically received by chipmakers and is in use at multiple device manufacturers worldwide. The installed base of Centura RP Epi systems can be upgraded with the Siconi technology through a cost-effective upgrade package.
The new pre-clean chamber, which features Applied’s proven Siconi technology, delivers the critical process performance needed for scaling sensitive, strain-engineered features in sub-32nm logic devices.
In addition, since the pre-clean and epi processes are integrated on the same vacuum platform, queue time is eliminated and interfacial contamination is reduced by more than an order of magnitude over stand-alone systems, creating pristine silicon surfaces for defect-free epi crystal growth.
Conventional pre-clean technology requires a wet clean followed by an 800°C bake. In advanced 32nm and below devices, the aggressive wet clean can erode circuit structures, while the high-temperature bake can significantly weaken existing strain levels. In contrast, the Siconi technology’s patented plasma-based cleaning chemistry provides gentle, yet highly effective, oxide removal at less than 130°C, maintaining optimal strain and preserving delicate features.
“Applied has built its longstanding leadership in epi deposition by continuously extending the technology with new, innovative capabilities,” said Steve Ghanayem, vice president and general manager of Applied’s Front End Products business unit. “Until now, leading-edge chipmakers have been unable to fully realize the transistor speed gains provided by multiple epi layers. The integrated Siconi pre-clean solves this problem, enabling customers to derive the full benefit of strain engineering for fabricating their highest performance devices.”
Designed for energy efficiency, the integrated Siconi process significantly reduces electricity and water consumption. By eliminating the need for a high-temperature bake, the Siconi pre-clean can save the equivalent of over 36,000kWh of energy or 40,000 pounds of CO2 emissions annually.*
The integrated Siconi pre-clean technology has been enthusiastically received by chipmakers and is in use at multiple device manufacturers worldwide. The installed base of Centura RP Epi systems can be upgraded with the Siconi technology through a cost-effective upgrade package.
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