Wednesday, May 8, 2013

Semiconductor photomask market forecast $3.5 billion in 2014

Lara Chamness, senior market analyst, SEMI Industry Research and Statistics

USA: The worldwide semiconductor photomask market was $3.2 billion in 2012 and is forecast to reach $3.5 billion in 2014. After reaching a market peak in 2011, the photomask market contracted 4 percent in 2012.

The mask market is expected to grow 3 percent and another 3 percent sequentially over the next two years. Key drivers in this market continue to be advanced technology feature sizes (less than 45nm) and increased manufacturing in Asia-Pacific. Taiwan remains the largest photomask regional market for the third year in a row and is expected to remain the largest market for the duration of the forecast.

The mask making market is becoming increasingly capital intensive. According to data from SEMI, 2012 was the third record year for Mask/Reticle making equipment growing 14 percent year-over-year from the previous record year of 2011 to reach $1.3 billion.
While the market for mask making equipment is growing, the number of device manufacturers in leading-edge production is on the decline; in 2012 only six device manufacturers were capable of producing sub 23nm devices on a large scale. 

TSMC and GlobalFoundries are scheduled to have sub 23nm production available later this year — both ramps are delayed from initial announcements of production runs in the fourth quarter of 2012 according to SEMI’s fab database.

As capital intensiveness of the photomask industry increases, captive mask shops are increasing their market share of the total mask market; captive mask shops have grown their market presence in recent years as they now represent 43 percent of the market, up from 30 percent in 2006.

Device manufacturers have been successful in extending 193nm lithography for 20nm processing while EUV remains delayed. Progress has been made with directed self-assembly, although more work needs to be done to get it production ready.

Source power remains a critical roadblock for EUV. However, recent co-investments by Intel, Samsung, and TSMC in ASML and the acquisition of Cymer by ASML should hasten development. That said, device manufacturers are maintaining parallel lithography roadmaps for 14nm and 10nm device structures.

No compelling lithography solutions have emerged for 1X processing. Nanoimplant and ebeam have made marginal progress but remain lagging in many critical areas such as throughput and resolution capability. In the absence of a breakthrough, device manufacturers will be forced to resort to triple triple patterning for 10nm device structures and quadruple patterning for critical layers for sub-10nm feature sizes.

It remains to be seen how the industry will maintain Moore’s law as the costs of advanced lithography increase faster than increased device density gains. But then again, the semiconductor industry is full of some of the smartest people in the world who have managed to engineer cost effective solutions around previous lithography roadblocks.

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