Si2 announces member demos at DAC 2009

Design Automation Conference 2009, AUSTIN, USA: Seven companies/organizations will be demonstrating significant progress advancing design flow interoperability in the Silicon Integration Initiative (Si2) Booth #1400 at the Design Automation Conference on July 26-31, at the Moscone Convention Center in San Francisco, CA.

These companies will be showing how Si2 standards such as OpenAccess, the Common Power Format (CPF), the Open Modeling Interface and new Design for Manufacturability techniques can provide innovative approaches to critical IC design flow issues.

The Design for Manufacturability demos will feature the top four EDA companies, two large IDMs, two startups and one research consortium that represents seven large Japanese companies and three Japanese Universities -– all working together!

AnaGlobe Technology: will demonstrate their OpenAccess-based integrated solution, customizable framework, supporting three scripting languages: TCL, Perl, and Python. Its second generation constraint-based OA Pcell Designer provides more powerful functions with a more friendly user interface which supports mixed use of TCL, Perl, and Python, and GUI.

Cadence Design Systems: will demonstrate solutions using several widely-deployed Si2 standards -- OpenAccess, Common Power Format, and ECSM. Hear from experts how you can use these industry-leading solutions from Cadence to address your most challenging mixed-signal, low-power, or advanced-node design problems.

Design for Manufacturability Coalition: will show two demos in the Si2 booth, supported by nine companies, including leading EDA vendors, large IDMs, startups and a research organization.

These demos will show: (1) Cell Level Find and Fix Demo that analyzes and corrects the DFM hotspots inside of approximately 100 different standard Open Cells; (2) Block Level Find and Fix Demo that analyzes and corrects the DFM hotspots in the routing between Open Cells with a ~100K+ gates (50K instances) Block. These demos will detail the standards that are in development that were used such as: Standard DRC checking, Standard Litho checking, Generic Litho Models, and Hotspot Interface Format

Magma Design Automation: will provide an overview of the Talus low-power design flow which provides the “Fastest Path to Silicon.” The Talus implementation system has enabled designers to meet the low-power specifications of some of the world’s most advanced handheld devices.

With support for the Common Power Format (CPF) and a unified datamodel architecture, Talus allows designers to implement advanced low-power design techniques throughout the flow and to significantly reduce turnaround time.

Pyxis Technology: will demonstrate the power of OpenAccess Interoperability through a seamless integration of the NexusRoute-HPC router with the Laker Custom Layout Automation System from SpringSoft. The demonstration will highlight the ability of the router and editor to simultaneously work off the same OpenAccess in-memory runtime model, a first for the EDA industry! Pyxis will be demonstrating Monday through Wednesday each morning from 9:00AM to 12:00 at the Si2 booth.

Open Modeling Coalition: will demonstrate the Open Model Interface (OMI) integrated with a third party timer, IBM's EinsTimer. The OMI enables a consistent view and use of various models across applications, thus allowing tools in multi-vendor design flows to better correlate with each other.

The interface leverages the Open Access API and data model and is extensible to allow for a variety of design models such as Liberty, ECSM and statistical ECSM among others.

The Si2 booth demonstration will use the OMI to connect the EinsTimer timing application with timing models using Liberty, ECSM and IEEE 1481 DPCM formats, separately and within the same timing run.

The Coalition will also demonstrate a multi-vendor standard cell library characterization and validation flow. The library being characterized is the Nangate Open library available on the Si2 website at http://www.si2.org/openeda.si2.org/projects/nangatelib/. Examples of the steps in the characterization process by Nangate, Altos, and Fenix will be shown in the booth.

Also being shown will be examples of characterization setup information that can be included in Liberty files and will lead to more standard characterization setups for any library characterization, validation, and model verification flow.

Synopsys: will demonstrate Galaxy Custom Designer: Built from the ground up on OpenAccess, Custom Designer was architected for productivity. This demonstration will show how our comprehensive solution addresses every step of the AMS IC implementation flow.

Productivity innovations in the schematic editor, simulation and analysis environment and schematic driven layout applications will be highlighted throughout the demo. You will also see how Custom Designer's optimized integration with IC Compiler, HSPICE, CustomSim, WaveView Analyzer, Hercules DRC/LVS and Star-RCXT parasitic extraction provides a productive solution all on the industry's most open environment.