Synopsys and Arteris develop IP solution to reduce mobile phone memory costs

MOBILE WORLD CONGRESS 2012, BARCELONA, SPAIN: Synopsys Inc. and Arteris Inc., the inventor and leading supplier of network-on-chip (NoC) interconnect IP solutions, today announced their joint analog and digital IP solutions to implement the MIPI Alliance Low Latency Interface (LLI) 1.0 specification.

The combined offerings deliver high performance with low power consumption in a compact silicon footprint while providing interoperability with the MIPI standard. By providing a collaborative solution that adheres to the LLI specification, Arteris and Synopsys give system-on-chip (SoC) designers access to pre-tested and pre-optimized analog and digital MIPI-based IP that can reduce design cost and accelerate time to market.

The MIPI Alliance LLI specification enables high-bandwidth, low-latency inter-chip communication between two chips using a minimal number of SoC pins. The LLI specification utilizes the MIPI M-PHY physical layer, which also supports five other protocols including USB SSIC, JEDEC UFS, MIPI CSI-3, DSI-2 and DigRF v4. The round-trip latency of the LLI inter-chip connection is fast enough for a mobile phone modem to share an application processor's memory while maintaining enough read throughput and low latency for cache refills.

This enables phone manufacturers to remove the modem's dedicated RAM chip from the phone's bill of materials, MIPI Alliance estimates saving approximately $2 in cost per phone as well as significant printed circuit board (PCB) space that can be used for additional features or to create smaller or thinner devices.

"As active MIPI contributors, Synopsys and Arteris are aiding in the adoption of the MIPI M-PHY and MIPI Low Latency Interface," said Joel Huloux, chairman of the board of MIPI Alliance. "The early integration and availability of the Arteris and Synopsys solution helps speed time to market for MIPI LLI adopters."

The joint solution consists of Arteris' Flex LLI MIPI LLI digital controller IP and Synopsys' DesignWare MIPI M-PHY IP. A team of Arteris and Synopsys engineers, formed to facilitate verification and testing of the joint solution, validated its functionality and interoperability.

"The Synopsys-Arteris MIPI LLI joint solution is the easiest and lowest risk path to adopting MIPI LLI," said Charlie Janac, president and CEO of Arteris. "Arteris and Synopsys have worked together to offer joint customers the most integrated LLI solution with the fastest time to market and least design risk."

"The new Synopsys-Arteris MIPI LLI solution eases adoption of this innovative low latency chip-to-chip interface by providing high-quality IP that has been jointly validated and is ready for customers to rapidly integrate into their SoCs," said John Koeter, VP of marketing for IP and systems at Synopsys. "With the increasing demand to incorporate display, camera and mobile broadband connectivity into consumer devices, SoC designers must rely on proven IP that is verified compliant with MIPI standards such as DSI, CSI-2, D-PHY, DigRF 3G/v4 and M-PHY."

Arteris and Synopsys' joint MIPI LLI IP solution is available today for select early access customers to start their design. System hardware implementing the joint solution will also be available in the second half of 2012.