Monday, February 27, 2012

TI and Aricent ally on small cell protocol stack optimized for TI's KeyStone multicore processors

MOBILE WORLD CONGRESS, BARCELONA, SPAIN: Texas Instruments Inc. (TI) and Aricent, a global technology innovation technology and services company focused exclusively on communications, announced their collaboration on a small cell protocol stack optimized for TI's KeyStone-based multicore System-on-Chips (SoCs).

With this integrated solution from TI and Aricent, developers will be able to more quickly, easily and cost effectively design small cell base stations.

This small cell protocol stack is specifically tailored for users of TI's KeyStone-based multicore processors and SoCs. Integrating TI's field-proven KeyStone architecture elements for layers 2, 3 and transport processing with Aricent's software components optimizes design efficiencies and enables customers to develop more cost-efficient and high performance base stations.

"The combination of TI's industry-leading KeyStone multicore DSPs and Aricent's proven software frameworks creates powerful, reliable, and cost-efficient base station solutions for operators," said Rakesh Vij, vice president of business development, Aricent Group. "Our small cell protocol stack has been chosen by several leading OEM vendors and is in advanced trials or production systems today. This collaboration further cements our leadership in providing world-class LTE software. Our software together with our product engineering services help OEMs to introduce innovative new solutions to the market quickly and efficiently."

TI's scalable KeyStone architecture includes support for both TMS320C66x digital signal processors (DSP) generation cores and multiple cache coherent quad ARM Cortex-A15 clusters, for a mixture of up to 32 DSP and RISC cores.

In addition, TI's KeyStone architecture includes fully offloaded, flexible packet and security coprocessors and capacity expansion for SoC structural elements such as TeraNet, Multicore Navigator and Multicore Shared Memory Controller (MSMC). These structural elements provide a seamless integration between the DSP and ARM RISC cores, allowing base stations developers to fully utilize the capability of all processing elements, including the cores and enhanced AccelerationPacs.

"With our scalable KeyStone architecture and Aricent's field-proven technology, we are able to deliver the most complete small cell solution today," said Sameer Wasson, business manager, wireless base station infrastructure, Texas Instruments. "TI and Aricent provide equipment manufacturers with everything they need to quickly develop highly differentiated and cost-efficient high performance base stations."

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