DUBLIN, IRELAND: Duolog Technologies, the award-winning developer of IP and SoC integration products, is presenting a technical white paper at DVCon. This presentation details the types of quality issues faced during HW/SW integration.
It explains how the use of standards such as IP-XACT, UVM, TLM2.0 and CMSIS, together with proven register management techniques, provide dramatic increases in quality. The presentation also discusses where the next level of standardization is happening in the HW/SW Interface and profiles some of the emerging solutions. Duolog will present the white paper during DVCon in Santa Clara on Wednesday, the 29th of February, at 9.30 am PST.
“Effective utilization of standards is essential in improving the quality of the HW/SW interface and increasing SoC integration productivity,” said David Murray, Duolog’s CTO and featured DVCon speaker.
Duolog will also be presenting as part of the IP-XACT Tutorial session, Monday 27th February at 4.30 pm PST at DVCon. IP-XACT can be used to describe many aspects of the HW/SW Interface.
This “IP-XACT and UVM” presentation explains the IP-XACT HW/SW Interface constructs that can be used in the automation of the UVM register packages. It demonstrates how this automation enables a very efficient HW/SW Interface verification flow using UVM.
In addition, Duolog is exhibiting at DVCon from Tuesday, 28th to Wednesday 29th February at Booth #302. The Duolog team will be demonstrating their industry-leading Socrates tool suite.
* Rapid IP Integration using rules-based system assembly and connectivity.
* Comprehensive HW/SW Integration solutions utilizing standards such as UVM.
* Fast Integration of your I/O layer.
* A sneak preview into the future of formal programming sequence definition.