Accellera Systems Initiative announces IEEE 1666 SystemC language standard for ESL design available for free download

NAPA USA: The Accellera Systems Initiative announced that the IEEE Standards Association (IEEE-SA), a globally recognized standards-setting body within the IEEE, now offers the latest version of the IEEE 1666 "Standard SystemC Language Reference Manual," for download at no charge, as part of the IEEE Get program.

Announced by the IEEE-SA in November 2011, the revised version of the IEEE 1666 specifies the SystemC standard, a high-level design language used in the design and development of electronic systems. The new version encompasses many enhancements, notably support for Transaction-Level Modeling (TLM), a critical approach to enable high level and more efficient design of complex ICs and SoCs.

Beginning immediately, companies, universities, research institutions, and individuals worldwide can freely access the standard and develop applications for SystemC-based tools and technologies. The IEEE 1666 is available as a PDF formatted document.

“We continue to work with the IEEE to make approved EDA and IP standards available,” said Shishpal Rawat, chair of Accellera Systems Initiative. “Through the IEEE Get Program, we provide valuable standards documentation at no cost to the worldwide electronics industry community to support and foster electronic design innovation.”

“Systems designers and architects are faced with complex challenges that are a hybrid between hardware and software," said Judith Gorman, MD of IEEE-SA. "The sheer complexity of today’s SoCs and the demand for IP reuse make the need for standardized interoperability, collaboration and exchange of information a necessity to promote innovation. Through our ongoing Get Programs, electronic industry stakeholders can freely access the latest versions of popular standards like IEEE 1666.”

In December 2011, Accellera and the Open SystemC Initiative (OSCI) merged to form Accellera Systems Initiative. The new organization leverages the complementary efforts of both organizations and is chartered to create comprehensive system-level and semiconductor design standards to benefit the electronic design community by facilitating efficient collaboration among its worldwide members.