ISSI announces 1 Gb high speed DDR2 SDRAM

SAN JOSE, USA: Integrated Silicon Solution Inc., a leader in advanced memory solutions, has added the 1 Gigabit density to its family of DDR2 SDRAMs.

The first device at this new density is the IS43DR16640A which is organized as 64Mx16 and packaged in an 84-ball BGA. This on-going expansion of the DDR2 SDRAM product family adds to ISSI's already extensive offering of DRAMs.

This new device is available with clock speeds up to 533MHz (DDR2-1066), providing a data transfer rate of 4 gigabytes/sec in 32 bit systems. In addition to this new 1Gb device, ISSI also offers 512Mb and 256Mb DDR2 devices, with all three densities available in commercial, industrial and automotive grades.

The 256Mb density includes 8Mx32 and 16Mx16 organizations and for the 512Mb density 32Mx16 and 64Mx8 organizations are available. In the second quarter, ISSI will add x8 versions of the 256Mb, and 1Gb devices. The DDR2 DRAM product family operates from a single supply voltage of 1.8V.

Ron Kalakuntla, ISSI Vice President of Marketing, said: "We continue to expand our DRAM product line to include a variety of interfaces, densities, organizations, and temperature ranges targeted for Automotive, Networking, Telecom, and Digital Consumer Applications. The introduction of the 1 Gigabit density to our family of DDR2 SDRAM is an example of ISSI's long-term commitment to support a complete range of high-quality DRAMs using leading-edge technology."

Key applications in networking and telecom include access nodes, aggregation nodes, VoIP, switches, routers, and packet optical transport. Automotive applications are infotainment and telematics. Other applications include network storage, set-top boxes, DVRs, and others.

In addition to SDR, mobile SDR/DDR, DDR, and DDR2 SDRAMs, ISSI also offers a complete line of both asynchronous and synchronous SRAM with densities from 64Kb to 72Mb. ISSI also has a range of Known Good Die (KGD) memories in its portfolio.

Samples of the IS43DR16640A in both commercial and industrial temperature ranges are available now with volume production shipments beginning in Q2, 2010.

Open-Silicon joins Power Forward Initiative

MILPITAS, USA: Open-Silicon Inc., a leading ASIC design and semiconductor manufacturing company, has joined the Power Forward Initiative (PFI), an industry effort sponsored by Cadence Design Systems with the goal of enabling the design and production of more power-efficient electronic devices.

"Our customers have become very sensitive to power efficiency. Many mainstream designs, which were not traditionally power sensitive, are now paying close attention to power consumption due to exponential growth in leakage power and higher dynamic power from increasing levels of integration and performance," said Dr. Naveed Sherwani, CEO and president of Open-Silicon.

"We have demonstrated our commitment to building high-performance, low-power designs for our customers using our PowerMAX technology. Now our move to join PFI reinforces our commitment to meet our customers' needs."

Open-Silicon's MAX Technologies offer customers power saving advantages like back biasing, transistor transformations, and power recovery. The combination of the best low-power EDA design flows with Open-Silicon's unique technologies allows building the best possible custom silicon.

The company recently announced that Solarflare has successfully used PowerMAX in its second-generation SFC9020 Ethernet Controller with integrated 10Gb Ethernet PHY, which has been sampling to Tier1 server OEMs. This is the third generation of Solarflare silicon built by Open-Silicon, and the second designed using Open-Silicon's PowerMAX technology to optimize the silicon for low power.

"The addition of Open-Silicon to the Power Forward Initiative demonstrates the ongoing strong industry support behind our mission," said Neil Hand, director of low power solutions at Cadence Design Systems. "Open-Silicon's extensive and varied design and manufacturing experience provides a unique perspective to the group and we look forward to the addition of the company."

DLP accelerates innovation beyond traditional projection display with DLP LightCommander

SAN FRANCISCO, USA: At the SPIE Photonics West, DLP Technology from Texas Instruments Inc. (TI) announced the DLP LightCommander, a development kit that offers users a highly versatile and easy to use tool for incorporating DLP technology into light processing applications.

The latest offering in the series of DLP development kits created in response to demand by developers eager to experiment with DLP technology, the DLP LightCommander features an optical light engine, industry standard interfaces and application software. The versatility of the modular architecture helps expedite optical, electronic and system software development requiring high speed spatial light modulation.

Designed to enable a quick, out of the box experience, the DLP LightCommander allows users to get their prototype development up and running in a matter of minutes instead of hours.

"The DLP LightCommander represents another significant step forward in equipping developers with the necessary tools to accelerate system development with DLP," said Arun Chhabra, manager, WW business development, DLP Embedded business.

"This in turn allows them to address a broad range of industrial, medical and communications markets and deliver innovative light processing applications. Top of mind for today's developers is ease of use and flexibility. The kit combines both of these, benefiting both developers looking to quickly jumpstart their development and those seeking easier control of the Digital Micromirror Device (DMD) micromirrors for precise, high speed spatial light modulation."

The DLP LightCommander is designed, manufactured and supported by LOGIC. VISITECH, a DLP Design House partner, designed the versatile optics module found in the DLP LightCommander. In addition, ViALUX, a DLP Design house partner, has developed a basic 3D scanning application using the DLP LightCommander platform that demonstrates the compelling value of DLP for non-contact based 3D measurement.

With microsecond switching speeds and the ability to handle Visible, UV and NIR light, DLP technology enables optical 3D measurement solutions that are faster than traditional contact based measurement systems, while still offering high levels of measurement accuracy. The DLP Light Commander allows developers to harness these benefits in a flexible and easy-to-use platform.

"2010 is the year 3D scanning and measurement go mainstream," said Ping Fu, CEO of Geomagic Inc. "The DLP LightCommander is an exciting mass market enabler, advancing the design and manufacturing of personalized products and services in industrial, civil and medical markets, enhancing high speed inspection for homeland security and food safety and enriching the creation and preservation of art and history."

The DLP LightCommander is targeted to be available in Spring 2010 with a suggested retail price of $2,499.

ChipMOS in definitive agreement with Citigroup

HSINCHU, TAIWAN: ChipMOS Technologies (Bermuda) Ltd, a wholly owned subsidiary of ChipMOS, has entered into a definitive Transfer Of Claim Agreement to sell to Citigroup Financial Products Inc. the general unsecured claim reflected in the proof of claim against Spansion Inc., Spansion Technology LLC, Spansion LLC, Spansion International Inc. and Cerium Laboratories LLC filed by ChipMOS Taiwan in United States Bankruptcy Court.

The claim that is the subject of the Agreement includes accounts receivable for testing and assembly services provided to Spansion in the amount of approximately $66 million to $70 million. The purchase price for the Undisputed Claim is approximately $33 million.

At closing, Citigroup will pay an initial purchase price for the Undisputed Claim to an escrow agent to be held in escrow. The escrow agent will release the initial purchase price to ChipMOS Taiwan 20 days after the closing date, so long as no objection to ChipMOS Taiwan's transfer of the claim to Citigroup is filed in the Spansion bankruptcy proceeding prior to the end of the escrow period.

If an objection to the claim transfer is filed in the proceeding prior to the end of the escrow period, the Undisputed Claim will be repurchased by ChipMOS Taiwan, the escrow agent will pay the Undisputed Claim purchase price to Citigroup and the agreement to sell the Undisputed Claim to Citigroup will terminate.

The Agreement also includes the sale of breach of contract and liquidated damages rights against Spansion in the amount of approximately $234 million. The purchase price for the Damages Claim is expected to be an amount that would be determined based on a Purchase Rate of 50.2 percent multiplied by the portion of the Damages Claim that is allowed by a final adjudication of the United States Bankruptcy Court. The purchase price for the Damages Claim is payable to ChipMOS Taiwan to the extent that the Court allows this claim.

If an objection to the claim transfer is filed in the Spansion bankruptcy proceeding prior to the end of the escrow period, the agreement to sell the Damages Claim to Citigroup will terminate and the Damages Claim will not be transferred to Citigroup.

In furtherance of the Agreement, the Company also has entered into an agreement to subscribe for, purchase and transfer to Citigroup rights offering shares to be issued by Spansion according to the Second Amended Joint Plan of Reorganization filed in United States Bankruptcy Court. This agreement provides that Citigroup will pay to the Company the amount of the rights offering shares purchase price.

Tokyo Electron announces construction of new Miyagi plant

JAPAN: Tokyo Electron Ltd (TEL) will commence construction of a plant that had been previously postponed in Taiwa-cho, Miyagi Prefecture.

The construction of the Miyagi plant was originally postponed in light of the global economic downturn. As the semiconductor production equipment market has improved, TEL has made the decision to begin construction in the summer of 2010.

The plant is scheduled to begin operations in the spring of 2011 or later. The investment in the new plant remains unchanged from the initial plans and is expected to be a total of approximately 25 billion yen, including the cost of the land, which TEL has already purchased.

The plant will consolidate development and mass production functions for etch systems for semiconductor and establish integrated structures to reduce the development times for high value-added products. The market for these systems is expected to grow rapidly in the future. In addition, mass production methods will be reviewed to raise productivity and reduce delivery lead times.

“We will conduct a comprehensive review of existing manufacturing processes to create a world-leading, state-of-the-art production plant,” commented TEL Chairman Tetsuro Higashi. “This will enable TEL to supply products that meet customer needs in a timely manner. We ask for the support of the Miyagi prefectural government, local cities and towns, and also local businesses.”

Renesas adopts Cadence Virtuoso for mixed-signal and analog design at its global design centers

SAN JOSE, USA: Cadence Design Systems Inc. announced that Renesas Technology Corp. has upgraded to the latest version of Cadence Virtuoso technology at its global design centers.

Renesas anticipates the constraint-driven design and verification capabilities in Virtuoso IC 6.1 will shave up to 30 percent off the turnaround time for its mixed-signal and analog designs while maintaining their high quality standards.

“Through our extensive evaluation, we now have confidence that Virtuoso IC 6.1 significantly shortens design turnaround time and brings us unparalleled productivity gains in our analog/mixed-signal designs,” said Takao Sato, department manager, SIP & Analog EDA Technology Development Dept. in the Design Technology Div. at Renesas. “We have used Virtuoso technology for analog and mixed-signal designs for years and expect great results with our deployment of Virtuoso IC 6.1 at our worldwide design sites.”

The constraint-driven methodology enabled by Virtuoso IC 6.1 technology can ease the way for IP reuse, while its constraint-driven verification capability can cut the time needed to ensure design intent is maintained.

Renesas cited the Virtuoso technology’s advanced automation, including its yield optimization, parasitic-aware design mode and constraint template features as being extremely useful. Renesas engineers are using the constraint template to develop complex constraints for layout automation. The company’s use of SKILL-based process design kits (PDKs) allows for more complex Pcells and faster design time with high-quality results.

“Cadence and Renesas have had a long relationship when it comes to using Virtuoso," said Tom Beckley, corporate vice president at Cadence. “We are pleased that Renesas has both seen and verified the value of our IC 6.1 offering and are now deploying it successfully throughout their design groups."

Mentor Graphics Catapult C adds SystemC synthesis, expands full-chip capabilities

WILSONVILLE, USA: Mentor Graphics Corp. announced that the Catapult C Synthesis tool has added SystemC synthesis, expanding the Catapult C tool’s full-chip synthesis capabilities.

This complements the Catapult C tool’s existing algorithmic, control logic, and low power synthesis capabilities and expands its full-chip synthesis application scope through the efficient handling of specific SoC needs such as complex bus interfaces, SoC interconnect and TLM2.0-based ESL flows.

Catapult C support for SystemC source descriptions augments its existing support for ANSI C++ input, allowing high-level synthesis users to choose the industry standard high-level synthesis language that best suits their company’s methodology. The Catapult C tool now supports SystemC cycle-based descriptions, and goes beyond traditional solutions by also offering support for transaction-level synthesis.

Dual Language Support Ideal for Full-Chip High-Level Synthesis Methodology
In addition to its well established support of abstract source descriptions in pure untimed ANSI C++, the Catapult C tool now offers an extra level of modeling granularity with cycle-accurate SystemC.

This unique dual language approach offers designers a wide range of modeling and synthesis options. The Catapult C tool users now have the ability to express complex interface protocols, such as those found in SoC bus interconnects, using a timed SystemC source while keeping the rest of the design functionality in pure untimed ANSI C++.

Designers can also express structure and hierarchy either by using SystemC modules or by inferring them from natural C++ boundaries; such as functions, loops or scopes. The result is a standards-based method where legacy synthesizable SystemC models can easily be leveraged in the Catapult C environment, as well as linked with untimed ANSI C++ sources.

Mentor did not stop with support for timed SystemC as is prevalent in existing SystemC high-level synthesis tools, but also added support for abstract SystemC FIFO communication and TLM-based ESL flows, matching high-level synthesis with ESL practices.

Traditionally, SystemC synthesis tools have forced designers into a coding style based on clocks and signals. However, transaction-level modeling has emerged as the most widespread way of using SystemC. Recent surveys indicate that 80 percent of today’s SystemC users favor working on transactional models above the cycle accurate level, and today most ESL activities, such as architecture analysis and virtual prototyping, rely on TLM.

By supporting a modeling style compatible with the OSCI TLM2.0 approach, the Catapult C tool offers strong ties with ESL flows, methods and tools—such as the Mentor Vista platform—for comprehensive ESL design, verification and synthesis.

“Mentor's decision to add SystemC support to a proven high-level synthesis flow with Catapult C synthesis is very welcome,” said Takashi Hasegawa, Deputy General Manager, SoC Solutions Division, Common IP & Technology Development Unit, Fujitsu Microelectronics.

“We’ve made efforts for a long time for the standardization of SystemC, and also anticipate that this addition will enable us to handle an even broader range of application challenges and provide more flexibility in using Catapult C with Fujitsu supplied silicon technology libraries for our mutual customers.”

“Mentor’s Catapult C tool provides the right balance between detail and abstraction of advantage by dual language. Its cycle-accurate SystemC support gives us fine-grain control over our design and ability to read legacy synthesizable SystemC IP, while its unique support for SystemC-TLM provides the abstraction missing from other HLS tools,” said Yoshinao Umeda, President, PRIMEGATE Ltd.

“We are confident that Catapult C will have a positive impact on not only our business, but also most of electronic and automotive businesses, and help our customers experience more success with their ESL flows.”

“By expanding the Catapult C tool’s high-level synthesis language support to include both ANSI C++ and SystemC, Mentor is demonstrating its continuing commitment to standards and interoperability,” said Simon Bloch, Vice President and General Manager of the Mentor Graphics Design and Synthesis Division. “In particular, the convergence of SystemC TLM and high-level synthesis will enable the semiconductor industry at large to move up in abstraction and make strides in improving overall design productivity.”

Berkeley Design, Solido Design accelerate nanometer IC variation analysis

SANTA CLARA, USA: Berkeley Design Automation, Inc., provider of the Analog FastSPICE unified circuit verification platform (AFS Platform), and Solido Design Automation, provider of Variation Designer, announced a validated flow for rapid reduction in variation risk in nanometer designs at the transistor level.

Driven by demand by a leading fabless semiconductor provider, the companies have proven a solution in which Variation Designer utilizes the AFS Platform. The result is variation analysis capabilities that enable designers to rapidly reduce variation risk.

The Analog FastSPICE Platform (AFS Platform) is the industry’s only unified circuit verification platform for analog, mixed-signal, and RF design. It always delivers true SPICE accurate results, while providing 5x-20x higher performance than traditional SPICE, >10 million-element capacity, and the industry’s only comprehensive device noise analysis.

The AFS Platform is a single executable that uses advanced algorithms and numerical analysis to rapidly solve the full-circuit matrix and original device equations without any shortcuts. The AFS Platform includes licenses for AFS Nano SPICE simulation, AFS circuit simulation, AFS Co-Simulation, AFS Transient Noise Analysis, and AFS RF Analysis.

"Rapidly eliminating yield losses due to process variation in nanometer analog, mixed-signal, and RF designs is a key requirement for high-volume nanometer ICs,” said Ravi Subramanian, president and CEO of Berkeley Design Automation. “The excellent results from the proven Solido Variation Designer integration with the Berkeley Design Automation AFS Platform will provide our mutual customers a dramatic increase in productivity and design turn-around-time.”

Variation Designer, along with Solido’s PVT (process, voltage, temperature) Corner, Statistical, and Proximity applications packages can be deployed for transistor level design to account for global, local, environmental and proximity related variation effects.

The benefit of these solutions is improved designs and reduced variation risk in less time. Variation Designer is used across the transistor level design cycle – from PVT corner simulations to statistical analysis – to determine mismatch effects or yield.

"Variation Designer provides a scalable and extensible solution for solving problems created by process variation in nanometer designs at the transistor level,” said Amit Gupta, president and CEO of Solido Design Automation. “When using the AFS Platform as the simulation engine in Variation Designer, we are able to deliver a fast variation analysis and fix capability. Our mutual customers will directly benefit from the performance improvement of the combined flow."

ON Semiconductor adds new clock and data driver ICs to family of clock management products

PHOENIX, USA: ON Semiconductor, a premier supplier of high performance, energy efficient silicon solutions for greener electronics, today announced an expansion of its family of clock drivers, with the release of the NB7L585, NB7L585R, NB7V585M and NB7V586M differential 2:1 mux input to 1:6 devices, and the NB6HQ14M and NB7HQ14M 1:4 fanout clock/data drivers with equalization.

The NB6HQ14M and NB7HQ14M integrate a selectable equalizer receiver into a high performance differential 1:4 CML clock driver. When placed in series with a data path operating at up to 6.5 gigabits per second (Gbps) or 10 gigabits per second the inputs will compensate the degraded signal and output four identical CML copies of the original input signal. The serial data rate is thereby increased by reducing Inter-Symbol Interference (ISI) caused by losses in the copper interconnect or long cables.

The NB7L585, NB7L585R, NB7V585M and NB7V586M are the newest members of the Gigacomm family representing a new 2:1:6 function integrating a 2:1 mux with a 1:6 fanout buffer. The NB7L585 and NB7L585R are 2.5 V/3.3 V devices with either Low Voltage Positive Emitter Coupled Logic (LVPECL) output or Reduced Swing Emitter Coupled Logic (RSECL) output of 400 millivolt (mV) peak-to-peak, respectively. The NB7L585 operates up to 5 gigahertz (GHz) or 8 Gbps, and the NB7L585R operates up to 7 GHz or 10 Gbps.

The NB7V585M is an ultra low voltage device operating from a 1.8 V/2.5 V power supply. The NB7V586M operates from an ultra low 1.8 V supply and offers the six outputs configured as three banks of two differential pairs. Each bank of outputs has the flexibility to be powered by any combination of either 1.8 V or 1.2 V supplies. Both devices operate up to clock/data rates of 6 GHz/10 Gbps.

The specifications achieved by these clock drivers make them highly suited to use in SONET, Gigabit Ethernet, Fiber Channel, backplane and other clock/data distribution applications. The ambient operating temperature of each of these devices covers −40 °C to +85 °C.

“The system designs for telecom switches, servers and routers are under pressure to support ever-increasing clock and data interfaces and voltage levels without compromising on the signal quality,” said Prescott Sakai, director, clock and data management business unit, ON Semiconductor.

“The company’s new clock drivers enable new integrated functions with equalization features that support various interfaces and low voltage level options. These devices maintain higher signal integrity at data rates that the competing suppliers simply cannot match.”

Pricing for the NB7L585, NB7L585R, NB7V585M, NB7V586M, NB6HQ14M and NB7HQ14M start from $5.25 in 1,000 unit quantities. They are all offered in low profile 3 mm x 3 mm 16-pin or 5 mm x 5 mm 32-pin Pb-free QFN packages. Samples are available now.

WiMAX modems and gateways to be 50 percent of WiMAX chipset market

SCOTTSDALE, USA: WiMAX modems and gateways will dominate the WiMAX chipset market, representing nearly 50 percent of the unit market in 2013, according to research from In-Stat.

Other key WiMAX chipset equipment segments include external modules, mobile PCs, base stations, handsets and other portable devices. Overall, In-Stat expects WiMAX chipset revenue to reach $352 million by 2013.

“WiMAX is not a mere niche technology to fill a void until LTE is up and running, but a complementary solution providing last mile wireless broadband access and a true mobile Internet solution,” says Jim McGregor, In-Stat analyst. “WiMAX chipset technology has already moved beyond multiple chips to single chip solutions integrating the baseband functionality with the RF radio. A small group of semiconductor manufacturers have already emerged as leaders in this growing segment.”

Recent research by In-Stat found the following:
* WiMAX chipset vendors Beceem, GCT, Intel and Sequans have emerged to lead the market.
* Both WiMAX and LTE have advantages and disadvantages, but In-Stat believes that the technologies will coexist in the future.
* WiMAX stands to benefit from government stimulus and rural broadband initiatives. WiMAX’s relative maturity positions it favorably for 'shovel ready' projects.

Altair Semiconductor, ANADIGICS to drive LTE development

HOD HASHARON, USA: Altair Semiconductor and ANADIGICS, Inc. (Nasdaq: ANAD), announced a co-operation focused on driving LTE technology adoption.

Altair is a leader in 4G technology developing the world's most advanced mobile semiconductors for handheld devices, while ANADIGICS provides industry-leading radio frequency integrated circuit (RFICs) for the growing broadband and wireless communications markets. Both companies have significant experience in the wireless communications industry and, together, have already delivered innovative solutions to the marketplace.

In this latest cooperation, Altair is integrating ANADIGICS power amplifiers (PAs) into the recently announced FourGee LTE USB ExpressCard UE (User Equipment). The card has undergone extensive and successful interoperability testing (IOT) and is currently being used in various field activities throughout the world.

LTE is the natural evolution to existing, widespread 3G networks around the world. It is gaining strong momentum worldwide, with 42 LTE network operators in 21 countries already announcing a commitment to the 4G technology.

"Altair's LTE work with ANADIGICS is a powerful extension of our existing and fruitful cooperation in the mobile WiMAX space," said Eran Eshed, Co-Founder and VP of Marketing and Business Development of Altair Semiconductor.

"Our strategic relationship with ANADIGICS will continue to be valuable for both organizations as Altair develops new reference design products in support of additional RF bands."

"ANADIGICS is proud to play a role in the development of 4G solutions such as LTE. By working with leaders like Altair, not just to enable but to drive 4G and LTE adoption, we make it possible for operators to migrate their networks to new technologies that support the next generation of wireless applications," commented Greg White, senior vice president of RF Products at ANADIGICS.

"Our collaboration with Altair emphasizes the importance of having innovative RF products that provide our partners and customers with industry leading solutions for advanced 3G and 4G applications. We are pleased to be providing LTE PAs that enable Altair's FourGee™ LTE USB ExpressCard UE to provide exceptional performance on data upload with low power consumption."

Altair's FourGee LTE USB ExpressCard UE is one of the industry's first Category-3 datacard solutions. Based on Altair's FourGee-3100/6200 baseband/RFIC LTE chipset, the ExpressCard is an ideal test and IOT UE platform for system vendors and carriers involved in the development, trialing and deployment of LTE systems.

The FourGee LTE USB ExpressCard UE is also a reference design for terminal manufacturers working to develop commercial products based on the FourGee family of LTE chips. ANADIGICS power amplifiers are recognized for their high linearity and high efficiency in the industry's smallest packages.

Waytronx to develop and produce GASPT2 device with Ingenion

TUALATIN, USA: Waytronx Inc., a platform company dedicated to the acquisition, development, and commercialization of new, innovative technologies, has reached an agreement with British-based Ingenion Design Ltd to develop and build its second generation Gas Quality Inferential Measurement Device (GasPT2).

The GasPT2, designed by GL Industrial Services and recently licensed worldwide and exclusively to Waytronx, is a low cost solution to measuring gas quality. It can be connected to a natural gas system to provide a fast, accurate, close to real time measurement of the gas physical properties, such as thermal conductivity, speed of sound and carbon dioxide content.

From these measurements it infers an effective gas mixture comprising four components: methane, propane, nitrogen, and measured carbon dioxide and then uses ISO6976 to calculate the gas quality characteristics of calorific value (CV), Wobbe index (WI), relative density (RD), and compression factor (Z).

This new relationship between Ingenion and Waytronx allows for final development and manufacturing of the GasPT2 by the company that has been producing the original version of the device for several years.

"Developing a relationship with Ingenion was critical to our strategy of rapidly introducing this exciting technology into the natural gas market," explained Waytronx President & CEO, William Clough.

"Use of the well respected and internationally recognized services of an industry leading manufacturer like Ingenion, coupled with our previously announced relationship with GL, guarantees the acceptance of this technology into the rapidly growing natural gas market," Clough continued.

As manufacturer of the previous version of the GasPT, Ingenion has already produced the device for such industry leaders as BP Wytch Farm; BP Coryton; CTS; Niigata; Osaka Gas; Tokyo Gas; Yanmer Gas; Owens Corning Fiberglass; Corus; Perenco Bacton; British Gas Isle of Grain Facility; ExxonMobil South Hook Facility; GE; and others.

Ingenion is a fully certified ISO9001:2000 company, approved to manufacture electronic equipment for industrial, laboratory, telecommunications, and biomedical industries, including Intrinsically Safe equipment covered by the ATEX directive.

Ingenion offers an extensive range of solutions including hardware and software designs specifically for Hazardous Areas (ATEX certified product) such as those found in the natural gas industry. Ingenion prides itself on producing high quality products for use in extreme environments as evidenced by its ATEX and ISO certifications.

Peter Dyke, Ingenion's Co-Founder and Managing Director stated: "We are quite excited to finalize our relationship with Waytronx. We offer our customers a complete 'one-stop shop' turnkey solution, taking the initial concept through the design process, EMC testing, prototyping, and finally into production where we then turn out 'boxed' products ready to deliver."

"Our previous experience in manufacturing the original version of the GasPT device for GL, including BASEEFA certification, will enable us to avoid the pitfalls normally associated with 'new' technology in the natural gas industry," explained Dyke.

"Waytronx relationship with GL and Ingenion continues to demonstrate our commitment to partner with the 'best of breed,' world-class companies in order to acquire, develop, and commercialize leading edge technology designed to grow our business, while enhancing and increasing shareholder value. The GasPT2 device is a cornerstone for our continued growth into 2010 and beyond," concluded Clough.