SANTA CLARA, USA: Signal Integrity Software, Inc. (SiSoft) announced that it has IBIS-AMI models for Xilinx Virtex-6 GTX/GTH transceivers that both firms will demonstrate at DesignCon.
The two firms have worked together to correlate IBIS-AMI simulations to measurement, which SiSoft and Xilinx will be demonstrating in the Xilinx booth on the show floor.
Virtex-6 IBIS-AMI models allow fast, accurate simulation of the latest generation of Xilinx SerDes transceivers, which support operation at speeds up to 11.2 Gb/s. Xilinx IBIS-AMI models provide the same control settings as the actual hardware to let designers simulate the hardware the same way it will be programmed.
SiSoft’s Quantum Channel Designer (QCD) simulates how the Xilinx transceivers interact with a target serial channel to determine the serial link’s operating voltage and timing margins. QCD provides high performance simulation at rates of 1,000,000 bits/minute, allowing accurate predictions of link Bit Error Rate (BER).
In the demonstration on the show floor, Xilinx IBERT software is used to configure SerDes hardware with the same control settings simulated in SiSoft’s QCD. High-speed measurement equipment captures data that is compared to QCD simulation output.
Anthony Torza, senior product marketing manager at Xilinx, said: “This is the second generation of Virtex technology where we have collaborated with SiSoft to develop and correlate IBIS-AMI models to reference simulations and hardware. The combination of these IBIS-AMI models and SiSoft’s QCD provides customers with accurate simulation results at speeds more than 100 to 1000 times faster than traditional simulation methodologies, allowing customers to quickly optimize their designs for cost, reliability and performance.”
"Quantum Channel Designer (QCD) is the Industry’s Premier Channel Simulator for the design and analysis of multi-Gigabit serial links," said Barry Katz, president and CTO of SiSoft. "QCD combines superior support for IBIS-AMI SerDes simulation models with advanced analytical techniques to predict operating voltage and timing margins at probability levels of 1E-20 and lower. SiSoft has worked closely with its semiconductor partners to create the largest collection of validated design kits and broadest correlation of any IBIS-AMI simulator."
Pre-layout Design Space Exploration lets designers quickly evaluate hundreds of different design tradeoffs to optimize their serial link designs for cost, performance and reliability.