MONTPELLIER, FRANCE: Cortus, a technology leader in low-power, silicon-efficient, 32-bit processor IP, announced the first of a new family of products based on its v2 instruction set.
The APS23 core was built to deliver a new level of efficiency, ease of integration and cost of ownership for low-power, connected intelligent devices. The core reduces embedded system power by optimising the size of the instruction memory.
“The Internet of Things and other smart devices are rewriting the rules for developing systems-on-chip and fuelling huge growth for the semiconductor industry,” said Rich Wawrzyniak, senior analyst for ASIC & SoC at Semico Research.
"IoT is creating a massive universe of connected intelligent devices that place stringent demands on processor IP and potentially represent much bigger unit numbers than the mobile market. What’s needed is a minimalist approach to power, silicon area and cost without sacrificing performance or security. This is what Cortus is doing and why Semico believes the company is well-positioned to meet the needs of this emerging market.”
Cortus licenses a range of low-power, 32-bit processor cores for intelligent connected devices. Given the continuing demand to reduce power in system-on-chip (SoC) designs, Cortus has developed a second-generation (v2) instruction set aimed at reducing the size of a system’s instruction memory.
APS23 is the first product to use the v2 instruction set and is aimed at low power always on/always listening systems and those with less demanding clock frequencies such as Bluetooth Smart.