Wednesday, March 21, 2012

Amkor's flip chip molded ball grid array technology selected by Altera for use in 28-nm Arria V FPGAs

CHANDLER, USA: Amkor Technology Inc. announced that Altera Corp. is using Amkor’s latest flip chip molded ball grid array (FCmBGA) packaging technology in its 28-nm Arria V field programmable gate array products.

Amkor’s FCmBGA packages are designed to improve thermal performance with low system cost. Using an exposed die configuration, the package combines the excellent thermal performance of bare die FCBGA with a molded support surface around the die for the direct attachment of a heat sink.

Altera’s tailored 28-nm product family leverages different packaging technologies and process technologies and features a variety of capabilities which address designers’ power, performance and price requirements. Arria V FPGAs are designed to deliver a balance of cost and performance while delivering low total power for mid-range applications.

“When we designed Arria V FPGAs, we had to select a packaging technology that best served our customers’ low-power, high-performance and low-cost design requirements,” said Patrick Dorsey, senior director of component product marketing at Altera. “Amkor’s FCmBGA provides us the most optimized capabilities by offering high performance with a lower profile and better thermal coupling compared to alternative packaging solutions.”

“We are pleased that this package meets the needs of Altera’s product roadmap,” said Mike Lamble, Amkor’s executive VP, sales and product management. “FPGAs are the industry’s first large packages to go into production using the molded form factor, and leverage our years of high-volume manufacturing experience with exposed die molded flip chip CSP. We believe this package offers a very cost effective structure for improved system-level thermal performance, combined with a rugged construction for improved handling during system assembly and test.”

Amkor’s FCmBGA packages allow exposed die sizes up to 20mm without the need for a lid, cover the entire product family of body sizes with one package platform and reduce package weight. They also improve system board use by allowing closer spacing between passives and the flip chip die, enhance warpage control for thin core substrates and improve solder joint reliability for passives.

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