Wednesday, February 1, 2012

CEA-Leti launches Open 3D initiative

GRENOBLE, FRANCE: CEA-Leti announced the launch of a major new platform that provides industrial and academic partners with a global offer of mature 3D innovative technologies for their advanced products and research projects.

To help its partners solve key technology challenges, Leti’s Open 3D global offer includes 3D design, layout, technologies including interconnections, TSV and components assembly, reliability tests and final packaging for components or systems achievement.

The Open 3D platform includes Leti’s proven “off-the-shelf” 3D technologies that provides decisive advantages in performance, form factor and cost for a wide range of markets like bio/medical, aeronautics and space, consumer applications, defense and security, or fundamental research.Source: CEA-Leti, France.

The platform enables customers to achieve proof of concept with a small quantity of wafers or prototyping with a larger quantity. The offer is based on limited mature technologies in order to ensure moderate costs, short cycle times and performances corresponding to the initial technical requirements of Leti customers.

Open 3D also operates directly on active wafers with embedded components or on passive wafers for interposer technologies.

“Open 3D leverages Leti’s proven 3D expertise and infrastructure for collaborations that address new applications and markets, as a key new part of Leti’s mission to create innovation and transfer it to industry,” said Laurent Malier, CEO of Leti. “Our partners will include laboratories, universities and international research institutes as well as fabless chip companies and niche market manufacturers and integrators.”

Operated on the Minatec Campus in Grenoble with Leti teams and technological platforms, Open 3D is fully operational for 200mm wafers and will be operational in 2012 for 300mm wafers. Modules offered in the platform’s technology catalogue include:

Ø Through silicon vias (TSV) with aspect ratios to 1:3.
Ø Interconnects for chips to wafers based on micro-bumps technology.
Ø Interconnects for chips to substrates based on bumps technology.
Ø Redistribution layers (RDL).
Ø Under-bump metallurgy (UBM).
Ø Temporary bonding, thinning and debonding.

The technology catalogue will be regularly enriched with new technological modules that correspond with new 3D mature technologies and customer requirements.Source: CEA-Leti, France.

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