HILLSBORO, USA: Lattice Semiconductor Corp. announced release 6.2 of its PAC-Designer mixed signal design software, with updated support for Lattice's Platform Manager, Power Manager II and ispClock devices.
Users designing with Platform Manager devices now have more integrated access to the Lattice Diamond 1.4 software design environment. The advanced integration of the PAC-Designer 6.2 and Lattice Diamond 1.4 design software tools make more advanced digital design options available for Platform Manager products. Features such as reduced LogiBuilder code size, simplified design flow and better access to external Platform Manager pin-to-pin connections are among the improvements included in PAC-Designer release 6.2.
"Improvements in the latest PAC-Designer 6.2 and Lattice Diamond 1.4 software tools raise our customers' ability to design and simulate Platform Manager devices to new levels," said Shyam Chandra, Lattice Product Marketing Manager for Mixed Signal Products. "The ability to simulate external pins enables platform-level logic simulation that significantly increases the likelihood of first time success, resulting in reduced time to market."
Comprehensive analog and digital design flow
PAC-Designer 6.2 software provides an easy to use GUI-based design methodology for configuring the Platform Manager's analog sections. To implement more advanced digital board management functions, Lattice Diamond Verilog/VHDL design tools are available for use with the same design. Once a design is implemented, a complete simulation environment is created that includes automatic stimulus template file generation.
PAC-Designer 6.2 software includes reference designs specifically targeted for the Platform Manager development kit.