Tuesday, July 14, 2009

Magma's Talus Vortex and Hydra deliver timing closure on tough STARC design

SAN JOSE, USA & YOKOHAMA, JAPAN: Magma Design Automation Inc. announced that Japan's Semiconductor Technology Academic Research Center (STARC) has evaluated the Talus Vortex physical implementation system and Hydra, an auto-interactive floorplanning and hierarchical design planning and management solution.

STARC, a research consortium co-founded by major Japanese semiconductor companies, reported that the combined Talus Vortex and Hydra flow delivered impressive timing closure results on a very large test design and noted that the use of multi-processing throughout the flow contributes to the good turnaround time.

Based on the these results, STARC is presenting Talus Vortex and Hydra to member companies as a complete hierarchical flow to manage multimillion-gate design complexity and achieve timing closure.

The decision to endorse Magma's tools was made after a competitive benchmark based on a hierarchical design that included 12 million logic gates, 1,147 memory macros and six hierarchical blocks targeted at the 45nm process. The benchmark was meant to test the tools' ability to reach timing closure with no timing or design rule check (DRC) violations in the shortest amount of time.

Talus Vortex and Hydra reached timing closure with no DRCs and good turnaround time given the size of the design and the multi-mode, multi-corner optimization required to complete the design.

Magma's logic optimization capabilities reduced congestion and yielded an implementation that was much easier to route. This, along with Magma's crosstalk-avoidance capability during routing, reduced chip area by more than 12 percent, a significant achievement.

"We were impressed with the performance of Magma's Talus Vortex and Hydra on this large, complex 45-nm design," said Nobuyuki Nishiguchi, vice president and general manager of Division 1 at STARC.

"The Talus Vortex and Hydra multi-processing capabilities and large design capacity work well on large hierarchical designs. We were equally impressed with the system's ability to reach timing closure while optimizing for 15 different multi-mode, multi-corner scenarios."

"Ensuring that complex ICs operate correctly across all design modes and are 100 percent reliable across all process corners is an increasingly difficult task," said Premal Buch, general manager of Magma's Design Implementation Business Unit.

"With Talus Vortex's native multi-mode and multi-corner capabilities, analyses are performed earlier in the flow, use less memory and offer better runtime. The results of the STARC evaluation demonstrate Talus Vortex's ability to meet the timing, area and turnaround time of today's most advanced designs."

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