Altera and Northwest Logic develop RLDRAM 3 memory interface solution

HONG KONG: Altera Corp. and Northwest Logic, a leading provider of high-performance intellectual property (IP) cores for FPGAs, announced the immediate availability of a hardware-proven 1,600 Mbps Reduced Latency DRAM 3 (RLDRAM 3) memory interface solution for use in its high-end 28 nm Stratix V FPGAs.

The RLDRAM 3 memory interface combines auto-calibrated RLDRAM 3 UniPHY IP from Altera and a full-featured RLDRAM 3 controller core from Northwest Logic to significantly simplify interface design between RLDRAM 3 memory and the FPGA while maximizing memory throughput in high-end networking applications.

This jointly-developed RLDRAM 3 memory interface solution has been hardware-validated in customer designs using Micron Technology’s RLDRAM 3 memory.

The Altera Stratix V family of FPGAs is optimized to support Micron Technology's next-generation RLDRAM 3 memory. Stratix V devices feature a memory architecture that delivers the FPGA industry's highest system performance with low latency and high efficiency. Stratix V FPGAs enable networking equipment manufacturers to transfer voice, video and data across the Internet quickly and efficiently.

“FPGAs provide our customers with an effective way to optimize their network products to support the growth in data volume and track the changing network infrastructure," said Robert Feurle, Micron Technology’s VP of DRAM marketing. "Integrating Altera's high-end Stratix V FPGAs with RLDRAM 3 memory provides the high level of performance needed to accommodate the rapidly evolving memory requirements of our customers."

The combination of Northwest Logic’s RLDRAM 3 controller core and Altera’s UniPHY IP provides a complete RLDRAM 3 solution, including high-efficiency BL=2 operation, minimal timing closure issues due to operating at a quarter clock rate, and support for a broad range of RLDRAM 3 memory configurations.

“Our close partnership with Altera ensures we deliver proven solutions that our mutual customers can quickly implement into their systems with minimal effort,” said Brian Daellenbach, president at Northwest Logic. “This RLDRAM 3 controller core gives developers of high-end networking application a high-performance, low-latency solution with speeds up to 1,600 Mbps.”

“Stratix V FPGAs feature an optimized RLDRAM 3 interface that dramatically improves the latency and performance of high-end systems,” said Patrick Dorsey, senior director of component product marketing at Altera. “The high performance of our Stratix V FPGAs combined with the RLDRAM 3 controller core enables us to deliver the most efficient solutions for today’s highest performance networking applications.”

The RLDRAM 3 memory interface solution is available for use in Altera’s high-performance Stratix V FPGAs. The RLDRAM 3 controller core is delivered and fully supported by Northwest Logic.