Xilinx announces 20nm strategy for all programmable portfolio

USA: Xilinx Inc. announced its strategy for its 20nm portfolio, including the next-generation 8 series All Programmable FPGAs and second generation of 3D ICs and SoCs.

The 20nm portfolio builds upon the breakthroughs proven at 28nm to provide an extra generation of system performance, lower power and programmable system integration. Co-optimized with Xilinx’s Vivado Design Suite for the highest productivity and quality of results, the 20nm portfolio will address a wide range of next- generation systems and provide the most compelling programmable alternative ever to ASICs and ASSPs.

“The 20nm portfolio will address the exponentially growing  programmable imperative, fueled not only by the untenable cost of design, but by the need to continuously infuse more intelligence in every system with maximum adaptability,  reuse, and systems integration,” said Xilinx president and CEO, Moshe Gavrielov.

Xilinx is optimizing the 20nm All Programmable portfolio to address the requirements of next-generation ever ‘smarter,’ highly integrated, bandwidth hungry systems. These applications include:
* intelligent Nx100G - 400G wired networks,
* LTE Advanced wireless base stations employing smart, adaptive antenna, cognitive radio technologies, baseband and backhaul equipment,
* high throughput, low-power data center solid state storage, intelligent networking, and highly integrated low latency application acceleration,
* image/ video processing including intelligent ‘embedded vision’ for next-generation displays, professional cameras, factory automation, advanced automotive driver assistance, and surveillance systems, and  * leading edge connectivity for almost every application imaginable.
         
“Xilinx is building on its substantial technology and market lead at 28nm with another break-out portfolio at 20nm that is a generation ahead of its traditional competition and offers significant new advantages versus ASICs and ASSPs,” said Xilinx’s senior VP, programmable platform group, Victor Peng.
       
Xilinx is benefiting from a multi-year head start over the competition in multiple areas;  fine tuning real SoC and 3D IC products with hundreds of customers; developing new ecosystems, supply chains, and processes for quality and reliability, ‘co-optimizing’ these devices with its next-generation Vivado Design Suite tools; and redefining how high-performance transceivers are optimized in the system.

This allows Xilinx to infuse the added value of 20nm to each of the technologies pioneered and proven at 28nm, keeping Xilinx and its customers a generation ahead.

Next-generation all programmable FPGAs
The 20nm 8 series All Programmable FPGAs will provide 2x the performance, half the power, and 1.5 to 2x the integration capabilities over the current generation.  High-growth applications for these devices include Nx100G wired networking, wireless L1 baseband co-processing for LTE A wireless networks, and next-generation system acceleration and connectivity.

Notable advancements include:
* Architectural improvements to extend resource utilization beyond 90 percent and algorithms optimized for routability to deliver 4x faster design closure.
* System-optimized, high-speed transceivers with unmatched second generation adaptive equalization, low jitter, and the lowest power.
* 2x memory bandwidth coupled with significant increases in digital signal processing and on-chip memory performance.

Second generation all programmable 3D ICs
Xilinx’s second generation 3D ICs will have homogeneous and heterogeneous configurations.  High-growth applications include Nx100G/400G smart networks, top-of-rack data center switches, and highest integration ASIC prototyping.

Notable advancements include:
* Two-level 3D interconnect with industry-standard interfaces and 5x greater die-to-die bandwidth.
* 1.5-2x logic capacity, 4x transceiver bandwidth and integrated wide memories combined with Interlaken connectivity, traffic management and packet processing IP.
* Co-optimization with design tools results in 2x the integration through enhanced, highly scalable algorithms, intra- and inter-die routing capacity and auto design closure.

Second generation all programmable SoCs
Xilinx’s 20nm All Programmable SoCs integrate heterogeneous processing cores with FPGA fabric for accelerating key processing functions. High-growth applications include heterogeneous wireless network radios, baseband acceleration and backhaul, data center security appliances, and embedded vision applications in automotive, industrial, scientific, medical, and Aerospace and Defense markets.

Notable advancements include:
* Improved bandwidth between the processing system and the FPGA fabric for accelerating key processing functions.
* Next-generation I/O, transceiver and DDR memory interfacing capabilities.
* Next-generation block-level power optimizations along with advanced SoC-level power management.
* Next-generation security enhancements, building on advancements announced recently at the ARM TechCon 2012 conference.

Co-optimized with Vivado Design Suite
Introduced with Xilinx’s ground-breaking 28nm 7 series FPGA portfolio, the Vivado Design Suite is co-optimized even further for 20nm product families so that designers can achieve:

* 20 percent greater LUT utilization, up to a 3 speed grade performance improvement, and up to 35 percent greater power reduction.
* 4x improvement in design productivity due to faster hierarchical planning, analytic place and route engines and support for fast incremental ECOs (engineering change orders).
* Verification run-time improves by over 100x when using a C-based design flow, plus 4-5x faster integration time leveraging IP core reuse using the Vivado Design Suite IP integrator and packager.

Xilinx will be announcing more specifics by family as the portfolio is rolled out. Xilinx is already engaging with strategic customers on its 20nm FPGAs with restricted access to product definitions and documentation.