Monday, April 16, 2012

Atrenta offers IP kit spring cleaning promotion

SAN JOSE, USA: Atrenta Inc., a leading provider of SoC Realization solutions for the semiconductor and electronic systems industries, is offering semiconductor design groups access to the Atrenta IP Kit through a free two-week trial promotion.

From April 16, 2012 to May 31, 2012, qualified design groups in the US will be able to use Atrenta’s IP Kit to perform “spring cleaning” on their third-party or internally developed IP blocks for two consecutive weeks at no cost. Atrenta’s IP Kit is also used by TSMC to quality soft IP for inclusion in the TSMC 9000 IP library. (See the March 2011 press announcement for more details and a list of the IP providers participating in the program.)

“By enabling design groups to develop ‘SpyGlass® Clean’ IP blocks, they can realize more predictable design cycles and faster time to market,” said Mike Gianfagna, VP of marketing at Atrenta. “I am confident that many people will discover substantial opportunities to improve the quality of their IP libraries as a result of the program.”

Atrenta’s IP Kit helps SoC designers to confront IP re-use challenges, such as design completeness, power consumption, testability, subtle integration risks, managing updates/bug fixes and even finding the right IP. The Atrenta IP Kit offers the following user benefits:

IP quality metrics – easy to read HTML-based DashBoard and DataSheet reports
Automated SpyGlass setup – easy to use and run.
Comprehensive handoff checks - simulation-synthesis mismatch, electrical, clock domain crossing verification, testability analysis (stuck-at & at-speed), power estimation and verification of timing constraints.
IP packaging support.
Ease of integration into existing design flows.

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