Friday, April 20, 2012

Altera announces Q1 results

SAN JOSE, USA: Altera Corp. announced first quarter sales of $383.8 million, down 16 percent from the fourth quarter of 2011 and down 28 percent from the first quarter of 2011. First quarter net income was $115.8 million, $0.35 per diluted share, compared with net income of $146.6 million, $0.45 per diluted share, in the fourth quarter of 2011 and $224.1 million, $0.68 per diluted share, in the first quarter of 2011.

Cash flow from operating activities was $89.8 million. Altera repurchased 220,449 shares of its common stock during the quarter at a cost of $8.2 million. Altera ended the quarter with $3.6 billion in cash and investments.

Altera's board of directors has declared a quarterly cash dividend of $0.08 per share payable on June 1, 2012 to stockholders of record on May 10, 2012.

"Demand in the last month of the quarter was generally lighter than forecasted, particularly from customers in the communications vertical market. In addition, we experienced some mix issues as we attempted to fulfill orders that arrived in the last month of the quarter. These factors were the major contributors to quarterly revenue that was well below our previous outlook. As we enter the second quarter, our backlog position has significantly improved reflecting stronger demand for our products. We expect a rebound in our business in the second quarter," said John Daane, president, CEO and chairman of the board.

"Our portfolio of 28-nm FPGAs is displaying strong design-win momentum. We continue to benefit from both our incumbency position and a tailored architecture approach that optimizes the performance of each of our 28-nm FPGA families."

Several recent accomplishments mark the company's continuing progress:

* Altera is now delivering production-qualified Stratix V FPGAs, the industry's first fully production-qualified 28-nm FPGAs. Stratix V FPGAs are the only FPGAs manufactured using TSMC's 28-nm High Performance (28HP) process, which, when combined with the company's tailored architecture, produces the best logic fabric performance available today. The performance benefits offered by Altera's high-end FPGAs combined with its leading-edge process technology and feature advantages enable Stratix V FPGAs to displace ASICs and ASSPs and win over competitive FPGAs across the diverse markets accessible to FPGAs.

Initial software support for the Stratix V family became available in May 2010. Altera began shipping engineering samples of the industry's first high-end 28-nm FPGAs in April 2011 and moved to production in less than a year with eight Stratix V family members now in production. The Stratix V FPGA family includes an E variant which is rich in logic resources and GX, GS and GT variants which include the FPGA industry's only integrated transceivers operating up to 28 Gbps.

* The first of Altera's Cyclone V FPGAs, the only 28-nm low-cost FPGAs in the market, are now shipping. Availability of the Cyclone V family completes Altera's release of its 28-nm tailored product portfolio which offers a broad range of devices—from the highest bandwidth to the lowest power—to meet customers' specific design needs. The Cyclone V family is developed on TSMC's 28-nm Low Power (28LP) process, delivering the lowest power, lowest cost and optimal performance levels needed for today's high-volume, cost-sensitive applications.

The family encompasses six variants allowing designers to choose the device that best meets their needs—the logic-only E, the 3.125 Gbps transceiver GX, the 5 Gbps transceiver GT, and the SE, SX and ST SoC FPGA variants with integrated dual-core ARM®-based Hard Processor Systems (HPSs).

* Altera and TSMC have jointly developed the world's first heterogeneous 3D IC test vehicle using TSMC's Chip-on-Wafer-on-Substrate (CoWoS) integration process. Heterogeneous 3D ICs are one of the innovations enabling the industry's move beyond Moore's Law by stacking various technologies within a single device, including analog, logic and memory. Altera's vision for heterogeneous 3D ICs includes developing device derivatives that allow customers to mix and match silicon IP based on their application requirements.

Altera will leverage its leadership position in FPGA technology to integrate various technologies with an FPGA, including CPUs, ASICs, ASSPs, memory and optics. CoWoS is an integrated process technology that attaches device silicon chips to a wafer through a chip on wafer (CoW) bonding process. The CoW chip is attached to the substrate to form the final component (CoW-on-Substrate), thereby avoiding manufacturing-induced warping that otherwise would limit the appeal of this new technology.

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