Thursday, April 5, 2012

MOS-AK/GSA modeling working group recap of Q1 workshop

NOIDA, INDIA: The MOS-AK/GSA Modeling Working Group, a global compact modeling standardization forum, held its Q1 2012 workshop on March 16-18, 2012 at the Jaypee Institute of Information Technology (JIIT), Noida (India). Over 75 international academic researchers and modeling engineers attended five sessions to hear twenty technical compact modeling keynote addresses and eight complementary poster presentations.

The Workshop was co-organized by Indian National Academy of Engineering (INAE), supported by Ministry of Communication and IT (DIT), Government of India, Council of Scientific and Industrial Research (CSIR); Jaypee Institute of Information Technology (JIIT), Noida; with sponsorship provided by the microelectronic and semiconductor industry leaders: AMS, IBM, TI, STM, Cadence, Mentor Graphics and Masamb.

The workshop was inaugurated by Prof. W. Webster, University of California, Berkeley, and delegates were welcomed by Prof. S.C. Saxena, Vice Chancellor, JIIT, Noida. Dr. M.J. Zarabi, VP, INAE, has announced opening of MOS-AK/GSA/India. Prof. A.B. Bhattacharyya, the Workshop Chair, highlighted that the modeling event was an attempt to bring international and Indian researchers on a common platform to focus on issues related to development, standardization and production of compact models for circuit design. He also emphasized that close academy - industry interaction is essential in compact modeling pursuits and he was encouraged that speakers and participants were drawn from the best of both communities.

The Workshop’s three-day event focused on a broad range of compact modeling presentations with the following topics: the advances in the compact/SPICE modeling developments such as BSIM4, HiSIM family and next generation compact model BSIM6 that overcomes symmetry limitation, Verilog-A standardization of compact model in view of the industrial and academic perspective; performance modeling of nano-scale CMOS transistors accounting for, among others, tunnel-FET and quantum mechanical effects as well as new materials and architectures i.e graphene based transistors; automatic parameter extraction procedure for surface potential and charge based models and their high voltage (HV) extensions as well as analog radio frequency (RF) CMOS/ SOI IC designs and applications; interconnect modeling and related parasitic extraction, SPICE modeling of passive surface acoustic wave (SAW) sensors, technology computer-aided design TCAD/CAD simulations for advanced compact modeling; open source CAD/EDA tools developments; compact model application to reliability circuit simulation, statistical variability and time depended degradation.

The Modeling event ended with high-quality technical poster presentations covering model development, implementation, foundry interface, device-level circuit simulation and block level look-up table based FinFET simulation. All the workshop materials, session and poster presentations are available for download.

The MOS-AK/India Tutorial "CMOS Technology and SPICE Models" was organized as an integral part the modeling workshop. Personally invited by Prof. A.B.Bhattacharyya, JIIT, Noida, India, internationally recognized experts: Dr. Narain Arora, Silterra, Malaysia; and Samar Saha, SuVolta, Inc., USA; covered topics related to the MOS transistors modeling with emphasis on BSIM4; SPICE models for advanced CMOS chip design as well as interconnect modeling. The tutorial gathered more than sixty registered participants.

Closing the MOS-AK/GSA/India Compact Modeling workshop, Dr. M. J. Zarabi, expressed his wish to create an Indian national compact modeling network. Dr. W. Grabinski, COMON Network Dissemination Manager, was pleased that the European COMON and MOS-AK/GSA actions have been recognized and initialized such important national R&D initiative in India.

The MOS-AK/GSA Modeling Working Group has several upcoming events: Q2 2012 MOS-AK/GSA Modeling Workshop in Dresden, Germany; Q3 2012 MOS-AK/GSA ESSDERC/ESSCIRC Modeling Workshop in Bourdeaux, France; Q3 2012 MOS-AK/ GSA Modeling Workshop in California.

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