SUNNYVALE, USA: Vivante Corp., a worldwide leader in graphics and visualization technologies for handheld and consumer devices, has worked with Cadence to qualify the Cadence double data rate (DDR) Memory controller on-chip intellectual property (IP) solution for use with Vivante's graphics processing unit (GPU) IP solution.
Vivante's high-performance multi-core GPUs are capable of processing massive amounts of data in order to create the most advanced and realistic 3D visual effects on mobile, embedded and home entertainment devices. To render high quality images, the GPU requires access to external DDR DRAM through a highly optimized, low-latency DDR memory controller.
The collaboration between Cadence and Vivante has created a tightly coupled memory subsystem that maximizes the efficiency between the GPU, memory controller and external DDR memory. Vivante's memory-friendly architecture uses innovative design features like burst building, request merging, efficient data access, compression, prefetching, smart banking, prediction and much more.
These pioneering features provide the optimal data flow and memory access patterns for graphics applications. The Cadence DDR controller works as the interface between the GPU and DDR memory, fine-tuned to perform data and traffic management. This co-optimized solution enables SoC designers to select a proven, performance-enhanced solution ready for mass market deployment.
"Graphics performance represents a cornerstone of modern mobile devices. By optimizing the memory subsystem interface to work with the graphics subsystem, we are able to deliver significant advantages in power and performance, which are key focus areas for Cadence," said Vishal Kapoor, VP of product marketing, SoC Realization Group at Cadence. "Our collaboration with Vivante is enabling end customers to fully benefit from the advanced system-specific capabilities of Cadence's industry leading DDR solutions."
Wei-Jin Dai, president and CEO of Vivante, said: "Consumer markets that use our GPUs, such as smartphones, tablets and HDTVs, are already visually aware. These segments are upping the ante for better graphics, augmented reality, flashy images, and captivating game play based on our new GPU cores. Balancing performance and memory bottlenecks is a key enabler to achieving these new experience levels is. Our collaboration with Cadence was the key focus to innovate and build the ideal graphics memory system. As these technologies are built into our memory-friendly designs already, we have solutions that benefit from the bandwidth, power, size and cost equations SoC architects have to account for. We look forward to working with Cadence on upcoming memory standards and features."