GENEVA, SWITZERLAND: STMicroelectronics has expanded its most successful and well proven STM32 portfolio of more than 300 micros. The STM32 F0 is an entirely new family of devices combining enhanced features with the ultra low-power ARM Cortex-M0 embedded processor for extremely cost-sensitive applications. The new microcontroller family bridges the gap for applications using 8- and 16-bit devices, enabling sophisticated high-end features in economical end products.
The ARM Cortex-M processor series has already revolutionized electronic product design by redefining familiar design tradeoffs such as performance, cost, power consumption, ease of use and scalability. By creating the STM32 and defining its DNA to include outstanding real-time performance, leading low-power efficiency, an amazingly diverse set of advanced peripherals, and a valuable ecosystem of development tools, ST has established the industry’s broadest and most successful family of Cortex-M processor-series-based-microcontrollers, which includes the world’s highest-performance Cortex-M4 processor-based microcontroller range available.
The new STM32 F0 family, announced today, builds on this DNA by using the well proven Cortex-M0 core, running at 48MHz version, and adding high-value features not available in competing devices.
“The STM32 F0 family extends the platform advantages of our Cortex-M processor-series portfolio, and enables customers to leverage STM32 DNA at a budget price,” explained Michel Buffa, GM for ST’s Microcontroller Division. “By combining best-in-class communication and control peripherals with the M0 core, the STM32 F0 series enables developers to deliver new solutions offering functions and capabilities traditionally associated with significantly higher price points.”
“ST was one of ARM’s lead partners for the Cortex-M3 processor, the first Cortex-M series processor, and has subsequently enhanced the ARM ecosystem with high-value products that leverage the intellectual property of ARM, ST, and numerous development-tool suppliers,” said Keith Clarke, VP, Embedded Processors, ARM. “The Cortex-M0 processor offers a perfect opportunity for 8- and 16-bit MCU developers to achieve the performance benefits of 32-bit, without sacrificing power or area, while adding the ability to seamlessly migrate to higher-performance Cortex processors in the future.”
The STM32 F0 further extends the STM32 portfolio, addressing applications previously served by 8-bit MCUs, while taking advantage of the STM32 DNA with a complete portfolio, full manufacturing commitment and budgetary price. The enhanced features of the STM32 F0 family include up to seven timers suited for controlling items such as heaters or motors, enabling a single device to control multiple elements in an induction cooker, for example.
The STM32 F0 series also integrates hardware support for Consumer Electronics Control (CEC) included in the HDMI interface. This simplifies design into numerous home multimedia devices, allowing connections based on the latest industry-standard protocols while leaving the microcontroller’s CPU, memory and peripherals free to perform other tasks. The CEC kernel can be independently clocked by a low-speed 32kHz external clock or internal 8MHz clock further reducing system cost. In addition, the STM32 F0’s 12MHz I/O toggle speed allows developers to build sophisticated control applications at lower cost and lower power consumption.
STM32 F0 microcontrollers are sampling now at the resale price of $0.95 for quantities of 1000 pcs to lead customers. Full production is scheduled for the beginning of Q2 2012, and the devices will be available in 32-pin UFQFPN32, 48-pin LQFP48 and 64-pin LQFP64 package options with 20-pin and 100-pin extensions soon to follow.
Wednesday, February 29, 2012
Renesas Electronics unveils new-generation RH850 MCU for automotive apps
TOKYO, JAPAN: Renesas Electronics, a premier provider of advanced semiconductor solutions, introduced the new RH850 family of 32-bit microcontrollers (MCUs) for automotive applications.
The RH850 is based on 40 nanometer (nm) MONOS (metal oxide nitride oxide silicon) embedded flash technology, making Renesas the first semiconductor supplier to provide this technology in the automotive sector. The RH850 family of MCUs is based on the new RH850 32-bit core, which provides the benefits of ultra low power process technology with the superior computing power of the world’s leading 32-bit core.
The RH850 family is the latest in a series of devices developed by Renesas Electronics following the merger of Renesas Technology and NEC Electronics in April 2010, which will continue to enhance both former companies’ successful, reliable and committed automotive history.
Renesas’ RH850 addresses major trends of the changing automotive market across all car segments. These include functional safety requirements from ASIL A to ASIL D level, integration of security functions and especially low power consumption, to support environmental considerations such as CO2 reduction.
The RH850 family covers performance classes from 64 megahertz (MHz) up to 320 MHz as single core performance. Multi-core systems will achieve even higher overall performance. The embedded flash memory will range from 256 KB to 8 MB, while additional blocks for data flash, emulating EEPROM functionality, are also included and deliver write/erase endurance values of more than 125 K write/erase cycles at data retention times of minimum 20 years.
The roll-out will involve multiple, application-tailored product line-ups (series), each equipped with the RH850 32-bit core architecture. The series will span single-core, dual-performance cores, dual lock-step cores and multiple-core architectures, addressing virtually all 32-bit MCU performance and safety requirements in the various automotive segments. Combined with scalable functional IP blocks, memory and pin counts, Renesas’ series concept allows customers to select the most appropriate product for their needs, safe in the knowledge that they have the flexibility to up- or down-scale without changing the application software.
To ensure software compatibility for customers, all product series are based on the same platform development concept, re-using the same IPs across the entire RH850 generation.
One integrated development environment (IDE) will support the entire RH850 family of products, enabling a smooth migration path from legacy automotive products as well as a further reduction of overall development investment.
Samples of Renesas’ first RH850 family of MCU products will be available in autumn 2012. Mass production is scheduled to begin in 2014.
The RH850 is based on 40 nanometer (nm) MONOS (metal oxide nitride oxide silicon) embedded flash technology, making Renesas the first semiconductor supplier to provide this technology in the automotive sector. The RH850 family of MCUs is based on the new RH850 32-bit core, which provides the benefits of ultra low power process technology with the superior computing power of the world’s leading 32-bit core.
The RH850 family is the latest in a series of devices developed by Renesas Electronics following the merger of Renesas Technology and NEC Electronics in April 2010, which will continue to enhance both former companies’ successful, reliable and committed automotive history.
Renesas’ RH850 addresses major trends of the changing automotive market across all car segments. These include functional safety requirements from ASIL A to ASIL D level, integration of security functions and especially low power consumption, to support environmental considerations such as CO2 reduction.
The RH850 family covers performance classes from 64 megahertz (MHz) up to 320 MHz as single core performance. Multi-core systems will achieve even higher overall performance. The embedded flash memory will range from 256 KB to 8 MB, while additional blocks for data flash, emulating EEPROM functionality, are also included and deliver write/erase endurance values of more than 125 K write/erase cycles at data retention times of minimum 20 years.
The roll-out will involve multiple, application-tailored product line-ups (series), each equipped with the RH850 32-bit core architecture. The series will span single-core, dual-performance cores, dual lock-step cores and multiple-core architectures, addressing virtually all 32-bit MCU performance and safety requirements in the various automotive segments. Combined with scalable functional IP blocks, memory and pin counts, Renesas’ series concept allows customers to select the most appropriate product for their needs, safe in the knowledge that they have the flexibility to up- or down-scale without changing the application software.
To ensure software compatibility for customers, all product series are based on the same platform development concept, re-using the same IPs across the entire RH850 generation.
One integrated development environment (IDE) will support the entire RH850 family of products, enabling a smooth migration path from legacy automotive products as well as a further reduction of overall development investment.
Samples of Renesas’ first RH850 family of MCU products will be available in autumn 2012. Mass production is scheduled to begin in 2014.
Qualcomm and Microsoft to provide developers with Snapdragon-based Windows on ARM test PCs
BARCELONA, SPAIN: Qualcomm Inc. announced that its Snapdragon processor will be joining Microsoft Corp.'s Windows on ARM developer seeding program. Qualcomm is working with Microsoft to provide test PCs to select developers in order to test and optimize apps for forthcoming Snapdragon-powered Windows on ARM PCs and tablets.
This invitation-only program will combine a pre-release version of Windows on ARM with next-generation, high performance Snapdragon S4 test PCs. These test PCs are not representative of commercial form factors or the final Windows on ARM experience; they are designed to give developers early access to building and testing Windows Metro style apps on Qualcomm's latest technology.
The Windows on ARM developer seeding program will help ensure that Windows Metro style apps available in the Windows Store work great on all Windows 8-based PCs, including those with Qualcomm's ARM-compliant Snapdragon processors.
"Microsoft's development tools and the Qualcomm Snapdragon test PCs will enable developers to build and test Metro style apps for Windows on ARM PCs," said Stefan Kinnestrand, director of business planning, Windows Division, Microsoft. "Based on Qualcomm's Snapdragon processor, these systems will equip developers to create Metro style apps and offer a rich set of hardware peripherals that plug in and help enable seamless user experiences on the Windows on ARM platform."
Qualcomm, with Microsoft, is among those leading the shift to anytime, anywhere connectivity. The Snapdragon mobile processor will offer a combination of processing performance, rich multimedia, GPS, high-performance graphics, wireless connectivity and power efficiency with Windows on ARM.
"Qualcomm is committed to the Windows on ARM ecosystem and knows that enabling developers is a crucial factor for its success," said Luis Pineda, senior VP, product management, computing and consumer products at Qualcomm. "We are now providing Snapdragon S4 test PCs with built-in 4G LTE, activated in some regions, to software application developers."
Qualcomm's participation in the Windows on ARM developer seeding program provides select developers with the latest generation Snapdragon S4 test PCs running a pre-release version of Windows on ARM. These test PCs contain Qualcomm's Snapdragon S4 MSM8960 processor with second-generation high performance, power efficient CPU, hardware accelerated Adreno graphics, full multimedia, GPS, sensors, and peripherals that will enable development and test of next-generation Windows Metro style apps for the coming wave of Windows on ARM PCs.
This invitation-only program will combine a pre-release version of Windows on ARM with next-generation, high performance Snapdragon S4 test PCs. These test PCs are not representative of commercial form factors or the final Windows on ARM experience; they are designed to give developers early access to building and testing Windows Metro style apps on Qualcomm's latest technology.
The Windows on ARM developer seeding program will help ensure that Windows Metro style apps available in the Windows Store work great on all Windows 8-based PCs, including those with Qualcomm's ARM-compliant Snapdragon processors.
"Microsoft's development tools and the Qualcomm Snapdragon test PCs will enable developers to build and test Metro style apps for Windows on ARM PCs," said Stefan Kinnestrand, director of business planning, Windows Division, Microsoft. "Based on Qualcomm's Snapdragon processor, these systems will equip developers to create Metro style apps and offer a rich set of hardware peripherals that plug in and help enable seamless user experiences on the Windows on ARM platform."
Qualcomm, with Microsoft, is among those leading the shift to anytime, anywhere connectivity. The Snapdragon mobile processor will offer a combination of processing performance, rich multimedia, GPS, high-performance graphics, wireless connectivity and power efficiency with Windows on ARM.
"Qualcomm is committed to the Windows on ARM ecosystem and knows that enabling developers is a crucial factor for its success," said Luis Pineda, senior VP, product management, computing and consumer products at Qualcomm. "We are now providing Snapdragon S4 test PCs with built-in 4G LTE, activated in some regions, to software application developers."
Qualcomm's participation in the Windows on ARM developer seeding program provides select developers with the latest generation Snapdragon S4 test PCs running a pre-release version of Windows on ARM. These test PCs contain Qualcomm's Snapdragon S4 MSM8960 processor with second-generation high performance, power efficient CPU, hardware accelerated Adreno graphics, full multimedia, GPS, sensors, and peripherals that will enable development and test of next-generation Windows Metro style apps for the coming wave of Windows on ARM PCs.
EDA veteran invests in Swedish start-up Verifyter AB
LUND, SWEDEN: Verifyter AB, provider of software and solutions for automatic regression testing and failure diagnosis, announced the signing of an agreement with Lars-Eric Lundgren, founder of HARDI Electronics AB and former GM of Synplicity Hardware Platforms Group, to invest in the company and to serve as the chairman of the board.
Verifyter develops the debug automation and analysis software PinDown, which is used to dramatically accelerate bug diagnosis and root cause analysis in regression test suites. Using PinDown can significantly improve testing and validation of complex hardware and software design projects, thus saving time and money while at the same time improving quality and time-to-market.
“Verifyter is a very interesting company with very exciting products in the verification analysis domain,” stated Lars-Eric Lundgren, chairman of the board at Verifyter. “It suits my experience very well since I have spent the last 10 years with the HAPS/HARDI-products for ASIC-verification, making HAPS one of the leading FPGA-based prototyping solutions. HAPS today is a part of Synopsys, a leading EDA-company.
“As chairman, advisor and investor in Verifyter, I will leverage this experience to make the international launch of the Verifyter products a success. I see a great potential in PinDown since it not only can be used by ASIC-designers but also by software developers to speed-up regression testing and improve product quality.”
One of the first Verifyter customers, Synopsys Inc., is already using PinDown successfully on several projects. Verifyter is now set, with the support and advice from Lars-Eric Lundgren to expand rapidly and add more customers worldwide.
“We will use the recent investment to expand the development team, but above all, we will establish a sales and support organization in US”, said the CEO of Verifyter, Daniel Hansson. “There is a growing need for efficient bug diagnosis in automatic testing and we know from customers’ successful experience that PinDown delivers as promised."
Verifyter develops the debug automation and analysis software PinDown, which is used to dramatically accelerate bug diagnosis and root cause analysis in regression test suites. Using PinDown can significantly improve testing and validation of complex hardware and software design projects, thus saving time and money while at the same time improving quality and time-to-market.
“Verifyter is a very interesting company with very exciting products in the verification analysis domain,” stated Lars-Eric Lundgren, chairman of the board at Verifyter. “It suits my experience very well since I have spent the last 10 years with the HAPS/HARDI-products for ASIC-verification, making HAPS one of the leading FPGA-based prototyping solutions. HAPS today is a part of Synopsys, a leading EDA-company.
“As chairman, advisor and investor in Verifyter, I will leverage this experience to make the international launch of the Verifyter products a success. I see a great potential in PinDown since it not only can be used by ASIC-designers but also by software developers to speed-up regression testing and improve product quality.”
One of the first Verifyter customers, Synopsys Inc., is already using PinDown successfully on several projects. Verifyter is now set, with the support and advice from Lars-Eric Lundgren to expand rapidly and add more customers worldwide.
“We will use the recent investment to expand the development team, but above all, we will establish a sales and support organization in US”, said the CEO of Verifyter, Daniel Hansson. “There is a growing need for efficient bug diagnosis in automatic testing and we know from customers’ successful experience that PinDown delivers as promised."
Intel Capital to invest in future of automotive technology
SANTA CLARA, USA & KARLSRUHE/FELDKIRCHEN, GERMANY: Intel Capital announced a $100 million investment fund to help accelerate innovation and the adoption of new technology and services in the automotive industry. Intel Capital is the first global technology investment organization headquartered in Silicon Valley to announce a dedicated focus on automotive technology innovation.
The Intel Capital Connected Car Fund will be invested globally over the next 4 to 5 years in hardware, software and services companies developing technologies to promote new, compelling in-vehicle applications and enable the seamless connection between vehicles and any connected device, including mobile devices and sensors.
“Technology has become an integral component of everyday life, with consumers demanding uninterrupted access to the Internet and the constant flow of information, news, entertainment, and social media,” said Arvind Sodhani, president of Intel Capital and Intel executive VP. “Automobiles must be able to provide these same consistent and engaging computing experiences, but in a safe manner. The Intel Capital Connected Car Fund will drive the development of technologies to enhance the in-vehicle experience of the future.”
The announcement is part of Intel’s ongoing work with automakers and in-vehicle infotainment suppliers to help integrate advanced technologies into cars. Ultimately, the connected car will have the intelligence and context awareness to offer the right information, at the right time and in the right way to keep drivers and passengers informed, entertained and productive while maintaining optimal safety. Once the car becomes connected, it can also communicate with the cloud, the transportation infrastructure and even other vehicles to provide additional services such as advanced driver assistance and real-time traffic information to optimize the flow of traffic.
“The car is the ultimate mobile device,” said Staci Palmer, GM of Intel’s Automotive Solutions Division. “By 2014, automobiles will be among the top three fastest-growing areas for connected devices and Internet content.¹ Intel’s experience in developing personal computing, software, security and cloud computing technologies will bring a new level of innovation to the car to enhance the driving experience for both drivers and passengers.”
To help realize that vision, areas of investment for the Intel Capital Connected Car Fund will include technologies that advance the next generation of in-vehicle infotainment, advanced driver assistance systems and seamless mobile connectivity. This includes new in-vehicle applications and development tools, next-generation ADAS technologies and multimodal capabilities such as speech recognition, gesture recognition and eye tracking optimized for the connected car.
In addition to the Intel Capital Connected Car Fund, Intel Corporation President and CEO Paul Otellini also announced today at an event in Karlsruhe, Germany the opening of a new global Automotive Innovation and Product Development Center, an academic outreach program focused on IVI and telematics, and expansion of Intel Labs Experience and Interaction Research in automotive.
The Intel Capital Connected Car Fund will be invested globally over the next 4 to 5 years in hardware, software and services companies developing technologies to promote new, compelling in-vehicle applications and enable the seamless connection between vehicles and any connected device, including mobile devices and sensors.
“Technology has become an integral component of everyday life, with consumers demanding uninterrupted access to the Internet and the constant flow of information, news, entertainment, and social media,” said Arvind Sodhani, president of Intel Capital and Intel executive VP. “Automobiles must be able to provide these same consistent and engaging computing experiences, but in a safe manner. The Intel Capital Connected Car Fund will drive the development of technologies to enhance the in-vehicle experience of the future.”
The announcement is part of Intel’s ongoing work with automakers and in-vehicle infotainment suppliers to help integrate advanced technologies into cars. Ultimately, the connected car will have the intelligence and context awareness to offer the right information, at the right time and in the right way to keep drivers and passengers informed, entertained and productive while maintaining optimal safety. Once the car becomes connected, it can also communicate with the cloud, the transportation infrastructure and even other vehicles to provide additional services such as advanced driver assistance and real-time traffic information to optimize the flow of traffic.
“The car is the ultimate mobile device,” said Staci Palmer, GM of Intel’s Automotive Solutions Division. “By 2014, automobiles will be among the top three fastest-growing areas for connected devices and Internet content.¹ Intel’s experience in developing personal computing, software, security and cloud computing technologies will bring a new level of innovation to the car to enhance the driving experience for both drivers and passengers.”
To help realize that vision, areas of investment for the Intel Capital Connected Car Fund will include technologies that advance the next generation of in-vehicle infotainment, advanced driver assistance systems and seamless mobile connectivity. This includes new in-vehicle applications and development tools, next-generation ADAS technologies and multimodal capabilities such as speech recognition, gesture recognition and eye tracking optimized for the connected car.
In addition to the Intel Capital Connected Car Fund, Intel Corporation President and CEO Paul Otellini also announced today at an event in Karlsruhe, Germany the opening of a new global Automotive Innovation and Product Development Center, an academic outreach program focused on IVI and telematics, and expansion of Intel Labs Experience and Interaction Research in automotive.
TI intros lowest latency Ethernet PHYTER transceiver for industrial market
DALLAS, USA: Texas Instruments Inc. (TI) announced the expansion of its broad Ethernet portfolio to include its next-generation single-port 10/100 Ethernet physical layer (PHY). The TLK110 offers the lowest deterministic transmit and receive latency, which provides predictable and precise control for real-time applications. For daisy-chain architectures, this fast loop time is 30-percent faster than competitive PHYs.
Its programmability and strapping options cover industrial Ethernet standards such as EtherCAT, Powerlink, ProfiNET and SERCOSIII. In addition to this flexibility and best-in-class performance, the TLK110 provides error-free cable reach of 150m.
The TLK110 is pin-to-pin compatible with the DP83848I Ethernet PHY, providing an easy upgrade path without board redesign for customers who need the additional features of the TLK110 and a multi-fab flow for logistical dual-sourced Ethernet PHYs. Whether designers need a single-port PHY (with and without IEEE 1588), dual port PHY, Gigabit PHY or MAC+PHY, TI is committed to solving industrial Ethernet challenges with devices in various temperature ranges and package options.
TI's PHYTER devices also complement TI's embedded processor platforms such as Sitara ARM microprocessors, Stellaris ARM Cortex microcontrollers, Hercules safety microcontrollers, and TMS320C6000 digital signal processors.
TLK110 key features and benefits
* Lowest deterministic channel latency lowers system loop time with real-time accuracy.
* Multiple fast link-up configurations (force modes) to establish fast communication.
* Fast link loss detection time of less than 10 microseconds meets the needs of industrial Ethernet protocol standards.
* Cable diagnostics find faults with an accuracy of +/– one meter, easing cable repair and installation and allowing real time monitoring of cable quality.
The TLK110 comes in a 48-pin, LQFP package and is in full production now. The TLK110 is available from TI and authorized distributors with the suggested resale price of $3 in quantities of 1,000.
Its programmability and strapping options cover industrial Ethernet standards such as EtherCAT, Powerlink, ProfiNET and SERCOSIII. In addition to this flexibility and best-in-class performance, the TLK110 provides error-free cable reach of 150m.
The TLK110 is pin-to-pin compatible with the DP83848I Ethernet PHY, providing an easy upgrade path without board redesign for customers who need the additional features of the TLK110 and a multi-fab flow for logistical dual-sourced Ethernet PHYs. Whether designers need a single-port PHY (with and without IEEE 1588), dual port PHY, Gigabit PHY or MAC+PHY, TI is committed to solving industrial Ethernet challenges with devices in various temperature ranges and package options.
TI's PHYTER devices also complement TI's embedded processor platforms such as Sitara ARM microprocessors, Stellaris ARM Cortex microcontrollers, Hercules safety microcontrollers, and TMS320C6000 digital signal processors.
TLK110 key features and benefits
* Lowest deterministic channel latency lowers system loop time with real-time accuracy.
* Multiple fast link-up configurations (force modes) to establish fast communication.
* Fast link loss detection time of less than 10 microseconds meets the needs of industrial Ethernet protocol standards.
* Cable diagnostics find faults with an accuracy of +/– one meter, easing cable repair and installation and allowing real time monitoring of cable quality.
The TLK110 comes in a 48-pin, LQFP package and is in full production now. The TLK110 is available from TI and authorized distributors with the suggested resale price of $3 in quantities of 1,000.
PMC first to market with symmetric end-to-end 10G-EPON SoCs
SUNNYVALE, USA: PMC-Sierra Inc. continues its FTTH leadership announcing the commercial availability of an end-to-end symmetric 10G-EPON fiber access System-on-Chip (SoC) solution. PMC’s highly integrated PAS9000 Optical Networking Unit (ONU) and PAS8000 Optical Line Terminal (OLT) SoCs are the industry’s first to support 10Gb/s downstream and 10Gb/s upstream access connectivity.
This performance and feature integration enables carriers to provide advanced triple-play video-on-demand, high-speed Internet access and Voice-over-IP services to residential and business customers. Transitioning from EPON to 10G-EPON allows carriers to connect up to 10 times more subscribers per Optical Distribution Network (ODN), reducing OPEX and CAPEX per subscriber. PMC’s 10G-EPON solutions are interoperable with deployed EPON equipment, allowing carriers to gradually upgrade their networks and deploy 10G-EPON ONUs alongside EPON ONUs.
PMC’s ONU devices feature the industry’s most advanced integration to reduce system cost and power. Integrated synchronization functions enable backhauling of mobile networks over 10G-EPON, eliminating the need for external circuitry. Integrated power-saving modes reduce ONU power consumption by more than 50 percent, enabling energy-efficient networks.
“Carriers continue to seek ways to meet the demand for enhanced triple-play services and increased bandwidth, and 10G-EPON provides the answer with high reliability and low operational expenses,” said Ofer Bar-Or, vice president and general manager of PMC’s Fiber to the Home Division. “As the market leader, PMC is paving the way for higher bandwidth networks at low power and high QoS. Our highly integrated SoCs allow easy migration from EPON and GPON to 10G-EPON.”
PMC’s 10G-EPON solution complies with IEEE 802.3av and China carrier specifications and is targeted at Fiber-To-The-Home (FTTH), Fiber-To-The-Curb (FTTC) and Fiber-To-The-Building (FTTB) applications. All devices feature PMC’s field-proven GigaPASS™ architecture that achieves up to 10 gigabit data rates, and is already deployed in more than 20 million PON devices worldwide.
10G-EPON ONU key features
PMC’s PAS9000 family includes the PAS9301 asymmetric ONU and the PAS9401 asymmetric and symmetric ONU. The devices include a 10G-EPON MAC, SERDES, powerful embedded controller and GigaPASS bridge for advanced classification, queuing and filtering (see figure 1). An integrated programmable networking engine provides enhanced Quality of Service (QoS) that complies with China Telecom specification version 3.0, including IPv6 protocol support.
PMC’s scalable User Network Interface is configurable to up to four GbE interfaces, up to four 2.5Gb/s interfaces, or to a 10 Gb/s interface for Single Family Unit (see figure 2) or Multiple Dwelling Unit (see figure 3) applications. The devices include mobile-backhaul-over-EPON support with integrated Synchronous Ethernet and Time of Day delivery, as well as wire-speed throughput at all packet sizes, queuing, filtering and advanced QoS, Ethernet connection to an external processor.
The solutions re-use PMC’s widely-deployed EPON software packages, including the ONU software package, which is common for EPON and 10G-EPON ONUs, to preserve OEM investment and reduce time-to-market. PMC software supports low-footprint OS and Linux, featuring a 10G EPON protocol stack and networking drivers, IEEE 802.3av OAM protocol with operator-specific stacks and integrated peripheral drivers.
10G-EPON OLT key features
PMC’s previously announced PAS8000 OLT devices integrate the most advanced fiber access capabilities on the market. An integrated traffic manager enables carriers to deliver new services to more subscribers. A complete, always-on toolkit for optical network and ONU inspection, consisting of an Optical Time Domain Reflectometer (OTDR) and Upstream Signal Analyzer, enables carriers to test outdoor fiber-optics lines while in service, preserving network uptime and providing significant OPEX and CAPEX savings.
This performance and feature integration enables carriers to provide advanced triple-play video-on-demand, high-speed Internet access and Voice-over-IP services to residential and business customers. Transitioning from EPON to 10G-EPON allows carriers to connect up to 10 times more subscribers per Optical Distribution Network (ODN), reducing OPEX and CAPEX per subscriber. PMC’s 10G-EPON solutions are interoperable with deployed EPON equipment, allowing carriers to gradually upgrade their networks and deploy 10G-EPON ONUs alongside EPON ONUs.
PMC’s ONU devices feature the industry’s most advanced integration to reduce system cost and power. Integrated synchronization functions enable backhauling of mobile networks over 10G-EPON, eliminating the need for external circuitry. Integrated power-saving modes reduce ONU power consumption by more than 50 percent, enabling energy-efficient networks.
“Carriers continue to seek ways to meet the demand for enhanced triple-play services and increased bandwidth, and 10G-EPON provides the answer with high reliability and low operational expenses,” said Ofer Bar-Or, vice president and general manager of PMC’s Fiber to the Home Division. “As the market leader, PMC is paving the way for higher bandwidth networks at low power and high QoS. Our highly integrated SoCs allow easy migration from EPON and GPON to 10G-EPON.”
PMC’s 10G-EPON solution complies with IEEE 802.3av and China carrier specifications and is targeted at Fiber-To-The-Home (FTTH), Fiber-To-The-Curb (FTTC) and Fiber-To-The-Building (FTTB) applications. All devices feature PMC’s field-proven GigaPASS™ architecture that achieves up to 10 gigabit data rates, and is already deployed in more than 20 million PON devices worldwide.
10G-EPON ONU key features
PMC’s PAS9000 family includes the PAS9301 asymmetric ONU and the PAS9401 asymmetric and symmetric ONU. The devices include a 10G-EPON MAC, SERDES, powerful embedded controller and GigaPASS bridge for advanced classification, queuing and filtering (see figure 1). An integrated programmable networking engine provides enhanced Quality of Service (QoS) that complies with China Telecom specification version 3.0, including IPv6 protocol support.
PMC’s scalable User Network Interface is configurable to up to four GbE interfaces, up to four 2.5Gb/s interfaces, or to a 10 Gb/s interface for Single Family Unit (see figure 2) or Multiple Dwelling Unit (see figure 3) applications. The devices include mobile-backhaul-over-EPON support with integrated Synchronous Ethernet and Time of Day delivery, as well as wire-speed throughput at all packet sizes, queuing, filtering and advanced QoS, Ethernet connection to an external processor.
The solutions re-use PMC’s widely-deployed EPON software packages, including the ONU software package, which is common for EPON and 10G-EPON ONUs, to preserve OEM investment and reduce time-to-market. PMC software supports low-footprint OS and Linux, featuring a 10G EPON protocol stack and networking drivers, IEEE 802.3av OAM protocol with operator-specific stacks and integrated peripheral drivers.
10G-EPON OLT key features
PMC’s previously announced PAS8000 OLT devices integrate the most advanced fiber access capabilities on the market. An integrated traffic manager enables carriers to deliver new services to more subscribers. A complete, always-on toolkit for optical network and ONU inspection, consisting of an Optical Time Domain Reflectometer (OTDR) and Upstream Signal Analyzer, enables carriers to test outdoor fiber-optics lines while in service, preserving network uptime and providing significant OPEX and CAPEX savings.
Touchstone Semiconductor intros TS3002, a 1µA, 1V, easy to use timer IC
MILPITAS, USA: Touchstone Semiconductor, a developer of high-performance analog integrated circuit solutions, announced the new TS3002 silicon timer. The TS3002 uses only 1µA supply current, 15 times less than its closest competitor. The TS3002 is the only timer IC that operates from supply voltages down to 1V, saving even more power.
The TS3002 is simple to program, and accurate. The timer frequency is set with just one resistor and one capacitor. Frequency out period drift is a very low 0.044 percent/°C. The TS3002 is available in the space saving TDFN-8 package.
Key specifications:
* Ultra low supply current: 1µA at 25kHz.
* Supply voltage operation: 0.9V to 1.8V.
* FOUT period drift: 0.044 percent/°C.
* PWMOUT duty cycle range: 12 percent to 90 percent.
* Single resistor and capacitor set output frequency.
The TS3002 is in stock and ready to ship. Pricing starts at $0.90 each in 1,000 piece quantities. The product is in stock and available from Touchstone’s worldwide distributor Future Electronics.
The TS3002 is simple to program, and accurate. The timer frequency is set with just one resistor and one capacitor. Frequency out period drift is a very low 0.044 percent/°C. The TS3002 is available in the space saving TDFN-8 package.
Key specifications:
* Ultra low supply current: 1µA at 25kHz.
* Supply voltage operation: 0.9V to 1.8V.
* FOUT period drift: 0.044 percent/°C.
* PWMOUT duty cycle range: 12 percent to 90 percent.
* Single resistor and capacitor set output frequency.
The TS3002 is in stock and ready to ship. Pricing starts at $0.90 each in 1,000 piece quantities. The product is in stock and available from Touchstone’s worldwide distributor Future Electronics.
Enpirion unveils DC-DC PowerSoC powered customer designs
embedded world 2012, NUREMBERG, GERMANY: Enpirion, the leading innovator of the industry’s highest density point-of-load DC-DC converters, unveiled 17 designs wins at embedded world 2012. Attendees viewed a wide range of leading-edge high density powered products – from premier designers and manufacturers of embedded, industrial, enterprise, telecom and storage solutions– within Enpirion’s “Our Power and Your Innovation” Customer Showcase.
“We are pleased to present such an impressive range of Enpirion-powered products from our customers,” said Mark Cieri, director of marketing and business development of Enpirion. “Our customers clearly value Enpirion’s ability to deliver optimized power management solutions in a significantly smaller footprint with the fastest speed to design completion.”
Customers that provided a broad range of leading-edge embedded, industrial, enterprise, telecom and storage products for Enpirion’s Customer Showcase include:
Adlink Technology: 6U compact PCI Intel Core i7 Universal blade and mini-size COM Express module with Intel Atom processor.
Advantech: RTM-5000 SAS board and 40G module for networking/telecom applications.
ARRI: Alexa digital cinema camera.
Concurrent: TP A40/30x low-power Intel Atom processor single board computer in 3U form factor for industrial, transportation, defense, telemetry and medical.
Hectronic: H6059 Qseven 70x70 mm module with AMD Embedded G-series APU processor for powerful graphics and general computing used in ultra-mobile embedded PC products.
Hilscher: NIC 50-RE real time Ethernet gateways.
iAD: Multi utility communication (MUC) module for smart metering and remote terminal unit (RTU) used in industrial monitoring.
Intel: IVY bridge-based Bull Island small form factor, pluggable single board computer module architecture and a mini-ITX development board with 1-N450 Intel Atom CPU embedded starter kit.
Kontron: VX 6060 single board computer VPX dual Intel Core i7 computing node for rugged embedded applications.
Lancom Systems: Dual radio access point with high speed 802.11n WLAN.
OCZ Technology: Z-drive R4 enterprise PCI Express SSD with 3.2 terabytes, 500K IOPS.
Stiled: Star PCB with integrated LED driver for commercial and industrial applications.
Swissbit: F-200 CFast SSD module for embedded and industrial markets.
“We are pleased to present such an impressive range of Enpirion-powered products from our customers,” said Mark Cieri, director of marketing and business development of Enpirion. “Our customers clearly value Enpirion’s ability to deliver optimized power management solutions in a significantly smaller footprint with the fastest speed to design completion.”
Customers that provided a broad range of leading-edge embedded, industrial, enterprise, telecom and storage products for Enpirion’s Customer Showcase include:
Adlink Technology: 6U compact PCI Intel Core i7 Universal blade and mini-size COM Express module with Intel Atom processor.
Advantech: RTM-5000 SAS board and 40G module for networking/telecom applications.
ARRI: Alexa digital cinema camera.
Concurrent: TP A40/30x low-power Intel Atom processor single board computer in 3U form factor for industrial, transportation, defense, telemetry and medical.
Hectronic: H6059 Qseven 70x70 mm module with AMD Embedded G-series APU processor for powerful graphics and general computing used in ultra-mobile embedded PC products.
Hilscher: NIC 50-RE real time Ethernet gateways.
iAD: Multi utility communication (MUC) module for smart metering and remote terminal unit (RTU) used in industrial monitoring.
Intel: IVY bridge-based Bull Island small form factor, pluggable single board computer module architecture and a mini-ITX development board with 1-N450 Intel Atom CPU embedded starter kit.
Kontron: VX 6060 single board computer VPX dual Intel Core i7 computing node for rugged embedded applications.
Lancom Systems: Dual radio access point with high speed 802.11n WLAN.
OCZ Technology: Z-drive R4 enterprise PCI Express SSD with 3.2 terabytes, 500K IOPS.
Stiled: Star PCB with integrated LED driver for commercial and industrial applications.
Swissbit: F-200 CFast SSD module for embedded and industrial markets.
LSI sampling industry's first 28nm SoC to accelerate delivery of higher-capacity HDDs
MILPITAS, USA: LSI Corp. is sampling the industry's first 28nm system-on-a-chip (SoC) for the desktop and mobile HDD market segments. The transition to 28nm SoC technology provides a cost-effective way to increase the amount of data that can be stored on a hard drive by enabling higher areal density and yield through superior signal-to-noise ratio performance.
"The explosion of digital content driven by rich media such as high-definition video and photography is challenging HDD manufacturers to deliver higher-capacity, more energy-efficient drives," said Phil Brace, senior VP and GM, Storage Peripherals Division, LSI. "By being first to sample 28nm SoC technology, we're offering HDD manufacturers a low-risk, time-to-market advantage in meeting next-generation HDD capacity points while staying within the power envelope."
An SoC is an integrated circuit that incorporates core components of an HDD electronic system into a single chip. LSI TrueStore SoCs are designed to simplify disk drive development, improve reliability and reduce power consumption while lowering drive costs for HDD manufacturers.
A critical piece of intelligence integrated into the new 28nm SoC is the LSI TrueStore RC5100, a 28nm read channel featuring third-generation LSI low-density parity check (LDPC) iterative decoding architecture. The RC5100 builds upon the success of the LDPC architecture of its 40nm predecessor to create a seamless roadmap of significant areal density increases for HDD OEMs.
The LSI TrueStore family of hard disk, solid-state disk and tape devices includes highly integrated SoCs, read channels, preamplifiers, serial PHYs and hard disk drive controller IP. By offering a broad portfolio of integrated SoC solutions, LSI enables its customers to address all segments of the storage market, from mission-critical enterprise applications and high-capacity desktop PCs to low-power laptops and tape archive solutions.
"The explosion of digital content driven by rich media such as high-definition video and photography is challenging HDD manufacturers to deliver higher-capacity, more energy-efficient drives," said Phil Brace, senior VP and GM, Storage Peripherals Division, LSI. "By being first to sample 28nm SoC technology, we're offering HDD manufacturers a low-risk, time-to-market advantage in meeting next-generation HDD capacity points while staying within the power envelope."
An SoC is an integrated circuit that incorporates core components of an HDD electronic system into a single chip. LSI TrueStore SoCs are designed to simplify disk drive development, improve reliability and reduce power consumption while lowering drive costs for HDD manufacturers.
A critical piece of intelligence integrated into the new 28nm SoC is the LSI TrueStore RC5100, a 28nm read channel featuring third-generation LSI low-density parity check (LDPC) iterative decoding architecture. The RC5100 builds upon the success of the LDPC architecture of its 40nm predecessor to create a seamless roadmap of significant areal density increases for HDD OEMs.
The LSI TrueStore family of hard disk, solid-state disk and tape devices includes highly integrated SoCs, read channels, preamplifiers, serial PHYs and hard disk drive controller IP. By offering a broad portfolio of integrated SoC solutions, LSI enables its customers to address all segments of the storage market, from mission-critical enterprise applications and high-capacity desktop PCs to low-power laptops and tape archive solutions.
Freescale tower system reaches milestone of 50 available modules
AUSTIN, USA: Three years after introducing the first Tower System module, Freescale Semiconductor has achieved a milestone of more than 50 unique modules for its popular development platform. Freescale recently added 10 new modules to the platform, with offerings that include 8-bit, 16-bit and 32-bit devices, along with peripheral modules that enable touch sensing, expanded memory and motor control.
With these additions, the Freescale Tower System has become one of the most extensive modular development platforms in the industry. Spanning a number of markets and applications, the Freescale Tower System equips embedded designers with the tools they need to bring their designs to market more quickly and easily. Available modules span the Freescale microcontroller (MCU), microprocessor (MPU) and digital signal controller (DSCs) portfolios, along with a number of add-on peripheral modules designed to bring added features and functionality to life.
“Our goal with the Tower System is to provide affordable choices that let designers customize their development tool according to their design needs,” said John Weil, Segment Marketing & Operations manager for Freescale’s Industrial Microcontroller & Multi-market business. “Our customers can scale up and down and make adjustments as needed, without retooling or having to invest heavily.”
In addition to giving designers the flexibility of tool reuse across designs, Freescale invites independent developers and partners to create compatible modules for the Tower System, further expanding the available options for embedded designers. “These new modules provide excellent opportunities for developers to bring innovative solutions to the embedded space and for Freescale to penetrate new markets, not to mention the endless design possibilities it gives our customers,” Weil said. “It’s truly a win-win for Freescale and our customers.”
With these additions, the Freescale Tower System has become one of the most extensive modular development platforms in the industry. Spanning a number of markets and applications, the Freescale Tower System equips embedded designers with the tools they need to bring their designs to market more quickly and easily. Available modules span the Freescale microcontroller (MCU), microprocessor (MPU) and digital signal controller (DSCs) portfolios, along with a number of add-on peripheral modules designed to bring added features and functionality to life.
“Our goal with the Tower System is to provide affordable choices that let designers customize their development tool according to their design needs,” said John Weil, Segment Marketing & Operations manager for Freescale’s Industrial Microcontroller & Multi-market business. “Our customers can scale up and down and make adjustments as needed, without retooling or having to invest heavily.”
In addition to giving designers the flexibility of tool reuse across designs, Freescale invites independent developers and partners to create compatible modules for the Tower System, further expanding the available options for embedded designers. “These new modules provide excellent opportunities for developers to bring innovative solutions to the embedded space and for Freescale to penetrate new markets, not to mention the endless design possibilities it gives our customers,” Weil said. “It’s truly a win-win for Freescale and our customers.”
PMC marks another major fiber access milestone with 20 million ONU devices deployed
SUNNYVALE, USA: PMC-Sierra Inc. announced that its fiber access ONU SoCs are now deployed in more than twenty million EPON, GPON and 10G-EPON Optical Network Units (ONUs). This significant industry milestone demonstrates that fiber to the home and business (FTTx) is the technology of choice for delivering ultra-broadband services. FTTx deployment has outpaced DSL broadband access in many Asia Pacific countries, including Japan, Korea and China. In other regions worldwide, such as Russia, the Middle East, Mexico, Brazil, and the rest of Asia, EPON and GPON penetration continues to grow, according to Ovum.
“FTTx will continue to be the growth story in broadband, with strong shipments as the major market leaders, such as China, continue to move to fiber infrastructure,” said Julie Kunstler, principal analyst, Communications Components, Ovum. “Chip vendors, like PMC, that continue to innovate with integrated and advanced features, along with support for 10G, will continue to see success as FTTx broadens its expansion into low-cost markets, including Eastern Europe and South/Central America.”
“This important industry milestone demonstrates that fiber access is the carriers’ broadband technology of choice to deliver the advanced services demanded by their subscribers,” said Ofer Bar-Or, VP and GM of PMC’s Fiber to the Home Division. “With the largest install base worldwide, PMC has the advantage of leveraging our extensive technology and product base to provide interoperable end-to-end solutions in all fiber access markets.”
“FTTx will continue to be the growth story in broadband, with strong shipments as the major market leaders, such as China, continue to move to fiber infrastructure,” said Julie Kunstler, principal analyst, Communications Components, Ovum. “Chip vendors, like PMC, that continue to innovate with integrated and advanced features, along with support for 10G, will continue to see success as FTTx broadens its expansion into low-cost markets, including Eastern Europe and South/Central America.”
“This important industry milestone demonstrates that fiber access is the carriers’ broadband technology of choice to deliver the advanced services demanded by their subscribers,” said Ofer Bar-Or, VP and GM of PMC’s Fiber to the Home Division. “With the largest install base worldwide, PMC has the advantage of leveraging our extensive technology and product base to provide interoperable end-to-end solutions in all fiber access markets.”
Synopsys intros industry's first 28-nm multi-gear MIPI Alliance M-PHY IP supporting six standards for mobile apps
MOBILE WORLD CONGRESS 2012, BARCELONA, SPAIN: Synopsys Inc. announced availability of a new DesignWare MIPI M-PHY IP solution supporting multiple speed gears and a broad range of high-speed interfaces for mobile applications.
Based on the industry's first silicon-proven DesignWare MIPI M-PHY IP introduced by Synopsys in 2010, the new MIPI M-PHY IP is the first 28-nanometer (nm) multi-gear solution that supports six different inter-chip interconnect protocols including the JEDEC Universal Flash Storage (UFS), the USB SuperSpeed Inter-Chip (SSIC), and the MIPI Alliance's Low Latency Interface (LLI), DigRF v4 and future CSI-3 and DSI-2 interfaces.
By providing application-oriented M-PHY IP that runs at multiple speeds and is interoperable with multiple protocols, Synopsys enables design teams to "future-proof" their designs while reducing the risk and cost of integrating MIPI interfaces into basebands, application processors and mobile ICs.
The 28-nm DesignWare MIPI M-PHY IP offers Type-I and Type-II low-speed implementations to support different application requirements. With support for high-speed GEAR1, GEAR2 and GEAR3, ranging from 1.248Gbps to 5.8Gbps, this scalable solution can meet ever-increasing data rate requirements, enabling reuse of proven IP in next-generation devices. Using a variety of high-speed and low-speed burst modes and power management modes, including idle, sleep and hibernate with quick entry and exit capability, Synopsys' DesignWare MIPI M-PHY IP can be optimized to achieve required data rates while meeting the stringent power and area requirements of mobile SoCs.
"Synopsys is regarded as a technology leader in the development of MIPI IP, and we are continuing our successful collaboration to deliver the future-proof DesignWare MIPI M-PHY IP with the Tektronix M-PHY test suite," said Mike Rizzo, technology solutions manager at Tektronix. "Our M-PHY test suite includes the popular DSA70000 Series Oscilloscope and allows M-PHY users to test the M-PHY electrical functionality and integrate high-speed MIPI interfaces into mobile chipsets."
"As a longtime contributor to the MIPI working groups, Synopsys continues to help drive MIPI specifications to build a robust mobile ecosystem," said Joel Huloux, president and chairman, MIPI Alliance. "The new DesignWare MIPI M-PHY IP will likely prove useful to designers and expand their interface choices."
The DesignWare MIPI M-PHY IP is compliant with the MIPI Alliance M-PHY v1.0 specification. By working closely with the MIPI Alliance to develop its specifications, Synopsys targets its IP to comply with future MIPI M-PHY specification releases. Synopsys DesignWare MIPI M-PHY IP supports High Speed GEAR1, GEAR2 and GEAR3 rates A/B along with Type-I and Type-II low-speed capabilities. The DesignWare MIPI M-PHY's modular architecture allows implementation of a variety of transmitter and receiver lanes to meet a broad range of system requirements and all modes outlined in the protocol specification.
A sophisticated clock recovery mechanism and power efficient clock circuitry are designed to maintain the integrity of the clocks and signals required to meet strict timing requirements. The DesignWare MIPI M-PHY supports large and small amplitudes, slew rate control and dithering functionality for optimized electromagnetic interference (EMI) performance.
"With an increasing number of devices integrating mobile functionality, IP solutions supporting mobile standards must be capable of meeting the power and performance targets of multiple end applications," said John Koeter, VP of marketing for IP and systems at Synopsys. "With support for multiple speed gears and interface protocols, the 28-nanometer DesignWare MIPI M-PHY gives designers a high-quality IP solution that can reduce the risk of integrating MIPI interfaces into their SoCs today with the scalability needed to address faster data rates in the future."
The multi-gear DesignWare MIPI M-PHY IP in the 28-nm process node will be available for early adopters in calendar Q2, 2012.
Based on the industry's first silicon-proven DesignWare MIPI M-PHY IP introduced by Synopsys in 2010, the new MIPI M-PHY IP is the first 28-nanometer (nm) multi-gear solution that supports six different inter-chip interconnect protocols including the JEDEC Universal Flash Storage (UFS), the USB SuperSpeed Inter-Chip (SSIC), and the MIPI Alliance's Low Latency Interface (LLI), DigRF v4 and future CSI-3 and DSI-2 interfaces.
By providing application-oriented M-PHY IP that runs at multiple speeds and is interoperable with multiple protocols, Synopsys enables design teams to "future-proof" their designs while reducing the risk and cost of integrating MIPI interfaces into basebands, application processors and mobile ICs.
The 28-nm DesignWare MIPI M-PHY IP offers Type-I and Type-II low-speed implementations to support different application requirements. With support for high-speed GEAR1, GEAR2 and GEAR3, ranging from 1.248Gbps to 5.8Gbps, this scalable solution can meet ever-increasing data rate requirements, enabling reuse of proven IP in next-generation devices. Using a variety of high-speed and low-speed burst modes and power management modes, including idle, sleep and hibernate with quick entry and exit capability, Synopsys' DesignWare MIPI M-PHY IP can be optimized to achieve required data rates while meeting the stringent power and area requirements of mobile SoCs.
"Synopsys is regarded as a technology leader in the development of MIPI IP, and we are continuing our successful collaboration to deliver the future-proof DesignWare MIPI M-PHY IP with the Tektronix M-PHY test suite," said Mike Rizzo, technology solutions manager at Tektronix. "Our M-PHY test suite includes the popular DSA70000 Series Oscilloscope and allows M-PHY users to test the M-PHY electrical functionality and integrate high-speed MIPI interfaces into mobile chipsets."
"As a longtime contributor to the MIPI working groups, Synopsys continues to help drive MIPI specifications to build a robust mobile ecosystem," said Joel Huloux, president and chairman, MIPI Alliance. "The new DesignWare MIPI M-PHY IP will likely prove useful to designers and expand their interface choices."
The DesignWare MIPI M-PHY IP is compliant with the MIPI Alliance M-PHY v1.0 specification. By working closely with the MIPI Alliance to develop its specifications, Synopsys targets its IP to comply with future MIPI M-PHY specification releases. Synopsys DesignWare MIPI M-PHY IP supports High Speed GEAR1, GEAR2 and GEAR3 rates A/B along with Type-I and Type-II low-speed capabilities. The DesignWare MIPI M-PHY's modular architecture allows implementation of a variety of transmitter and receiver lanes to meet a broad range of system requirements and all modes outlined in the protocol specification.
A sophisticated clock recovery mechanism and power efficient clock circuitry are designed to maintain the integrity of the clocks and signals required to meet strict timing requirements. The DesignWare MIPI M-PHY supports large and small amplitudes, slew rate control and dithering functionality for optimized electromagnetic interference (EMI) performance.
"With an increasing number of devices integrating mobile functionality, IP solutions supporting mobile standards must be capable of meeting the power and performance targets of multiple end applications," said John Koeter, VP of marketing for IP and systems at Synopsys. "With support for multiple speed gears and interface protocols, the 28-nanometer DesignWare MIPI M-PHY gives designers a high-quality IP solution that can reduce the risk of integrating MIPI interfaces into their SoCs today with the scalability needed to address faster data rates in the future."
The multi-gear DesignWare MIPI M-PHY IP in the 28-nm process node will be available for early adopters in calendar Q2, 2012.
3D packaging is coming; Are you ready?
PHOENIX, USA: As ICs become more complicated and push the technology roadmap, system performance and chip-to-chip interaction is becoming a limiting factor. The result is that test and packaging issues are coming to the forefront at semiconductor manufacturers around the world. 2.5D and 3D packages offer great advantages, yet there are still technical issues to overcome.
3-D technology is in the early adopter phase, and server memory, routers, base stations, and switching equipment will be the first markets to use 3-D packaging for increased performance and functionality. Growth will explode from 2015 - 2016, when 3D is expected to move to smartphones.
Jim Feldhan, President of Semico Research, will deliver the keynote address at the BiTS 2012 conference on March 5, 2012. Feldhan will present the Semico roadmap to 3D packaging, the end products that will adopt 3D first and how that adoption will evolve over time. He will also provide a brief economic overview along with Semico's Semiconductor Forecast.
The 13th annual BiTS (Burn-in & Test Strategies Workshop) 2012 will take place March 4-7 in Mesa, Arizona.
3-D technology is in the early adopter phase, and server memory, routers, base stations, and switching equipment will be the first markets to use 3-D packaging for increased performance and functionality. Growth will explode from 2015 - 2016, when 3D is expected to move to smartphones.
Jim Feldhan, President of Semico Research, will deliver the keynote address at the BiTS 2012 conference on March 5, 2012. Feldhan will present the Semico roadmap to 3D packaging, the end products that will adopt 3D first and how that adoption will evolve over time. He will also provide a brief economic overview along with Semico's Semiconductor Forecast.
The 13th annual BiTS (Burn-in & Test Strategies Workshop) 2012 will take place March 4-7 in Mesa, Arizona.
Synopsys and Arteris develop IP solution to reduce mobile phone memory costs
MOBILE WORLD CONGRESS 2012, BARCELONA, SPAIN: Synopsys Inc. and Arteris Inc., the inventor and leading supplier of network-on-chip (NoC) interconnect IP solutions, today announced their joint analog and digital IP solutions to implement the MIPI Alliance Low Latency Interface (LLI) 1.0 specification.
The combined offerings deliver high performance with low power consumption in a compact silicon footprint while providing interoperability with the MIPI standard. By providing a collaborative solution that adheres to the LLI specification, Arteris and Synopsys give system-on-chip (SoC) designers access to pre-tested and pre-optimized analog and digital MIPI-based IP that can reduce design cost and accelerate time to market.
The MIPI Alliance LLI specification enables high-bandwidth, low-latency inter-chip communication between two chips using a minimal number of SoC pins. The LLI specification utilizes the MIPI M-PHY physical layer, which also supports five other protocols including USB SSIC, JEDEC UFS, MIPI CSI-3, DSI-2 and DigRF v4. The round-trip latency of the LLI inter-chip connection is fast enough for a mobile phone modem to share an application processor's memory while maintaining enough read throughput and low latency for cache refills.
This enables phone manufacturers to remove the modem's dedicated RAM chip from the phone's bill of materials, MIPI Alliance estimates saving approximately $2 in cost per phone as well as significant printed circuit board (PCB) space that can be used for additional features or to create smaller or thinner devices.
"As active MIPI contributors, Synopsys and Arteris are aiding in the adoption of the MIPI M-PHY and MIPI Low Latency Interface," said Joel Huloux, chairman of the board of MIPI Alliance. "The early integration and availability of the Arteris and Synopsys solution helps speed time to market for MIPI LLI adopters."
The joint solution consists of Arteris' Flex LLI MIPI LLI digital controller IP and Synopsys' DesignWare MIPI M-PHY IP. A team of Arteris and Synopsys engineers, formed to facilitate verification and testing of the joint solution, validated its functionality and interoperability.
"The Synopsys-Arteris MIPI LLI joint solution is the easiest and lowest risk path to adopting MIPI LLI," said Charlie Janac, president and CEO of Arteris. "Arteris and Synopsys have worked together to offer joint customers the most integrated LLI solution with the fastest time to market and least design risk."
"The new Synopsys-Arteris MIPI LLI solution eases adoption of this innovative low latency chip-to-chip interface by providing high-quality IP that has been jointly validated and is ready for customers to rapidly integrate into their SoCs," said John Koeter, VP of marketing for IP and systems at Synopsys. "With the increasing demand to incorporate display, camera and mobile broadband connectivity into consumer devices, SoC designers must rely on proven IP that is verified compliant with MIPI standards such as DSI, CSI-2, D-PHY, DigRF 3G/v4 and M-PHY."
Arteris and Synopsys' joint MIPI LLI IP solution is available today for select early access customers to start their design. System hardware implementing the joint solution will also be available in the second half of 2012.
The combined offerings deliver high performance with low power consumption in a compact silicon footprint while providing interoperability with the MIPI standard. By providing a collaborative solution that adheres to the LLI specification, Arteris and Synopsys give system-on-chip (SoC) designers access to pre-tested and pre-optimized analog and digital MIPI-based IP that can reduce design cost and accelerate time to market.
The MIPI Alliance LLI specification enables high-bandwidth, low-latency inter-chip communication between two chips using a minimal number of SoC pins. The LLI specification utilizes the MIPI M-PHY physical layer, which also supports five other protocols including USB SSIC, JEDEC UFS, MIPI CSI-3, DSI-2 and DigRF v4. The round-trip latency of the LLI inter-chip connection is fast enough for a mobile phone modem to share an application processor's memory while maintaining enough read throughput and low latency for cache refills.
This enables phone manufacturers to remove the modem's dedicated RAM chip from the phone's bill of materials, MIPI Alliance estimates saving approximately $2 in cost per phone as well as significant printed circuit board (PCB) space that can be used for additional features or to create smaller or thinner devices.
"As active MIPI contributors, Synopsys and Arteris are aiding in the adoption of the MIPI M-PHY and MIPI Low Latency Interface," said Joel Huloux, chairman of the board of MIPI Alliance. "The early integration and availability of the Arteris and Synopsys solution helps speed time to market for MIPI LLI adopters."
The joint solution consists of Arteris' Flex LLI MIPI LLI digital controller IP and Synopsys' DesignWare MIPI M-PHY IP. A team of Arteris and Synopsys engineers, formed to facilitate verification and testing of the joint solution, validated its functionality and interoperability.
"The Synopsys-Arteris MIPI LLI joint solution is the easiest and lowest risk path to adopting MIPI LLI," said Charlie Janac, president and CEO of Arteris. "Arteris and Synopsys have worked together to offer joint customers the most integrated LLI solution with the fastest time to market and least design risk."
"The new Synopsys-Arteris MIPI LLI solution eases adoption of this innovative low latency chip-to-chip interface by providing high-quality IP that has been jointly validated and is ready for customers to rapidly integrate into their SoCs," said John Koeter, VP of marketing for IP and systems at Synopsys. "With the increasing demand to incorporate display, camera and mobile broadband connectivity into consumer devices, SoC designers must rely on proven IP that is verified compliant with MIPI standards such as DSI, CSI-2, D-PHY, DigRF 3G/v4 and M-PHY."
Arteris and Synopsys' joint MIPI LLI IP solution is available today for select early access customers to start their design. System hardware implementing the joint solution will also be available in the second half of 2012.
NXP and OpenWays bring mobile NFC keys to hotel chains
SINGAPORE: NXP Semiconductors N.V. announced that its identification technology enables a new enhanced version of the popular OpenWays mobile hotel key service. OpenWays Mobile Key accelerates the check-in process allowing the guests to bypass the check-in, receive their room number and use their mobile phone as the hotel room key.
Through its work with NXP OpenWays can now include NFC technology into their service, enabling hotel chains to provide their guests with an ultramodern, future proof access solution. The OpenWays Mobile Key DUAL with Pure NFC will be incorporated into the Mobile Key service offered by major hotel chains starting with Nordic Choice Hotels in Scandinavia.
OpenWays, a leading provider of mobile key solutions, recognized the convenience of NFC and selected NXP for its superior end-to-end solutions expertise to help create the Mobile Key DUAL with Pure NFC service hotel key system. Thesmart phones will securely transmit hotel key credentials to the room doorlock via NFC. The OpenWays doorlock utilizes the flexible NXP PN512 NFC transceiver IC and software stack while the OpenWays application is based on NXP’s open source NFC operating stack integration for Symbian, Android and other operating systems.
NXP helped to add NFC support with optimized antennas to the previously introduced CAC (Crypto Acoustic Credential) technology within the power efficient and compact OpenWays reader. This brings OpenWays into the unique position to operate across all phones, carriers and lock systems today. The result is a simple, reliable, secure and intuitive NFC key service that is cost-effective to deploy in new hotel development and hotel upgrades. The OpenWays NFC reader is available in form factors allowing both an upgrade to existing hotel locks and in a OEM version for embedding into new locks.
At the Mobile World Congress Show 2012 (Barcelona, Spain, Feb 27-Mar 1, Hall 1, booth 1F14), NXP and OpenWays will demonstrate the Mobile Key services utilizing NXP’s leading NFC technology.
“We selected NXP because of its NFC and contactless leadership position as well as its expertise in embedded mobile security. As top hotel chains deploy mobile front desk bypass services, they demand solutions that are truly deployable today while being future proof. As NFC phones continue to appear on the market it was logical to add NFC support to our Mobile Key offering while remaining fully interoperable and ubiquitous,” said Pascal Metivier, founder and CEO of OpenWays.
“Having on our side a technology provider with long-standing, end-to-end NFC and security expertize is very important to us. NXP’s position as the co-founder of NFC and potential to collaborate and bring new secure NFC innovations to market with short design in cycles made them the ideal partner.”
“New innovative services such as OpenWays Mobile Key are exactly what we envisioned as the value add of NFC enabled mobile solutions,” said Henri Ardevol, VP and GM, secure transactions, NXP Semiconductors. “We are happy to contribute our expertise across the contactless and security ecosystems as well as our extensive NFC domain knowledge to OpenWays.”
NFC is a market proven, standardized technology co-invented by NXP and Sony in 2002. NXP is at the center of this ecosystem, fueling its development by partnering with almost all major handset manufacturers, mobile OS providers and applications developers. NXP is the No1 supplier to the Identification market globally, and leverages its leadership in contactless and security technologies to provide complete Mobile Transactions solutions: NFC controllers, Secure Elements in all form factors, NFC tags and infrastructure reader ICs. Currently OEMs have selected NXP’s NFC technology for more than 130 mobile devices.
* OpenWays features a dematerialized key transmitted to users via mobile phones and ultimately to an OpenWays readers via a Crypto Acoustic Credential (CAC) encrypted acoustic tone or NFC to very securely deliver a key to the right user anywhere in the world. The OpenWays solution involves 26 patent filings and patents.
* The OpenWays doorlock reader uses NXP’s RFID / NFC transceiver PN512.
* The NXP PN512 is used to power industrial RFID / NFC application, NFC enabled consumer devices and POS terminals worldwide.
* NXP's open-source NFC software is incorporated in Android versions 2.3.3 and 4.0.
Through its work with NXP OpenWays can now include NFC technology into their service, enabling hotel chains to provide their guests with an ultramodern, future proof access solution. The OpenWays Mobile Key DUAL with Pure NFC will be incorporated into the Mobile Key service offered by major hotel chains starting with Nordic Choice Hotels in Scandinavia.
OpenWays, a leading provider of mobile key solutions, recognized the convenience of NFC and selected NXP for its superior end-to-end solutions expertise to help create the Mobile Key DUAL with Pure NFC service hotel key system. Thesmart phones will securely transmit hotel key credentials to the room doorlock via NFC. The OpenWays doorlock utilizes the flexible NXP PN512 NFC transceiver IC and software stack while the OpenWays application is based on NXP’s open source NFC operating stack integration for Symbian, Android and other operating systems.
NXP helped to add NFC support with optimized antennas to the previously introduced CAC (Crypto Acoustic Credential) technology within the power efficient and compact OpenWays reader. This brings OpenWays into the unique position to operate across all phones, carriers and lock systems today. The result is a simple, reliable, secure and intuitive NFC key service that is cost-effective to deploy in new hotel development and hotel upgrades. The OpenWays NFC reader is available in form factors allowing both an upgrade to existing hotel locks and in a OEM version for embedding into new locks.
At the Mobile World Congress Show 2012 (Barcelona, Spain, Feb 27-Mar 1, Hall 1, booth 1F14), NXP and OpenWays will demonstrate the Mobile Key services utilizing NXP’s leading NFC technology.
“We selected NXP because of its NFC and contactless leadership position as well as its expertise in embedded mobile security. As top hotel chains deploy mobile front desk bypass services, they demand solutions that are truly deployable today while being future proof. As NFC phones continue to appear on the market it was logical to add NFC support to our Mobile Key offering while remaining fully interoperable and ubiquitous,” said Pascal Metivier, founder and CEO of OpenWays.
“Having on our side a technology provider with long-standing, end-to-end NFC and security expertize is very important to us. NXP’s position as the co-founder of NFC and potential to collaborate and bring new secure NFC innovations to market with short design in cycles made them the ideal partner.”
“New innovative services such as OpenWays Mobile Key are exactly what we envisioned as the value add of NFC enabled mobile solutions,” said Henri Ardevol, VP and GM, secure transactions, NXP Semiconductors. “We are happy to contribute our expertise across the contactless and security ecosystems as well as our extensive NFC domain knowledge to OpenWays.”
NFC is a market proven, standardized technology co-invented by NXP and Sony in 2002. NXP is at the center of this ecosystem, fueling its development by partnering with almost all major handset manufacturers, mobile OS providers and applications developers. NXP is the No1 supplier to the Identification market globally, and leverages its leadership in contactless and security technologies to provide complete Mobile Transactions solutions: NFC controllers, Secure Elements in all form factors, NFC tags and infrastructure reader ICs. Currently OEMs have selected NXP’s NFC technology for more than 130 mobile devices.
* OpenWays features a dematerialized key transmitted to users via mobile phones and ultimately to an OpenWays readers via a Crypto Acoustic Credential (CAC) encrypted acoustic tone or NFC to very securely deliver a key to the right user anywhere in the world. The OpenWays solution involves 26 patent filings and patents.
* The OpenWays doorlock reader uses NXP’s RFID / NFC transceiver PN512.
* The NXP PN512 is used to power industrial RFID / NFC application, NFC enabled consumer devices and POS terminals worldwide.
* NXP's open-source NFC software is incorporated in Android versions 2.3.3 and 4.0.
WiSpry unveils 'One World, One Radio' vision of mobile future
Mobile World Congress 2012, BARCELONA, SPAIN: WiSpry Inc. unveiled its ‘One World, One Radio’ vision of the mobile future.
Credited with delivering the industry’s first mass-produced, single-chip antenna impedance tuning solution for smartphones, WiSpry has officially opened the door to a more realizable 4G-powered world in which super-fast, ultrathin and highly adaptable devices perform multiple, simultaneous functions without limitations from frequency bands or radio standards. WiSpry is demonstrating its current technology in the MIPI Alliance booth (Hall 7, Stand 7H11) at the 2012 GSMA Mobile World Congress.
Thanks to WiSpry’s pioneering advances in the field of tunable RF technology, its ultra-high performance, MEMS-based products are ready to revolutionize the world of mobile communications by supporting the integration of low-loss, dynamically tunable RF filtering, duplexing, matching and interference suppression components into highly integrated wireless system-on-a-chip solutions. This opens a CMOS-functional integration path that will make cellular radio front-ends vastly more capable.
This path also reduces overall cost and the number of necessary components in a handset – while allowing the radio front-end to be programmed to work in any frequency band and with any radio standard using the same set of hardware. The end result is a true “World-Phone” architecture.
At MWC, WiSpry is demonstrating the WS2018, the world’s first fully-integrated tunable RF component in mass production. This week the company also announced two new products: the WS3001, the world’s first tunable SVLTE filter for truly simultaneous voice and LTE data communications; and the WS1033, a tuner optimized for LTE applications.
Credited with delivering the industry’s first mass-produced, single-chip antenna impedance tuning solution for smartphones, WiSpry has officially opened the door to a more realizable 4G-powered world in which super-fast, ultrathin and highly adaptable devices perform multiple, simultaneous functions without limitations from frequency bands or radio standards. WiSpry is demonstrating its current technology in the MIPI Alliance booth (Hall 7, Stand 7H11) at the 2012 GSMA Mobile World Congress.
Thanks to WiSpry’s pioneering advances in the field of tunable RF technology, its ultra-high performance, MEMS-based products are ready to revolutionize the world of mobile communications by supporting the integration of low-loss, dynamically tunable RF filtering, duplexing, matching and interference suppression components into highly integrated wireless system-on-a-chip solutions. This opens a CMOS-functional integration path that will make cellular radio front-ends vastly more capable.
This path also reduces overall cost and the number of necessary components in a handset – while allowing the radio front-end to be programmed to work in any frequency band and with any radio standard using the same set of hardware. The end result is a true “World-Phone” architecture.
At MWC, WiSpry is demonstrating the WS2018, the world’s first fully-integrated tunable RF component in mass production. This week the company also announced two new products: the WS3001, the world’s first tunable SVLTE filter for truly simultaneous voice and LTE data communications; and the WS1033, a tuner optimized for LTE applications.
Skyworks enhances portfolio of antenna switch modules and LTE switch solutions
Mobile World Congress 2012, BARCELONA, SPAIN: Skyworks Solutions Inc. expanded its family of antenna switch modules (ASMs) for smartphones and tablets, offering solutions in up to 14 throw counts to meet various handset manufacturers’ layout preferences and design needs.
Skyworks is also unveiling a full suite of complementary discrete LTE transmit and receive solutions covering single pole double throw (SPDT) through single pole eight throw (SP8T) applications in a compact 2 x 2 millimeter footprint. Together, these latest devices support low cost 3G handsets, as well as high speed packet access/LTE-enabled data centric devices such as data cards and tablets – both of which require design flexibility, high performance and cost-effective architectures.
Skyworks’ comprehensive RF switch solutions are based on pHEMT and silicon technology and complement its existing world-class, gallium arsenide and silicon power amplifiers and front-end solutions.
“Skyworks is delighted to once again be offering our customers the broadest set of switch solutions to meet demanding performance requirements and design needs,” said David Stasey, VP of analog components at Skyworks. “Our ability to support multiple platforms and architectures in various process technologies demonstrates Skyworks’ technical breadth, depth and commitment to delivering best-in-class solutions.”
Skyworks’ ASMs are logic compatible with the world’s leading 3G/4G chipset providers’ interface requirements. In addition to integrated switch and logic, the devices all feature dual low-pass GSM harmonic filters. The ASMs are designed for any combination of 2G/3G multimode cellular applications.
The SKY13404-466LF is a single pole 10 throw ASM in a compact 2.6 x 3.4 mm quad flat no lead (QFN) package designed for dual and tri mode, high power band switching applications that require low insertion loss. The device features eight high linearity ports providing full flexibility for 2G, 3G and LTE handsets and data cards.
The SKY13412-487LF is a single pole 12 throw ASM in a 3.0 x 3.8 mm QFN package featuring 10 high linearity ports providing full flexibility for 2G, 3G and LTE handsets and data cards. The device includes port to port RF isolation comparisons in order to optimize signal routing in an increasingly more challenging RF signal environment.
The SKY18120-11 is a single pole nine throw ASM in an extremely compact 2.5 x 2.5 mm package, 20-pin multi-chip module. The device has three high linearity ports suitable for tri-band 3G/quad-band 2G or TD-SCDMA/2G multi-mode handsets and data cards.
Skyworks is also unveiling a full suite of complementary discrete LTE transmit and receive solutions covering single pole double throw (SPDT) through single pole eight throw (SP8T) applications in a compact 2 x 2 millimeter footprint. Together, these latest devices support low cost 3G handsets, as well as high speed packet access/LTE-enabled data centric devices such as data cards and tablets – both of which require design flexibility, high performance and cost-effective architectures.
Skyworks’ comprehensive RF switch solutions are based on pHEMT and silicon technology and complement its existing world-class, gallium arsenide and silicon power amplifiers and front-end solutions.
“Skyworks is delighted to once again be offering our customers the broadest set of switch solutions to meet demanding performance requirements and design needs,” said David Stasey, VP of analog components at Skyworks. “Our ability to support multiple platforms and architectures in various process technologies demonstrates Skyworks’ technical breadth, depth and commitment to delivering best-in-class solutions.”
Skyworks’ ASMs are logic compatible with the world’s leading 3G/4G chipset providers’ interface requirements. In addition to integrated switch and logic, the devices all feature dual low-pass GSM harmonic filters. The ASMs are designed for any combination of 2G/3G multimode cellular applications.
The SKY13404-466LF is a single pole 10 throw ASM in a compact 2.6 x 3.4 mm quad flat no lead (QFN) package designed for dual and tri mode, high power band switching applications that require low insertion loss. The device features eight high linearity ports providing full flexibility for 2G, 3G and LTE handsets and data cards.
The SKY13412-487LF is a single pole 12 throw ASM in a 3.0 x 3.8 mm QFN package featuring 10 high linearity ports providing full flexibility for 2G, 3G and LTE handsets and data cards. The device includes port to port RF isolation comparisons in order to optimize signal routing in an increasingly more challenging RF signal environment.
The SKY18120-11 is a single pole nine throw ASM in an extremely compact 2.5 x 2.5 mm package, 20-pin multi-chip module. The device has three high linearity ports suitable for tri-band 3G/quad-band 2G or TD-SCDMA/2G multi-mode handsets and data cards.
NI single-board RIO embedded devices with multifunction I/O for custom app development
Embedded World 2012, USA: National Instruments announced four new NI Single-Board RIO board-level embedded devices featuring a real-time processor, Spartan-6 field-programmable gate array (FPGA), analog and digital I/O and more built-in peripherals for custom embedded control and monitoring applications.
The new devices provide engineers with off-the-shelf FPGA and real-time processor technology through NI LabVIEW while maintaining the custom I/O often required for high-volume deployments through the option of a RIO Mezzanine Card connector. The connector provides direct access to FPGA digital input/output (DIO) lines and certain processor-specific functions for mating custom daughter cards. NI Single-Board RIO alleviates the effort of designing an entire system from scratch so designers can focus on the custom parts of their applications, such as the I/O.
With the new devices, engineers can achieve the shorter time to market of an off-the-shelf system along with the I/O customization offered by in-house designs, providing the best of both worlds. The devices also feature built-in analog I/O so engineers can take advantage of the company’s industry-leading analog expertise in addition to their application-specific circuitry. The devices’ low-cost, small form factor; built-in I/O; real-time processor; and FPGA provide an ideal platform for embedded monitoring and control applications in industries such as medical and energy.
The new devices provide engineers with off-the-shelf FPGA and real-time processor technology through NI LabVIEW while maintaining the custom I/O often required for high-volume deployments through the option of a RIO Mezzanine Card connector. The connector provides direct access to FPGA digital input/output (DIO) lines and certain processor-specific functions for mating custom daughter cards. NI Single-Board RIO alleviates the effort of designing an entire system from scratch so designers can focus on the custom parts of their applications, such as the I/O.
With the new devices, engineers can achieve the shorter time to market of an off-the-shelf system along with the I/O customization offered by in-house designs, providing the best of both worlds. The devices also feature built-in analog I/O so engineers can take advantage of the company’s industry-leading analog expertise in addition to their application-specific circuitry. The devices’ low-cost, small form factor; built-in I/O; real-time processor; and FPGA provide an ideal platform for embedded monitoring and control applications in industries such as medical and energy.
Global industry support expedites MIFARE4Mobile adoption
SINGAPORE: The MIFARE4Mobile Industry Group, which consists of leading players in the Near Field Communication (NFC) ecosystem including Ericsson, Gemalto, Giesecke & Devrient, NXP Semiconductors, Oberthur Technologies, STMicroelectronics and ViVOtech, today announced a significant milestone in the adoption of MIFARE contactless technology on mobile devices.
More than 500 public transport operators, system integrators, consultants and service providers have now downloaded the MIFARE4Mobile specifications since its release, paving the way for upcoming launches of mobile ticketing solutions.
Near Field Communication (NFC) gained widespread global acceptance in 2011 as it adds convenience and additional uses to mobile devices. NFC-enabled handsets increasingly become mainstream products for consumers while contactless applications – including payment, transit ticketing and access management – continue to grow in popularity.
The MIFARE4Mobile specifications act as glue between NFC and the MIFARE technology platform: they enable the realization and secure implementation of MIFARE-based contactless applications on mobile devices, meeting the expectations of end-users to leverage their smart phones for ticketing. The high level of interest and huge number of downloads is clearly indicating that the global industry is shifting gears in embracing this trend.
MIFARE4Mobile is a software solution for secure elements (such as embedded secure elements, SIM and micro SD) used to manage MIFARE-based services in NFC-enabled mobile phones. It covers the whole lifecycle of mobile applications from over-the-air installation to end-user interaction via the user interface. The MIFARE4Mobile Industry Group serves as the forum to anticipate the evolution of MIFARE on mobile and specifies and implements the according MIFARE4Mobile solutions.
The aim of the group is to harmonize and advance the management of MIFARE based applications built on established and proven global standards such as Global Platform. This applies to secure elements in different form factors and different mobile phone models.
More than 500 public transport operators, system integrators, consultants and service providers have now downloaded the MIFARE4Mobile specifications since its release, paving the way for upcoming launches of mobile ticketing solutions.
Near Field Communication (NFC) gained widespread global acceptance in 2011 as it adds convenience and additional uses to mobile devices. NFC-enabled handsets increasingly become mainstream products for consumers while contactless applications – including payment, transit ticketing and access management – continue to grow in popularity.
The MIFARE4Mobile specifications act as glue between NFC and the MIFARE technology platform: they enable the realization and secure implementation of MIFARE-based contactless applications on mobile devices, meeting the expectations of end-users to leverage their smart phones for ticketing. The high level of interest and huge number of downloads is clearly indicating that the global industry is shifting gears in embracing this trend.
MIFARE4Mobile is a software solution for secure elements (such as embedded secure elements, SIM and micro SD) used to manage MIFARE-based services in NFC-enabled mobile phones. It covers the whole lifecycle of mobile applications from over-the-air installation to end-user interaction via the user interface. The MIFARE4Mobile Industry Group serves as the forum to anticipate the evolution of MIFARE on mobile and specifies and implements the according MIFARE4Mobile solutions.
The aim of the group is to harmonize and advance the management of MIFARE based applications built on established and proven global standards such as Global Platform. This applies to secure elements in different form factors and different mobile phone models.
Tuesday, February 28, 2012
Adeneo releases Windows embedded compact 7 support for TI's ARM Cortex-A8 based devices
NUREMBERG, GERMANY: Adeneo Embedded, a Microsoft Windows Embedded Gold Partner and recipient of the "Windows Embedded Excellence Award" from 2007 through 2011, announced the availability of Windows Embedded Compact 7 reference board support packages (BSPs), along with a full suite of support services, including customized support, training and development services, —to assist original equipment manufacturers (OEMs) developing embedded devices, for the AM335x and AM384x Sitara ARM microprocessors (MPUs) and DM816x DaVinci video processors from Texas Instruments Inc. (TI).
Combining TI's latest ARM Cortex-A8-based applications processor technology with Microsoft's Windows Embedded Compact 7 platform of tools and technologies creates new opportunities to develop innovative devices with rich multimedia capabilities for enterprise and industrial applications. Examples of advanced features include multi-tasking, immersive Web browsing experiences and advanced graphical capabilities with Silverlight for Windows Embedded.
The latest version of the Texas Instruments "unified BSP" for Windows Embedded Compact 7 supports TI ARM Cortex-A8 devices, including OMAP35x, AM335x, AM35x, AM37x, AM384x Sitara ARM MPUs and DM37x and DM816x DaVinci video processors. The BSP is distributed as a free source code package by Adeneo Embedded from its website.
Adeneo Embedded, an active member of TI's Design Network, collaborated with TI to develop this reference BSP, and marries its deep knowledge of TI ARM technology with its extensive Windows Embedded Compact experience to create a breadth of expertise invaluable to OEMs seeking to differentiate their designs. This expertise uniquely positions Adeneo Embedded to deliver superior customer services supporting system integration, BSP, drivers and application development as well as performance optimization.
Windows Embedded Compact 7 provides developers, designers and original equipment manufacturers (OEMs) with a powerful real-time OS and a full suite of development tools, enabling an integrated, streamlined development experience to speed devices to market.
The Sitara AM335x platform is a cost and performance optimized solution targeting portable, pocket-sized applications. Starting at $5 and consuming as low as 7 mW of power, the AM335x ARM Cortex-A8 MPUs provide low power consumption while prolonging battery life and reducing heat emissions. Developers have access to a high performance processor with advanced 3D graphics capabilities, touch screen controller and sophisticated peripherals all on a single chip.
The Sitara AM384x and DaVinci DM816x platforms focus on delivering high performance capabilities. These solutions provide up to 1.5 GHz ARM Cortex-A8 performance with high system integration for faster, more robust applications. These highly integrated tools support multiple high-performance interfaces, such as PCIExpress Gen2, dual USB 2.0, SATA 2.0, dual Gigabit Ethernet and DDR2/DDR3 interfaces.
"The richness of features provided by TI's Sitara ARM microprocessor and DaVinci video processors families, combined with the Adeneo Embedded system integration expertise on Windows Embedded Compact 7 is an excellent solution to ensure OEMs' design success," said Yannick Chammings, CEO, Adeneo Embedded. "Device makers using advanced ARM Cortex-A8 processor architectures have the highest levels of performance and capability for their devices, and require top-level expertise on OS integration and optimization. OEMs can rely on the Adeneo Embedded engineering teams located in Europe and North America to receive best-in-class support for their Windows Embedded Compact 7-based developments using TI ARM Cortex-A8 devices."
Combining TI's latest ARM Cortex-A8-based applications processor technology with Microsoft's Windows Embedded Compact 7 platform of tools and technologies creates new opportunities to develop innovative devices with rich multimedia capabilities for enterprise and industrial applications. Examples of advanced features include multi-tasking, immersive Web browsing experiences and advanced graphical capabilities with Silverlight for Windows Embedded.
The latest version of the Texas Instruments "unified BSP" for Windows Embedded Compact 7 supports TI ARM Cortex-A8 devices, including OMAP35x, AM335x, AM35x, AM37x, AM384x Sitara ARM MPUs and DM37x and DM816x DaVinci video processors. The BSP is distributed as a free source code package by Adeneo Embedded from its website.
Adeneo Embedded, an active member of TI's Design Network, collaborated with TI to develop this reference BSP, and marries its deep knowledge of TI ARM technology with its extensive Windows Embedded Compact experience to create a breadth of expertise invaluable to OEMs seeking to differentiate their designs. This expertise uniquely positions Adeneo Embedded to deliver superior customer services supporting system integration, BSP, drivers and application development as well as performance optimization.
Windows Embedded Compact 7 provides developers, designers and original equipment manufacturers (OEMs) with a powerful real-time OS and a full suite of development tools, enabling an integrated, streamlined development experience to speed devices to market.
The Sitara AM335x platform is a cost and performance optimized solution targeting portable, pocket-sized applications. Starting at $5 and consuming as low as 7 mW of power, the AM335x ARM Cortex-A8 MPUs provide low power consumption while prolonging battery life and reducing heat emissions. Developers have access to a high performance processor with advanced 3D graphics capabilities, touch screen controller and sophisticated peripherals all on a single chip.
The Sitara AM384x and DaVinci DM816x platforms focus on delivering high performance capabilities. These solutions provide up to 1.5 GHz ARM Cortex-A8 performance with high system integration for faster, more robust applications. These highly integrated tools support multiple high-performance interfaces, such as PCIExpress Gen2, dual USB 2.0, SATA 2.0, dual Gigabit Ethernet and DDR2/DDR3 interfaces.
"The richness of features provided by TI's Sitara ARM microprocessor and DaVinci video processors families, combined with the Adeneo Embedded system integration expertise on Windows Embedded Compact 7 is an excellent solution to ensure OEMs' design success," said Yannick Chammings, CEO, Adeneo Embedded. "Device makers using advanced ARM Cortex-A8 processor architectures have the highest levels of performance and capability for their devices, and require top-level expertise on OS integration and optimization. OEMs can rely on the Adeneo Embedded engineering teams located in Europe and North America to receive best-in-class support for their Windows Embedded Compact 7-based developments using TI ARM Cortex-A8 devices."
Nemotek debuts world’s first two element wafer-level camera module
Mobile World Congress 2012, BARCELONA, SPAIN: Nemotek Technologie, a manufacturer of customized wafer-level cameras, today debuts the world’s first two element wafer-level camera, Exiguus H12-A2.
Leveraging the capabilities of its two element lens, Exiguus H12-A2 features high resolution and low distortion all in an ultra-small form factor. Specifically, the lens overall distortion is lower than 0.5 percent resulting in a sharper and clearer image than a traditional one element lens. This makes the camera ideal for mobile, laptop and even gaming applications.
The Exiguus H12-A2 is reflowable, and offers sophisticated camera functions, such as auto exposure control, auto white balance, black level calibration, noise reduction, flicker detection and avoidance. As a high end VGA CMOS wafer-level camera, the solution features an active pixel array of 640H x 480V and measures 1/10-inch.
Moreover, the camera features color correction, color saturation, lens shading correction, software reset as well as chrominance control and maintains the ability to withstand extreme temperatures.
“Today we unveil the first camera that successfully incorporates a two element wafer-lens and is technically more complex while providing better resolution than any current wafer-level offering on the market to date,” said Hatim Limati, VP of sales and marketing for Nemotek Technologie. “The Exiguus H12-A2 produces extraordinarily clear, sharp pictures which make it the perfect choice for a wide range of applications. With this new achievement, we are able to further showcase our position as the industry’s leader in innovation and design.”
In addition, Nemotek marks its debut into the High End (HE) VGA market with another new camera based on a 720P High End sensor. Samples of Nemotek’s Exiguus H12-A2 and its High End VGA camera are currently available.
Leveraging the capabilities of its two element lens, Exiguus H12-A2 features high resolution and low distortion all in an ultra-small form factor. Specifically, the lens overall distortion is lower than 0.5 percent resulting in a sharper and clearer image than a traditional one element lens. This makes the camera ideal for mobile, laptop and even gaming applications.
The Exiguus H12-A2 is reflowable, and offers sophisticated camera functions, such as auto exposure control, auto white balance, black level calibration, noise reduction, flicker detection and avoidance. As a high end VGA CMOS wafer-level camera, the solution features an active pixel array of 640H x 480V and measures 1/10-inch.
Moreover, the camera features color correction, color saturation, lens shading correction, software reset as well as chrominance control and maintains the ability to withstand extreme temperatures.
“Today we unveil the first camera that successfully incorporates a two element wafer-lens and is technically more complex while providing better resolution than any current wafer-level offering on the market to date,” said Hatim Limati, VP of sales and marketing for Nemotek Technologie. “The Exiguus H12-A2 produces extraordinarily clear, sharp pictures which make it the perfect choice for a wide range of applications. With this new achievement, we are able to further showcase our position as the industry’s leader in innovation and design.”
In addition, Nemotek marks its debut into the High End (HE) VGA market with another new camera based on a 720P High End sensor. Samples of Nemotek’s Exiguus H12-A2 and its High End VGA camera are currently available.
Microchip intros lowest-cost 16-bit PIC MCU family
embedded world 2012, CHANDLER, USA: Microchip Technology Inc. has announced a new addition to the 16-bit PIC24 Lite microcontroller (MCU) family that combines eXtreme Low Power (XLP) technology, low price and low pin count packages for the most cost-sensitive consumer, medical, and safety/security applications.
The PIC24F “KL” family features typical sleep currents of 30 nA at 25°C, and typical run currents of 150 µA/MHz at 1.8V. In order to optimize low-cost applications, these products include flexible peripherals, such as the Master Synchronous Serial Port (MSSP), which enables designers to configure either an I2C or SPI interface, as well as the Enhanced Capture/Compare/PWM (ECCP) peripheral that allows designers to customize for multiple PWM and input-capture configurations. The “KL” family of products is available in 14-, 20- and 28-pin packages, starting at $0.75 each, in high-volume quantities.
Today’s manufacturers are under intense pressure to cut costs, even as they deliver more sophisticated, lower-power products. With its combination of features in low pin count packages, the PIC24 “KL” MCUs provide an ideal entry-level 16-bit solution for applications with lower I/O and memory requirements, such as low-cost electronic toys, electric shavers and portable blood-pressure monitors. The MCUs perform at up to 16 MIPS with a flexible peripheral set, enabling customers to differentiate their products in the marketplace while keeping costs low.
“The PIC24F ‘KL’ family was developed for cost-sensitive applications that require 16-bit performance, extremely low power sleep and active modes, and low pin count package options,” said Mitch Obolsky, VP of Microchip’s Advanced Microcontroller Architecture Division. “Our new MCUs meet these needs, at prices starting at just $0.75 each in high-volume quantities, to cater to the most cost-sensitive applications.”
The PIC24F “KL” family features typical sleep currents of 30 nA at 25°C, and typical run currents of 150 µA/MHz at 1.8V. In order to optimize low-cost applications, these products include flexible peripherals, such as the Master Synchronous Serial Port (MSSP), which enables designers to configure either an I2C or SPI interface, as well as the Enhanced Capture/Compare/PWM (ECCP) peripheral that allows designers to customize for multiple PWM and input-capture configurations. The “KL” family of products is available in 14-, 20- and 28-pin packages, starting at $0.75 each, in high-volume quantities.
Today’s manufacturers are under intense pressure to cut costs, even as they deliver more sophisticated, lower-power products. With its combination of features in low pin count packages, the PIC24 “KL” MCUs provide an ideal entry-level 16-bit solution for applications with lower I/O and memory requirements, such as low-cost electronic toys, electric shavers and portable blood-pressure monitors. The MCUs perform at up to 16 MIPS with a flexible peripheral set, enabling customers to differentiate their products in the marketplace while keeping costs low.
“The PIC24F ‘KL’ family was developed for cost-sensitive applications that require 16-bit performance, extremely low power sleep and active modes, and low pin count package options,” said Mitch Obolsky, VP of Microchip’s Advanced Microcontroller Architecture Division. “Our new MCUs meet these needs, at prices starting at just $0.75 each in high-volume quantities, to cater to the most cost-sensitive applications.”
BiTMICRO selects Synopsys for chip design automation
MOUNTAIN VIEW, USA: Synopsys Inc., a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, announced that BiTMICRO Networks, a manufacturer of high-end enterprise Solid State Drive (SSD) technologies, has chosen Synopsys as its electronic design automation (EDA) provider for system-on-chip (SoC) design.
BiTMICRO recently announced the successful tapeout of two third-generation SSD controllers, which are the foundation of its next-generation products, using Synopsys' Galaxy Implementation and Discovery Verification Platforms to speed SSD controller development.
BiTMICRO's pioneering TALINO-DE (Translation and Linking of I/O Nodes—Device Edition) SSD controller works with its second-stage ISIP-DE (Intelligent Storage Interconnect Platform—Device Edition) controller to achieve the required performance in mission-critical applications.
These ASIC controllers were designed and developed using Synopsys' Galaxy implementation and Discovery verification platforms, which include Design Compiler RTL synthesis, PrimeTime signoff, HSPICE circuit simulation and VCS functional verification tools. Using foundry-certified models and an advanced verification methodology to eliminate bugs, Synopsys' integrated tool suites helped make it possible for BiTMICRO engineers to achieve high-quality output without any delay.
"We are proud of the significant innovations our engineering team in the Philippines has achieved with the cutting-edge TALINO-DE and ISIP-DE controller designs," said Rey Bruce, CEO of BiTMICRO Networks. "Synopsys' robust portfolio of implementation and verification solutions and superior technical support were instrumental in helping us bring our next-generation SSD products to market in a timely manner. We look forward to working with Synopsys as we continue to innovate to meet our customers' needs."
"BiTMICRO adopted Synopsys' implementation and verification solutions to address their design challenges because their engineers require silicon-proven, high-quality tools for their SoC designs," said Jian-Yue Pan, VP, Asia-Pacific sales at Synopsys.
"Synopsys is also partnering with BiTMICRO's academic arm, the Bruce Institute of Technology, to support the first microchip design center in the Philippines whose aim is to help train local engineers in advanced microchip design and engineering. Synopsys is dedicated to supporting the global IC engineering community and contributing to our customers' growth as technology leaders."
BiTMICRO recently announced the successful tapeout of two third-generation SSD controllers, which are the foundation of its next-generation products, using Synopsys' Galaxy Implementation and Discovery Verification Platforms to speed SSD controller development.
BiTMICRO's pioneering TALINO-DE (Translation and Linking of I/O Nodes—Device Edition) SSD controller works with its second-stage ISIP-DE (Intelligent Storage Interconnect Platform—Device Edition) controller to achieve the required performance in mission-critical applications.
These ASIC controllers were designed and developed using Synopsys' Galaxy implementation and Discovery verification platforms, which include Design Compiler RTL synthesis, PrimeTime signoff, HSPICE circuit simulation and VCS functional verification tools. Using foundry-certified models and an advanced verification methodology to eliminate bugs, Synopsys' integrated tool suites helped make it possible for BiTMICRO engineers to achieve high-quality output without any delay.
"We are proud of the significant innovations our engineering team in the Philippines has achieved with the cutting-edge TALINO-DE and ISIP-DE controller designs," said Rey Bruce, CEO of BiTMICRO Networks. "Synopsys' robust portfolio of implementation and verification solutions and superior technical support were instrumental in helping us bring our next-generation SSD products to market in a timely manner. We look forward to working with Synopsys as we continue to innovate to meet our customers' needs."
"BiTMICRO adopted Synopsys' implementation and verification solutions to address their design challenges because their engineers require silicon-proven, high-quality tools for their SoC designs," said Jian-Yue Pan, VP, Asia-Pacific sales at Synopsys.
"Synopsys is also partnering with BiTMICRO's academic arm, the Bruce Institute of Technology, to support the first microchip design center in the Philippines whose aim is to help train local engineers in advanced microchip design and engineering. Synopsys is dedicated to supporting the global IC engineering community and contributing to our customers' growth as technology leaders."
Microchip expands family of low-cost, small-package 32-bit PIC32 MCUs
embedded world 2012, CHANDLER, USA: Microchip Technology Inc. announced a new series of low pin count 32-bit PIC32 microcontrollers (MCUs) that provide 61 DMIPS of performance in packages as small as 5 mm x 5 mm, for space-constrained and cost-sensitive designs.
The PIC32 “MX1” and “MX2” MCUs are the smallest and lowest-cost PIC32 microcontrollers, and are the first PIC32 MCUs to feature dedicated audio and capacitive-sensing peripherals. These latest devices also feature USB On-the-Go (OTG) capabilities, making them ideal for developing audio accessories and other applications in the consumer, industrial, medical and automotive markets.
Rated for operation up to 105°C, the PIC32 MX1 and MX2 MCUs include up to 128 KB of Flash and 32 KB of RAM, two I2S interfaces for audio processing, an integrated hardware peripheral for adding mTouch™ capacitive touch buttons or advanced sensors, and an 8-bit Parallel Master Port (PMP) interface for graphics or external memory.
Additionally, the new devices feature an on-chip 10-bit, 1 Msps, 13-channel Analog-to-Digital Converter (ADC), and serial-communications peripherals, with the PIC32 MX2 MCUs adding USB OTG. The MCUs are offered in packages from 28- to 44-pins, with sizes down to 5 mm x 5 mm, and a 0.5 mm pitch. Further easing the design effort is Microchip’s Peripheral Pin Select feature, which allows developers to “remap” most of the chip’s digital-function pins, making layout and design modifications significantly simpler.
The PIC32 MX1 and MX2 devices are compatible with Microchip’s 16-bit PIC24F product line for easy migration, and are supported by the MPLAB X IDE—the single development environment for all of Microchip’s 8-, 16- and 32-bit MCUs.
“Expanding our PIC32 MX1 and MX2 family gives our customers more options to seamlessly migrate their ever-changing designs,” said Sumit Mitra, VP of Microchip’s High-Performance Microcontroller Division. “With 128K Flash, 32K Ram, the highest DMIPs per MHZ performance of any 32-bit MCU, and small packages down to 28 pins, the PIC32 MX1 and MX2 MCUs enable designers to differentiate their products in the marketplace, while keeping design size and costs low.”
The PIC32 “MX1” and “MX2” MCUs are the smallest and lowest-cost PIC32 microcontrollers, and are the first PIC32 MCUs to feature dedicated audio and capacitive-sensing peripherals. These latest devices also feature USB On-the-Go (OTG) capabilities, making them ideal for developing audio accessories and other applications in the consumer, industrial, medical and automotive markets.
Rated for operation up to 105°C, the PIC32 MX1 and MX2 MCUs include up to 128 KB of Flash and 32 KB of RAM, two I2S interfaces for audio processing, an integrated hardware peripheral for adding mTouch™ capacitive touch buttons or advanced sensors, and an 8-bit Parallel Master Port (PMP) interface for graphics or external memory.
Additionally, the new devices feature an on-chip 10-bit, 1 Msps, 13-channel Analog-to-Digital Converter (ADC), and serial-communications peripherals, with the PIC32 MX2 MCUs adding USB OTG. The MCUs are offered in packages from 28- to 44-pins, with sizes down to 5 mm x 5 mm, and a 0.5 mm pitch. Further easing the design effort is Microchip’s Peripheral Pin Select feature, which allows developers to “remap” most of the chip’s digital-function pins, making layout and design modifications significantly simpler.
The PIC32 MX1 and MX2 devices are compatible with Microchip’s 16-bit PIC24F product line for easy migration, and are supported by the MPLAB X IDE—the single development environment for all of Microchip’s 8-, 16- and 32-bit MCUs.
“Expanding our PIC32 MX1 and MX2 family gives our customers more options to seamlessly migrate their ever-changing designs,” said Sumit Mitra, VP of Microchip’s High-Performance Microcontroller Division. “With 128K Flash, 32K Ram, the highest DMIPs per MHZ performance of any 32-bit MCU, and small packages down to 28 pins, the PIC32 MX1 and MX2 MCUs enable designers to differentiate their products in the marketplace, while keeping design size and costs low.”
Symtavision launches SymTA/S 3.1 and TraceAnalyzer 3.1
Embedded World 2012, BRAUNSCHWEIG, GERMANY: Symtavision, the global leader for timing design and timing verification for embedded real-time systems, has launched SymTA/S 3.1 and TraceAnalyzer 3.1, major new versions of its seamlessly integrated system-level tools for planning, optimizing and verifying embedded real-time systems.
Targeted at automotive, aerospace, automation and other performance and safety-critical systems, SymTA/S 3.1 and TraceAnalyzer 3.1 include a wealth of new and enhanced features including new Scenario Management, a new FIBEX 3.1 import interface and improved Relative Deadline support. In addition, more than 50 functional improvements have been implemented at the request of customers including Audi, BMW, Bosch, Daimler, Fiat, General Motors, Infineon and Volkswagen.
In SymTA/S 3.1 and TraceAnalyzer 3.1, the new Scenario Manager supports scenario-dependent scheduling parameters such as period and priority, as well as task execution time and CPU/bus speed. It is also fully user-customizable, allowing additional parameters to be covered. Support for the Field Bus Exchange (FIBEX) format has been updated, enabling the import of main system architecture and parameterization data in the latest FIBEX 3.1 file format. This enables the import of CAN and FlexRay configuration data including signals and function to ECU mappings. Improved Relative Deadline support enables deadline values to be automatically aligned whenever a period or task runtime changes.
Working closely with its customers, Symtavision has also implemented more than 50 functional improvements in SymTA/S 3.1 and TraceAnalyzer 3.1. These include a decrease of up to 50% in the memory requirements, enhanced Event Triggering analysis support, and new CAN-bus Load Variation Analysis enabling different load scenarios to be examined by varying message periods. Also included are FlexRay model check improvements, remote interfacing and scripting enhancements, as well as various charting, reporting, documentation and graphical user interface improvements.
Targeted at automotive, aerospace, automation and other performance and safety-critical systems, SymTA/S 3.1 and TraceAnalyzer 3.1 include a wealth of new and enhanced features including new Scenario Management, a new FIBEX 3.1 import interface and improved Relative Deadline support. In addition, more than 50 functional improvements have been implemented at the request of customers including Audi, BMW, Bosch, Daimler, Fiat, General Motors, Infineon and Volkswagen.
In SymTA/S 3.1 and TraceAnalyzer 3.1, the new Scenario Manager supports scenario-dependent scheduling parameters such as period and priority, as well as task execution time and CPU/bus speed. It is also fully user-customizable, allowing additional parameters to be covered. Support for the Field Bus Exchange (FIBEX) format has been updated, enabling the import of main system architecture and parameterization data in the latest FIBEX 3.1 file format. This enables the import of CAN and FlexRay configuration data including signals and function to ECU mappings. Improved Relative Deadline support enables deadline values to be automatically aligned whenever a period or task runtime changes.
Working closely with its customers, Symtavision has also implemented more than 50 functional improvements in SymTA/S 3.1 and TraceAnalyzer 3.1. These include a decrease of up to 50% in the memory requirements, enhanced Event Triggering analysis support, and new CAN-bus Load Variation Analysis enabling different load scenarios to be examined by varying message periods. Also included are FlexRay model check improvements, remote interfacing and scripting enhancements, as well as various charting, reporting, documentation and graphical user interface improvements.
Microchip intros general-purpose 8-bit PIC MCUs with next-gen digital and analog peripherals
embedded world 2012, CHANDLER, USA: Microchip Technology Inc. announced a new family of 8-bit microcontrollers (MCUs) featuring next-generation analog and digital peripherals, making them ideal for general-purpose applications, as well as battery charging, LED lighting, ballast-control, power-conversion and system-control applications.
The PIC12F(HV)752 MCUs feature an integrated Complementary Output Generator (COG) peripheral that provides non-overlapping, complementary waveforms for inputs such as comparators and Pulse Width Modulation (PWM) peripherals, while enabling dead-band control, auto shutdown, auto reset, phase control and blanking control. Additionally, the new MCUs feature 1.75 KB of self read-write program memory, 64B of RAM, an on-chip 10-bit ADC, Capture-Compare PWM modules, high-performance comparators (down to 40 ns response), and two 50 mA-capable I/Os, enabling engineers to increase overall system capabilities and reduce costs.
Engineers are constantly challenged to increase system performance and efficiency while reducing system costs, especially for newer LED-lighting and battery-charging applications. With their numerous on-chip, general-purpose and specialized peripherals, including the integrated COG, high performance comparators, 50 mA outputs for direct FET drive, the PIC12F(HV)752 MCUs meet these needs.
The high-voltage variant in the family—the PIC12HV752 MCU—incorporates a shunt regulator that allows operation from 2V to an unspecified user-defined maximum voltage level, with less than 2 mA operation current. This high-voltage variant is ideal for cost-sensitive applications with high-voltage power rails. Additionally, the 4-channel, 10-bit ADC can be used to implement various sensors and mTouch sensing applications, including capacitive touch.
The PIC12F(HV)752 MCUs feature an integrated Complementary Output Generator (COG) peripheral that provides non-overlapping, complementary waveforms for inputs such as comparators and Pulse Width Modulation (PWM) peripherals, while enabling dead-band control, auto shutdown, auto reset, phase control and blanking control. Additionally, the new MCUs feature 1.75 KB of self read-write program memory, 64B of RAM, an on-chip 10-bit ADC, Capture-Compare PWM modules, high-performance comparators (down to 40 ns response), and two 50 mA-capable I/Os, enabling engineers to increase overall system capabilities and reduce costs.
Engineers are constantly challenged to increase system performance and efficiency while reducing system costs, especially for newer LED-lighting and battery-charging applications. With their numerous on-chip, general-purpose and specialized peripherals, including the integrated COG, high performance comparators, 50 mA outputs for direct FET drive, the PIC12F(HV)752 MCUs meet these needs.
The high-voltage variant in the family—the PIC12HV752 MCU—incorporates a shunt regulator that allows operation from 2V to an unspecified user-defined maximum voltage level, with less than 2 mA operation current. This high-voltage variant is ideal for cost-sensitive applications with high-voltage power rails. Additionally, the 4-channel, 10-bit ADC can be used to implement various sensors and mTouch sensing applications, including capacitive touch.
Silicon Labs launches industry’s most flexible and developer-friendly 32-bit mixed-signal MCUs
embedded world 2012, NUREMBERG, GERMANY: Bringing unprecedented design flexibility to the 32-bit market, Silicon Laboratories Inc., a leader in high-performance, analog-intensive, mixed-signal ICs, introduced the Precision32 microcontroller (MCU) family.
Based on the ARM Cortex-M3 processor, the new Precision32 family includes 32 SiM3U1xx and SiM3C1xx MCU products with footprint-compatible USB and non-USB options. Offering a highly integrated, flexible architecture, a rich peripheral set, ultra-low power and Eclipse-based development tools that are downloadable at no charge, the Precision32 family is suitable for a wide range of applications including portable medical devices, point-of-sale peripherals, motor control, industrial monitoring, barcode scanners, optical touchscreen interfaces, sensor controllers and home automation systems.
To help developers reduce system cost, design complexity and component count, the Precision32 family offers an exceptionally high level of peripheral integration that can enable a bill of materials (BOM) savings of up to $1.34 (USD). The following on-chip peripherals greatly reduce component count and system cost:
Integrated precision oscillators with an advanced phase-locked loop (PLL) eliminate the need for a costly 8 MHz crystal by providing the clocking accuracy necessary for crystal-less USB operation while running the core independently at any frequency from 1 to 80 MHz.
An internal 5 V voltage regulator enables the MCU to be powered directly from USB or a 5 V source without the need for an external regulator. Six high-drive I/Os (up to 300 mA each) can directly drive high-power LEDs, small motors, buzzers and power MOSFETs, as well as serve as a boost converter controller. Up to 16 capacitive touch channels eliminate the need for separate touch sensor ICs in applications requiring buttons, sliders or wheels.
The Precision32 family offers a complete USB 2.0 PHY and analog front-end interfacing directly to the USB connector, while most other MCUs require an external USB pull-up resistor and termination circuit.
With design schedules compressing to meet aggressive time-to-market goals, today’s embedded developers tackle complex and often rapidly changing design requirements while meeting stringent cost and power budgets on tight deadlines. Many current 32-bit MCU products lack sufficient architectural flexibility, especially for pinout and peripheral placement, which makes the design job harder than it has to be. The Precision32 family offers developers a more flexible alternative by providing a fully customizable I/O system and pinout arrangement.
Using Silicon Labs’ patented dual-crossbar technology and a drag-and-drop GUI, developers can easily choose their analog and digital peripherals and pin locations for these peripherals. Competing MCUs often have preset peripheral locations and pinouts, leading to pin conflicts that force developers to alter their designs or move to larger, costlier packages. Silicon Labs’ crossbar design and GUI-based AppBuilder software enable developers to optimize their peripheral mix and pinout placement and locate peripherals near connecting components, thus eliminating pin conflicts, simplifying PCB routing, minimizing PCB layers and ultimately reducing system cost.
The Precision32 family’s analog peripherals are specified and tested to operate over temperature and voltage (down to 1.8 V). In fact, these high-performance analog peripherals are so reliable they can replace standalone analog components. Moreover, the Precision32 analog peripherals are highly configurable, enabling developers to simplify their designs and optimize performance for a wide variety of embedded applications.
Silicon Labs engineered the Precision32 family to achieve industry-leading power efficiency in both active and sleep modes. The MCUs leverage Silicon Labs’ state-of-the-art, patented low-power design technologies to achieve power reductions within every block of the MCU design, resulting in up to 33 percent lower active current (22 mA at 80 MHz or 275 µA/MHz) and 100 times lower sleep current (0.35 µA with RTC enabled and 4 kB of RAM retention) than competing 32-bit solutions. Numerous power modes and clocking options enable developers to optimize their embedded designs for the lowest power at a given performance level.
Based on the ARM Cortex-M3 processor, the new Precision32 family includes 32 SiM3U1xx and SiM3C1xx MCU products with footprint-compatible USB and non-USB options. Offering a highly integrated, flexible architecture, a rich peripheral set, ultra-low power and Eclipse-based development tools that are downloadable at no charge, the Precision32 family is suitable for a wide range of applications including portable medical devices, point-of-sale peripherals, motor control, industrial monitoring, barcode scanners, optical touchscreen interfaces, sensor controllers and home automation systems.
To help developers reduce system cost, design complexity and component count, the Precision32 family offers an exceptionally high level of peripheral integration that can enable a bill of materials (BOM) savings of up to $1.34 (USD). The following on-chip peripherals greatly reduce component count and system cost:
Integrated precision oscillators with an advanced phase-locked loop (PLL) eliminate the need for a costly 8 MHz crystal by providing the clocking accuracy necessary for crystal-less USB operation while running the core independently at any frequency from 1 to 80 MHz.
An internal 5 V voltage regulator enables the MCU to be powered directly from USB or a 5 V source without the need for an external regulator. Six high-drive I/Os (up to 300 mA each) can directly drive high-power LEDs, small motors, buzzers and power MOSFETs, as well as serve as a boost converter controller. Up to 16 capacitive touch channels eliminate the need for separate touch sensor ICs in applications requiring buttons, sliders or wheels.
The Precision32 family offers a complete USB 2.0 PHY and analog front-end interfacing directly to the USB connector, while most other MCUs require an external USB pull-up resistor and termination circuit.
With design schedules compressing to meet aggressive time-to-market goals, today’s embedded developers tackle complex and often rapidly changing design requirements while meeting stringent cost and power budgets on tight deadlines. Many current 32-bit MCU products lack sufficient architectural flexibility, especially for pinout and peripheral placement, which makes the design job harder than it has to be. The Precision32 family offers developers a more flexible alternative by providing a fully customizable I/O system and pinout arrangement.
Using Silicon Labs’ patented dual-crossbar technology and a drag-and-drop GUI, developers can easily choose their analog and digital peripherals and pin locations for these peripherals. Competing MCUs often have preset peripheral locations and pinouts, leading to pin conflicts that force developers to alter their designs or move to larger, costlier packages. Silicon Labs’ crossbar design and GUI-based AppBuilder software enable developers to optimize their peripheral mix and pinout placement and locate peripherals near connecting components, thus eliminating pin conflicts, simplifying PCB routing, minimizing PCB layers and ultimately reducing system cost.
The Precision32 family’s analog peripherals are specified and tested to operate over temperature and voltage (down to 1.8 V). In fact, these high-performance analog peripherals are so reliable they can replace standalone analog components. Moreover, the Precision32 analog peripherals are highly configurable, enabling developers to simplify their designs and optimize performance for a wide variety of embedded applications.
Silicon Labs engineered the Precision32 family to achieve industry-leading power efficiency in both active and sleep modes. The MCUs leverage Silicon Labs’ state-of-the-art, patented low-power design technologies to achieve power reductions within every block of the MCU design, resulting in up to 33 percent lower active current (22 mA at 80 MHz or 275 µA/MHz) and 100 times lower sleep current (0.35 µA with RTC enabled and 4 kB of RAM retention) than competing 32-bit solutions. Numerous power modes and clocking options enable developers to optimize their embedded designs for the lowest power at a given performance level.
TI intros RF DC/DC switching converters for 2G, 3G and 4G power amplifiers
BARCELONA, SPAIN: Texas Instruments Inc. (TI) has added a duo of new RF DC/DC switching converters to its industry leading portfolio of RF power management integrated circuits (ICs). The new National LM3242 and LM3243 regulators are adaptive power supply ICs that minimize power consumption of the RF power amplifier (PA) across all operating conditions.
Together with the National LM3241, the ICs extend battery life and reduce heat dissipated in battery-powered 2G, 3G and 4G long term evolution (LTE) portable devices such as smartphones and tablets.
Operation of the radio circuitry in portable devices accounts for a significant amount of total power consumption – easily 30-percent or more. RF PAs are among the least efficient components in today's mobile systems, typically driven at maximum power regardless of the power actually needed. TI's new LM3242 and LM3243 dynamically adjust the power delivered to the PA based on how much power is actually needed, saving a significant amount of energy.
The LM3242 and LM3243 are unique from traditional DC/DC switching converters as they are designed to meet stringent RF performance requirements and enable dynamic optimization of the PA output power, saving up to 50-percent or more battery current consumption and reducing the PA heat by up to 30 degrees C.
Both ICs achieve 95-percent efficiency and feature multiple modes of operation to maximize efficiency for all battery and output conditions. The LM3242 is compatible with 3G and 4G applications and features a very small 9-mm square solution size. The LM3243 includes a unique active current assist and analog bypass mode, which enables support for 2G, 3G and 4G applications while maintaining output regulation and minimal solution size.
Together with the National LM3241, the ICs extend battery life and reduce heat dissipated in battery-powered 2G, 3G and 4G long term evolution (LTE) portable devices such as smartphones and tablets.
Operation of the radio circuitry in portable devices accounts for a significant amount of total power consumption – easily 30-percent or more. RF PAs are among the least efficient components in today's mobile systems, typically driven at maximum power regardless of the power actually needed. TI's new LM3242 and LM3243 dynamically adjust the power delivered to the PA based on how much power is actually needed, saving a significant amount of energy.
The LM3242 and LM3243 are unique from traditional DC/DC switching converters as they are designed to meet stringent RF performance requirements and enable dynamic optimization of the PA output power, saving up to 50-percent or more battery current consumption and reducing the PA heat by up to 30 degrees C.
Both ICs achieve 95-percent efficiency and feature multiple modes of operation to maximize efficiency for all battery and output conditions. The LM3242 is compatible with 3G and 4G applications and features a very small 9-mm square solution size. The LM3243 includes a unique active current assist and analog bypass mode, which enables support for 2G, 3G and 4G applications while maintaining output regulation and minimal solution size.
Mentor Graphics reports fiscal Q4 results; announces board has increased share buyback authorization
WILSONVILLE, USA: Mentor Graphics Corp. announced financial results for the company’s fiscal fourth quarter and year ended January 31, 2012. The company reported revenues of $320.4 million, non-GAAP earnings per share of $.58, and GAAP earnings per share of $.52. For the full fiscal year, revenues were $1,014.6 million, non-GAAP earnings per share were $1.13, and GAAP earnings per share were $.74.
“It was a quarter and a year of records for the company, including the significant milestone of crossing one billion dollars in revenues,” said Walden C. Rhines, chairman and CEO of Mentor Graphics. “We exited the year with very strong momentum as our strategy of diversification has driven growth in non-traditional EDA applications like manufacturing, thermal analysis and embedded software, all of which grew bookings faster than the overall company. Additionally, the growing complexity of chips and the challenges of the 28nm and 20nm process nodes have generated substantial demand for both our functional verification and our design-to-silicon products.”
For the full fiscal year, the company grew staffing 1.4 percent, including acquisitions, while growing revenues 10.9 percent. Non-GAAP operating margins for the year reached 16.5 percent and 11.1 percent, respectively, on a GAAP basis. For the fourth quarter, operating expense was flat year-on-year on a non-GAAP basis, and up 2.3 percent on a GAAP basis. For the full fiscal year, non-GAAP operating expense was up 3 percent, and 3.3 percent on a GAAP basis.
During the quarter, the company announced the Hyperlynx 8.2 product which now offers three-dimensional full-wave field solving and thermal/power co-simulation capability. The company also announced a partnership with Freescale Semiconductor to deliver high-speed simulation and virtual prototyping environments for next-generation Freescale multi-core embedded processors.
In December, Mentor acquired Flowmaster, a world leader in one-dimensional computational fluid dynamics simulation software used to analyze complex fluid flow network systems. Also in the quarter, the company announced a new version of its three-dimensional computational fluid dynamics simulation software that offers new analytic capabilities for radiation, combustion and hypersonic flows.
The company introduced the first solution that addresses the challenges of light emitting diode (LED) and semiconductor packaging thermal characterization, combining the FloTHERM and T3ster products. In manufacturing, the company announced Capital Harness MPM, a product that helps wire harness manufacturers cut production costs.
“The company has delivered significant improvements in our SG&A to revenues ratio over the year, driven by both strong cost controls and improvements in the business,” said Gregory K. Hinckley, president of Mentor Graphics. “We made great strides this year toward the company’s goal of achieving 20 percent operating margins, and with incremental improvements, expect to achieve that target in FY2014. With continued discipline in the business, we expect to grow earnings per share at twice the rate of revenue growth in the coming fiscal year. Our past investments in a multi-tiered sales channel allow us to address the universe of tens of thousands of systems companies versus the hundreds of semiconductor companies which gives us, uniquely among our competitors, the reach to penetrate traditionally under-served adjacent design markets.”
Outlook
For the full fiscal year 2013, the company expects revenues of about $1.1 billion, non-GAAP earnings per share of about $1.32, and GAAP earnings per share of approximately $1.13. For the first quarter of fiscal 2013, the company expects revenues of about $255 million, non-GAAP earnings per share of about $.25, and GAAP earnings per share of approximately $.19.
“It was a quarter and a year of records for the company, including the significant milestone of crossing one billion dollars in revenues,” said Walden C. Rhines, chairman and CEO of Mentor Graphics. “We exited the year with very strong momentum as our strategy of diversification has driven growth in non-traditional EDA applications like manufacturing, thermal analysis and embedded software, all of which grew bookings faster than the overall company. Additionally, the growing complexity of chips and the challenges of the 28nm and 20nm process nodes have generated substantial demand for both our functional verification and our design-to-silicon products.”
For the full fiscal year, the company grew staffing 1.4 percent, including acquisitions, while growing revenues 10.9 percent. Non-GAAP operating margins for the year reached 16.5 percent and 11.1 percent, respectively, on a GAAP basis. For the fourth quarter, operating expense was flat year-on-year on a non-GAAP basis, and up 2.3 percent on a GAAP basis. For the full fiscal year, non-GAAP operating expense was up 3 percent, and 3.3 percent on a GAAP basis.
During the quarter, the company announced the Hyperlynx 8.2 product which now offers three-dimensional full-wave field solving and thermal/power co-simulation capability. The company also announced a partnership with Freescale Semiconductor to deliver high-speed simulation and virtual prototyping environments for next-generation Freescale multi-core embedded processors.
In December, Mentor acquired Flowmaster, a world leader in one-dimensional computational fluid dynamics simulation software used to analyze complex fluid flow network systems. Also in the quarter, the company announced a new version of its three-dimensional computational fluid dynamics simulation software that offers new analytic capabilities for radiation, combustion and hypersonic flows.
The company introduced the first solution that addresses the challenges of light emitting diode (LED) and semiconductor packaging thermal characterization, combining the FloTHERM and T3ster products. In manufacturing, the company announced Capital Harness MPM, a product that helps wire harness manufacturers cut production costs.
“The company has delivered significant improvements in our SG&A to revenues ratio over the year, driven by both strong cost controls and improvements in the business,” said Gregory K. Hinckley, president of Mentor Graphics. “We made great strides this year toward the company’s goal of achieving 20 percent operating margins, and with incremental improvements, expect to achieve that target in FY2014. With continued discipline in the business, we expect to grow earnings per share at twice the rate of revenue growth in the coming fiscal year. Our past investments in a multi-tiered sales channel allow us to address the universe of tens of thousands of systems companies versus the hundreds of semiconductor companies which gives us, uniquely among our competitors, the reach to penetrate traditionally under-served adjacent design markets.”
Outlook
For the full fiscal year 2013, the company expects revenues of about $1.1 billion, non-GAAP earnings per share of about $1.32, and GAAP earnings per share of approximately $1.13. For the first quarter of fiscal 2013, the company expects revenues of about $255 million, non-GAAP earnings per share of about $.25, and GAAP earnings per share of approximately $.19.
Vitesse’s carrier Ethernet portfolio aligns with new MEF CE 2.0 requirements
CAMARILLO, USA: Vitesse Semiconductor Corp., a leading provider of advanced IC solutions for carrier and Enterprise networks, is a first-adopter of the Metro Ethernet Forum’s (MEF) Carrier Ethernet 2.0 (CE 2.0) requirements for mobile backhaul and mobile access equipment, the fastest growing markets in the IP Edge network.
“Vitesse has been a long-time member of the MEF and an evangelist for the proliferation of Ethernet technology in Carrier networks,” said Martin Nuss, CTO at Vitesse.
“We are very supportive of the CE 2.0 requirements as they establish a market definition for the Carrier Ethernet feature set and create a framework for future value-added services. By incorporating the CE 2.0 requirements into our robust and feature-rich Carrier Ethernet technology architecture, we have established Vitesse as the industry’s preferred solution provider for the IP Edge market. We estimate that this market will be a $500 million served market for Vitesse by 2015.”
“Vitesse has been a long-time member of the MEF and an evangelist for the proliferation of Ethernet technology in Carrier networks,” said Martin Nuss, CTO at Vitesse.
“We are very supportive of the CE 2.0 requirements as they establish a market definition for the Carrier Ethernet feature set and create a framework for future value-added services. By incorporating the CE 2.0 requirements into our robust and feature-rich Carrier Ethernet technology architecture, we have established Vitesse as the industry’s preferred solution provider for the IP Edge market. We estimate that this market will be a $500 million served market for Vitesse by 2015.”
Analog Devices intros industry’s lowest power complete HART modem IC for process control apps
NORWOOD, USA: Analog Devices Inc. (ADI) has introduced a complete HART (Highway Addressable Remote Transducer) modem IC (integrated circuit) that enables HART connectivity in process control applications such as smart sensors and factory automation equipment.
The single-chip device requires the lowest power in the industry and is fully compliant with the HART Communication Protocol, which is the global standard for sending and receiving digital information across analog wires between smart devices and control or monitoring systems. The AD5700 HART modem IC is Analog Devices’ first complete IC offering for HART Communication and is compliance registered with the HART Communication Foundation.
“The AD5700 HART modem IC has been tested by the HART Communication Foundation to verify that products designed with the new ADI device will adhere to HART protocol requirements,” said Ron Helson, executive director, HART Communication Foundation. “Compliance with HART protocol requirements is important so users worldwide can gain quick, easy visibility to devices in the field when using HART-enabled handheld test, calibration devices, computers and automation systems.”
The AD5700 HART modem IC accurately encodes and decodes HART communication signals in noisy, harsh industrial environments, ensuring a reliable communication interface. The AD5700 HART modem IC makes it quick and easy to implement products that can be registered with the HART Communication Foundation. The new modem IC requires 60 percent less external support components and is the first to incorporate an internal low-power 0.5 percent accurate oscillator, internal receive filtering and an internally buffered HART output, providing a greater than 75 percent saving in board area over competing products.
In analog I/O modules, the reduction in board space made possible by the AD5700 modem IC enables the per channel inclusion of HART without the need to increase system form factor. The device consumes 38 percent less power than alternative solutions, and this power savings enables system engineers designing smart sensor applications to reduce their power budgets, lower system costs and optimize board space to accommodate supplementary functionality.
The AD5700 HART modem IC is designed to interface easily with ADI’s innovative portfolio of data converters for industrial applications, such as the AD5755 D/A converter for analog I/O modules and the AD5421 D/A converter for loop-powered smart transmitter applications. ADI has also developed a fully functional smart transmitter demo system featuring the AD5700 HART modem IC that is compliance tested, verified and registered with the HART Communication Foundation as an approved HART solution.
The single-chip device requires the lowest power in the industry and is fully compliant with the HART Communication Protocol, which is the global standard for sending and receiving digital information across analog wires between smart devices and control or monitoring systems. The AD5700 HART modem IC is Analog Devices’ first complete IC offering for HART Communication and is compliance registered with the HART Communication Foundation.
“The AD5700 HART modem IC has been tested by the HART Communication Foundation to verify that products designed with the new ADI device will adhere to HART protocol requirements,” said Ron Helson, executive director, HART Communication Foundation. “Compliance with HART protocol requirements is important so users worldwide can gain quick, easy visibility to devices in the field when using HART-enabled handheld test, calibration devices, computers and automation systems.”
The AD5700 HART modem IC accurately encodes and decodes HART communication signals in noisy, harsh industrial environments, ensuring a reliable communication interface. The AD5700 HART modem IC makes it quick and easy to implement products that can be registered with the HART Communication Foundation. The new modem IC requires 60 percent less external support components and is the first to incorporate an internal low-power 0.5 percent accurate oscillator, internal receive filtering and an internally buffered HART output, providing a greater than 75 percent saving in board area over competing products.
In analog I/O modules, the reduction in board space made possible by the AD5700 modem IC enables the per channel inclusion of HART without the need to increase system form factor. The device consumes 38 percent less power than alternative solutions, and this power savings enables system engineers designing smart sensor applications to reduce their power budgets, lower system costs and optimize board space to accommodate supplementary functionality.
The AD5700 HART modem IC is designed to interface easily with ADI’s innovative portfolio of data converters for industrial applications, such as the AD5755 D/A converter for analog I/O modules and the AD5421 D/A converter for loop-powered smart transmitter applications. ADI has also developed a fully functional smart transmitter demo system featuring the AD5700 HART modem IC that is compliance tested, verified and registered with the HART Communication Foundation as an approved HART solution.
Marvell delivers multicore FDD/TDD LTE, TD-SCDMA and WCDMA mobile platform
MOBILE WORLD CONGRESS 2012, BARCELONA, SPAIN: Marvell announced a complete reference design featuring high performance multicore application processing and a world modem including 4G Frequency Division Duplexing (FDD) / Time Division Duplexing (TDD) Long-Term Evolution (LTE), Time Division Synchronous Code Division Multiple Access (TD-SCDMA) and Wideband Code Division Multiple Access (WCDMA) in a single platform to provide a high performance, low cost and robust turn-key silicon solution for globally connected smartphones and tablets.
"Leveraging Marvell's leadership in multicore processors and connectivity technologies, I believe now our customers around the world can utilize a single platform to deliver high-performance, low-power, cost-effective, multicore, FDD / TDD LTE smartphones and tablets to meet global consumers' increasing demands for rich and live streaming content," said Weili Dai, co-founder of Marvell. "Marvell is leading the pack in deploying the most cost-effective multimode LTE solution to accelerate global mass adoption for the connected lifestyle."
Comprised of the Marvell ARMADA PXA2128 application processor featuring Marvell's Hybrid-SMP Technology- a new symmetric multiprocessing (SMP) hardware and software architecture that addresses the conflicting low-power and high-performance needs of today's mobile processors - and its PXA1801 multimode LTE modem - which provides support for all global broadband standards including FDD and TDD LTE network, DC-HSPA+ (Dual Carrier Evolved High-Speed Packet Access) and TD-SCDMA – the integrated solution provides Marvell's customers a complete mobile platform enabling the "Connected Lifestyle."
The Marvell reference design includes the company's latest power management and Radio Frequency (RF) technologies, as well as its wireless connectivity solution comprised of Wi-Fi, Bluetooth (BT) and FM, delivering original equipment manufacturers (OEMs) a turn-key platform that improves R&D efficiency by eliminating repetitive engineering cycles and speeding overall time-to-market for new devices – a significant advantage in the fast-paced, constantly evolving mobile industry. The combination reduces the total Bill of Materials (BOM) enabling the lowest cost for this category of performance and function.
"Leveraging Marvell's leadership in multicore processors and connectivity technologies, I believe now our customers around the world can utilize a single platform to deliver high-performance, low-power, cost-effective, multicore, FDD / TDD LTE smartphones and tablets to meet global consumers' increasing demands for rich and live streaming content," said Weili Dai, co-founder of Marvell. "Marvell is leading the pack in deploying the most cost-effective multimode LTE solution to accelerate global mass adoption for the connected lifestyle."
Comprised of the Marvell ARMADA PXA2128 application processor featuring Marvell's Hybrid-SMP Technology- a new symmetric multiprocessing (SMP) hardware and software architecture that addresses the conflicting low-power and high-performance needs of today's mobile processors - and its PXA1801 multimode LTE modem - which provides support for all global broadband standards including FDD and TDD LTE network, DC-HSPA+ (Dual Carrier Evolved High-Speed Packet Access) and TD-SCDMA – the integrated solution provides Marvell's customers a complete mobile platform enabling the "Connected Lifestyle."
The Marvell reference design includes the company's latest power management and Radio Frequency (RF) technologies, as well as its wireless connectivity solution comprised of Wi-Fi, Bluetooth (BT) and FM, delivering original equipment manufacturers (OEMs) a turn-key platform that improves R&D efficiency by eliminating repetitive engineering cycles and speeding overall time-to-market for new devices – a significant advantage in the fast-paced, constantly evolving mobile industry. The combination reduces the total Bill of Materials (BOM) enabling the lowest cost for this category of performance and function.
Digi International and Freescale to announce industry’s first cloud-connected MCUs with out-of-box cloud connectivity
embedded world 2012, MINNETONKA, USA: Digi International announced collaboration with Freescale Semiconductor to integrate the secure and scalable iDigi Device Cloud solution into Freescale’s leading Kinetis and ColdFire microcontroller platforms.
Using the iDigi Connector, an open interface for any type of device, Kinetis and ColdFire customers now have immediate access to both a web and mobile applications development platform and world class device management functionality.
The iDigi Device Cloud delivers Any App, Anything, Anywhere capabilities to every connected Freescale Kinetis and ColdFire based device. Designed to be massively scalable and secure, iDigi is a complete and proven cloud infrastructure for remote device management and cloud-based information exchange.
“Cloud connectivity offers device manufacturers significant product differentiation,” said Jeff Bock, director of Marketing for Freescale’s industrial and multi-market microcontrollers segment. “It allows OEMs to create innovative and competitive products that positively impact revenue streams, product service/reliability and business process efficiency. For example, cloud connectivity dramatically streamlines product rollouts, preventive maintenance services, product performance analytics or proactive supply replenishments – all remotely and in combination with the capabilities of cloud-based applications, enterprise systems and mobile device integration.”
“Freescale customers across all markets now have immediate access to the benefits of cloud connectivity right out of the box,” said Larry Kraft, senior VP of global sales and marketing, Digi International. “The scalable and reliable architecture of iDigi provides instant cloud connectivity to network-connected devices everywhere on the globe. Whether it is a small or large-scale product deployment, iDigi meets and grows with every customer’s needs and opens up an entirely new world of exciting business opportunities and applications.”
Glen Allmendinger, founder and president of Harbor Research, comments: “Digi continues to drive its market leadership role in providing wireless M2M solutions. The Freescale collaboration demonstrates how Digi is bringing together all of the components necessary to provide a true end-to-end solution. The iDigi Device Cloud provides OEMs a massively scalable, highly secure m2m platform to leverage valuable device data. Smart connected web and mobile applications can now be rapidly developed, remotely managed, upgraded and serviced with ease. By providing all the necessary solution elements, OEMs can now focus their attention on developing new smart services and innovative modes of interacting with their customers. Digi is orchestrating the technology, products and support to make the Internet of Things a reality.”
Digi will demonstrate the integration of the iDigi Device Cloud on a Kinetis K53 Tower System at Embedded World 2012 in Nuremberg, Germany in Hall 1 booth 1-432. The setup shows a cloud-enabled MQX RTOS application with integrated remote device management capabilities (firmware upgrade, system reboot, system information/performance, reliability metrics and alerts) as well as cloud-based information exchange of on-board peripheral status (accelerometer, potentiometer, touch sensors, ADC, PWM, LEDs). The iDigi Manager Pro web interface and cloud-based mobile phone and desktop web applications demonstrate the user-friendly presentation of information and the interaction with the system.
The iDigi Device Cloud integration on Freescale Kinetis and ColdFire microcontroller platforms is expected to be available in July 2012.
Using the iDigi Connector, an open interface for any type of device, Kinetis and ColdFire customers now have immediate access to both a web and mobile applications development platform and world class device management functionality.
The iDigi Device Cloud delivers Any App, Anything, Anywhere capabilities to every connected Freescale Kinetis and ColdFire based device. Designed to be massively scalable and secure, iDigi is a complete and proven cloud infrastructure for remote device management and cloud-based information exchange.
“Cloud connectivity offers device manufacturers significant product differentiation,” said Jeff Bock, director of Marketing for Freescale’s industrial and multi-market microcontrollers segment. “It allows OEMs to create innovative and competitive products that positively impact revenue streams, product service/reliability and business process efficiency. For example, cloud connectivity dramatically streamlines product rollouts, preventive maintenance services, product performance analytics or proactive supply replenishments – all remotely and in combination with the capabilities of cloud-based applications, enterprise systems and mobile device integration.”
“Freescale customers across all markets now have immediate access to the benefits of cloud connectivity right out of the box,” said Larry Kraft, senior VP of global sales and marketing, Digi International. “The scalable and reliable architecture of iDigi provides instant cloud connectivity to network-connected devices everywhere on the globe. Whether it is a small or large-scale product deployment, iDigi meets and grows with every customer’s needs and opens up an entirely new world of exciting business opportunities and applications.”
Glen Allmendinger, founder and president of Harbor Research, comments: “Digi continues to drive its market leadership role in providing wireless M2M solutions. The Freescale collaboration demonstrates how Digi is bringing together all of the components necessary to provide a true end-to-end solution. The iDigi Device Cloud provides OEMs a massively scalable, highly secure m2m platform to leverage valuable device data. Smart connected web and mobile applications can now be rapidly developed, remotely managed, upgraded and serviced with ease. By providing all the necessary solution elements, OEMs can now focus their attention on developing new smart services and innovative modes of interacting with their customers. Digi is orchestrating the technology, products and support to make the Internet of Things a reality.”
Digi will demonstrate the integration of the iDigi Device Cloud on a Kinetis K53 Tower System at Embedded World 2012 in Nuremberg, Germany in Hall 1 booth 1-432. The setup shows a cloud-enabled MQX RTOS application with integrated remote device management capabilities (firmware upgrade, system reboot, system information/performance, reliability metrics and alerts) as well as cloud-based information exchange of on-board peripheral status (accelerometer, potentiometer, touch sensors, ADC, PWM, LEDs). The iDigi Manager Pro web interface and cloud-based mobile phone and desktop web applications demonstrate the user-friendly presentation of information and the interaction with the system.
The iDigi Device Cloud integration on Freescale Kinetis and ColdFire microcontroller platforms is expected to be available in July 2012.
TI’s Wolverine MCU platform slashes power by 50 percent
DALLAS, USA: Imagine a device worn on your finger that allows intuitive, touch-free interaction with the digital world. Imagine a solar panel the size of a microcontroller that enables environmental intelligence in any building. Imagine integrating carbon monoxide sensing, thermostat control and biometric security capabilities to a smoke detector without increasing its size.
This smarter, greener, battery-free world is fast becoming a reality with the world’s lowest-power microcontroller platform from Texas Instruments Inc. (TI). Codenamed “Wolverine” for its aggressive power-saving technology, this ultra-low-power MSP430 microcontroller platform offers at least 50 percent less power consumption than any other microcontroller in the industry (360 nA real-time clock mode and less than 100 µA/MHz active power consumption). The first devices based on this platform will be the MSP430FR58xx microcontroller series with expected availability in June 2012.
“Everyday devices such as glucose meters and smoke detectors are seeing increased levels of performance with 10-20 years of battery longevity, and this trend is trickling into a myriad of other applications,” said Kevin Wang, chief analyst, iSuppli China. “The revolutionary ‘Wolverine’ low-power architecture from TI is setting a new industry standard and will enable a proliferation of ultra-low-power products. From consumer to medical to industrial, the sky is the limit.”
The “Wolverine” platform provides the lowest power consumption in any use case when compared to any microcontroller in the industry – lowest active power, standby power, memory power and peripheral power. For example, typical battery powered applications spend as much as 99.9 percent of their time in standby mode, and “Wolverine”-based microcontrollers consume 360 nA in standby mode, more than doubling battery life. TI continues its legacy of pioneering the latest low-power techniques with the ultra-low-power system architecture and revolutionary technology of the “Wolverine” microcontroller platform.
This smarter, greener, battery-free world is fast becoming a reality with the world’s lowest-power microcontroller platform from Texas Instruments Inc. (TI). Codenamed “Wolverine” for its aggressive power-saving technology, this ultra-low-power MSP430 microcontroller platform offers at least 50 percent less power consumption than any other microcontroller in the industry (360 nA real-time clock mode and less than 100 µA/MHz active power consumption). The first devices based on this platform will be the MSP430FR58xx microcontroller series with expected availability in June 2012.
“Everyday devices such as glucose meters and smoke detectors are seeing increased levels of performance with 10-20 years of battery longevity, and this trend is trickling into a myriad of other applications,” said Kevin Wang, chief analyst, iSuppli China. “The revolutionary ‘Wolverine’ low-power architecture from TI is setting a new industry standard and will enable a proliferation of ultra-low-power products. From consumer to medical to industrial, the sky is the limit.”
The “Wolverine” platform provides the lowest power consumption in any use case when compared to any microcontroller in the industry – lowest active power, standby power, memory power and peripheral power. For example, typical battery powered applications spend as much as 99.9 percent of their time in standby mode, and “Wolverine”-based microcontrollers consume 360 nA in standby mode, more than doubling battery life. TI continues its legacy of pioneering the latest low-power techniques with the ultra-low-power system architecture and revolutionary technology of the “Wolverine” microcontroller platform.
Atmel simplifies MCU design with Atmel Studio 6
SAN JOSE, USA: Atmel Corp. continued its commitment to deliver innovative new solutions to the ARM market with the introduction of Atmel Studio 6, the latest version of its popular integrated development environment (IDE) that now supports both Atmel 32-bit ARM Cortex-M series processor-based and Atmel 8/32-bit AVR based microcontrollers (MCUs).
For the first time, the extensive AVR customer base of more than 100,000 engineers and the designers of ARM Cortex-M series processor-based applications have all of the tools required to develop and debug Atmel MCU applications in a single, seamless environment.
The company today also announced an aggressive expansion of its Atmel SAM3 ARM Cortex-M3 processor-based MCU family with 40 new devices, delivering more scalability, cost-efficiency and connectivity for a broad array of applications, including industrial automation, smart grid, and building and home control.
Throughout this year, the SAM3 and SAM4 families will quadruple the Atmel Cortex-M series processor portfolio to nearly 200 ARM processor-based MCUs, and include devices with on-chip memory densities of up to 2MB Flash, 192KB of SRAM and extensive peripherals, such as high-speed USB host and device with on-chip physical layer (PHY), Ethernet and dual CAN.
"We're pleased to offer the design advantages of the Atmel Studio 6 IDE to the ARM community, whose engineers can now enjoy the ease of use and seamless integration with other toolsets that our AVR MCU development community has long experienced. With a user base of more than 100,000, our IDE is clearly proven and highly appreciated among AVR designers, so it was only natural for us to extend the environment to support all Atmel MCUs and enable the ARM application developers," said Vegard Wollan, vice president, microcontroller and touch business unit, Atmel.
"Furthermore, by expanding our SAM3 family, we are delivering the first phase of significantly expanding our ARM Cortex-M processor-based MCU offering, providing the ARM community with more choice to meet their unique design requirements."
"We welcome Atmel's expansion of their Cortex-M series processor-based MCU portfolio," said Keith Clarke, VP, embedded processors, ARM. "The availability of 40 new SAM3 devices, together with free Atmel tools and software support, is welcome news for developers aiming to bring Atmel's ARM Cortex-M series processor-based devices and applications to market quickly. Atmel's offering further underlines the popularity of the ARM architecture."
For the first time, the extensive AVR customer base of more than 100,000 engineers and the designers of ARM Cortex-M series processor-based applications have all of the tools required to develop and debug Atmel MCU applications in a single, seamless environment.
The company today also announced an aggressive expansion of its Atmel SAM3 ARM Cortex-M3 processor-based MCU family with 40 new devices, delivering more scalability, cost-efficiency and connectivity for a broad array of applications, including industrial automation, smart grid, and building and home control.
Throughout this year, the SAM3 and SAM4 families will quadruple the Atmel Cortex-M series processor portfolio to nearly 200 ARM processor-based MCUs, and include devices with on-chip memory densities of up to 2MB Flash, 192KB of SRAM and extensive peripherals, such as high-speed USB host and device with on-chip physical layer (PHY), Ethernet and dual CAN.
"We're pleased to offer the design advantages of the Atmel Studio 6 IDE to the ARM community, whose engineers can now enjoy the ease of use and seamless integration with other toolsets that our AVR MCU development community has long experienced. With a user base of more than 100,000, our IDE is clearly proven and highly appreciated among AVR designers, so it was only natural for us to extend the environment to support all Atmel MCUs and enable the ARM application developers," said Vegard Wollan, vice president, microcontroller and touch business unit, Atmel.
"Furthermore, by expanding our SAM3 family, we are delivering the first phase of significantly expanding our ARM Cortex-M processor-based MCU offering, providing the ARM community with more choice to meet their unique design requirements."
"We welcome Atmel's expansion of their Cortex-M series processor-based MCU portfolio," said Keith Clarke, VP, embedded processors, ARM. "The availability of 40 new SAM3 devices, together with free Atmel tools and software support, is welcome news for developers aiming to bring Atmel's ARM Cortex-M series processor-based devices and applications to market quickly. Atmel's offering further underlines the popularity of the ARM architecture."
Cortus announces FPS6 32 bit floating point MCU IP core for high performance control and signal processing apps
NUREMBERG, GERMANY: Cortus, a technology leader in ultra low power, silicon efficient 32-bit processor IP, announces the latest member of their processor family: the high performance, high throughput FPS6 with integrated floating point. The FPS6 combines excellent integer performance, shared with the other members of the Cortus processor family, with a tightly integrated single precision floating point unit.
This processor IP is designed for integration into SoCs requiring high floating point performance: for example industrial control systems, motor control, power and energy applications. The FPS6 can be implemented in dual- or quad-core configurations or be used in a heterogeneous system with APS3.
The Cortus FPS6 is a high performance, high throughput, 32-bit processor designed specifically for complex embedded systems. It features a high performance integer unit coupled with a pipelined floating point unit. It is the second member of the Cortus microcontroller IP core family to be released complementing the smaller, ultra low power APS3.The FPS6 instruction set is a superset of that of APS3 meaning that APS3 code can run on FPS6.
“We are delighted to offer a high throughput, scalable, floating point IP core for applications such as motor control or solar inverters” said Michael Chapman, CEO and president of Cortus. “FPS6’s modern RISC architecture ensures that the core can achieve a very high maximum clock frequency, for example 500 MHz at 65 nm”. In common with other Cortus processors, the FPS6 has a 5 to 7 stage integer pipeline and out-of-order completion ensure that most integer instructions (load and stores included) are executed in a single cycle.
The FPS6 delivers 30.5 MFlops for the Linpack benchmark (single precision at 333 MHz for 10 reps) providing a considerable advantage over an integer processor core. The FPS6 integer unit performance is 1.93 CoreMarks/MHz* and 1.67 DMIPS/MHz. For fixed point digital signal processing it is possible to add the APS DSP Co-processor to FPS6. The DSP co-processor works with 16-bit data and has a 20-bit accumulator.
The FPS6 has been designed to deliver scalable computing performance with symmetric multi-processing (SMP) such as dual- or quad-core configurations possible. For SMP configurations a coherent data cache with snoopy protocol is available. Other applications may benefit from heterogeneous FPS6/APS3 configurations. For example with a smart grid application, an APS3 might run a communications protocol stack while an FPS6 might run a power control application. Michael Chapman explains, “Software development for mixed processor sub-systems is straightforward as FPS6 and APS3 use the same toolchain”.
The modest silicon footprint of 0.26 mm2 in 130 nm (UMC) and 0.073 mm2 in 65 nm (TSMC) plus the freely available complete toolchain and IDE ensure a very low cost of ownership for FPS6 licensees. The easy software development programming in high level languages with simple debugging due to an integrated debugger and simulator enhance time to market and software reliability.
As a member of the Cortus family of processors it interfaces to all of Cortus’ peripherals via the efficient APS bus. It also shares the simple vectored interrupt structure which ensures rapid, real time interrupt response, with low software overhead.
The ecosystem around the FPS6 is rich and well developed, and it includes peripherals commonly used in embedded systems, bus bridges to ensure easy interfacing to other IP and system support and functions such as caches. A full development environment (for C and C++) is available, which can be customised and branded for final customer use. For the most demanding designs the FPS6 can be used in a multi-core configuration.
This processor IP is designed for integration into SoCs requiring high floating point performance: for example industrial control systems, motor control, power and energy applications. The FPS6 can be implemented in dual- or quad-core configurations or be used in a heterogeneous system with APS3.
The Cortus FPS6 is a high performance, high throughput, 32-bit processor designed specifically for complex embedded systems. It features a high performance integer unit coupled with a pipelined floating point unit. It is the second member of the Cortus microcontroller IP core family to be released complementing the smaller, ultra low power APS3.The FPS6 instruction set is a superset of that of APS3 meaning that APS3 code can run on FPS6.
“We are delighted to offer a high throughput, scalable, floating point IP core for applications such as motor control or solar inverters” said Michael Chapman, CEO and president of Cortus. “FPS6’s modern RISC architecture ensures that the core can achieve a very high maximum clock frequency, for example 500 MHz at 65 nm”. In common with other Cortus processors, the FPS6 has a 5 to 7 stage integer pipeline and out-of-order completion ensure that most integer instructions (load and stores included) are executed in a single cycle.
The FPS6 delivers 30.5 MFlops for the Linpack benchmark (single precision at 333 MHz for 10 reps) providing a considerable advantage over an integer processor core. The FPS6 integer unit performance is 1.93 CoreMarks/MHz* and 1.67 DMIPS/MHz. For fixed point digital signal processing it is possible to add the APS DSP Co-processor to FPS6. The DSP co-processor works with 16-bit data and has a 20-bit accumulator.
The FPS6 has been designed to deliver scalable computing performance with symmetric multi-processing (SMP) such as dual- or quad-core configurations possible. For SMP configurations a coherent data cache with snoopy protocol is available. Other applications may benefit from heterogeneous FPS6/APS3 configurations. For example with a smart grid application, an APS3 might run a communications protocol stack while an FPS6 might run a power control application. Michael Chapman explains, “Software development for mixed processor sub-systems is straightforward as FPS6 and APS3 use the same toolchain”.
The modest silicon footprint of 0.26 mm2 in 130 nm (UMC) and 0.073 mm2 in 65 nm (TSMC) plus the freely available complete toolchain and IDE ensure a very low cost of ownership for FPS6 licensees. The easy software development programming in high level languages with simple debugging due to an integrated debugger and simulator enhance time to market and software reliability.
As a member of the Cortus family of processors it interfaces to all of Cortus’ peripherals via the efficient APS bus. It also shares the simple vectored interrupt structure which ensures rapid, real time interrupt response, with low software overhead.
The ecosystem around the FPS6 is rich and well developed, and it includes peripherals commonly used in embedded systems, bus bridges to ensure easy interfacing to other IP and system support and functions such as caches. A full development environment (for C and C++) is available, which can be customised and branded for final customer use. For the most demanding designs the FPS6 can be used in a multi-core configuration.
WiSpry announces world’s first tunable RF filter for truly simultaneous voice and LTE data connections
Mobile World Congress 2012, BARCELONA, SPAIN: WiSpry Inc. has announced the WS3001, a fully- integrated SVLTE filter module with the power to activate on demand – allowing operators to deliver truly simultaneous voice and LTE data. WiSpry will exhibit in the MIPI Alliance booth (Hall 7, Stand 7H11) at the 2012 GSMA Mobile World Congress and will feature a demonstration of the WS2018 Antenna Tuner with a MIPI RFFE interface.
The WS3001 achieves effectiveness by providing ultra-low loss in the “off” state for all single-radio handset operations. This nearly eliminates the baseline insertion loss inherent in any filter circuit. Enabled by WiSpry’s tunable RF technology, the WS3001 SVLTE filter then activates on demand when simultaneous voice and data transmissions from the device itself threaten to interfere with the device’s own duplexers and transceivers. In this manner, the WS3001 allows voice and LTE data activities to continue side by side and unabated.
“WiSpry’s on-demand filters will be indispensable to mobile operators looking for differentiators in a network environment where higher speed data and video traffic are of growing value,” said Jeff Hilbert, president and founder of WiSpry. “It’s essential that voice and data radios are able to coexist in a single handset, both to enhance the user experience and to drive carrier revenue. Ultimately these products bring the industry one step closer to WiSpry’s vision of ‘One World, One Radio.’”
MIPI Alliance, an industry-leading mobile interface standards organization, will feature 18 member companies in its MWC installation, all of which represent the mobile device ecosystem. In addition to WiSpry, other participating companies include Agilent Technologies, Analogix, Cadence, HDL Design House, Infineon Technologies AG, LeCroy, Mixel, Nujira, Quantance, Renesas Electronics Corp., Sequans Communications, Silicon Line GmbH, ST-Ericsson, Synopsys, Texas Instruments, Toshiba and VLSI Plus.
The WS3001 achieves effectiveness by providing ultra-low loss in the “off” state for all single-radio handset operations. This nearly eliminates the baseline insertion loss inherent in any filter circuit. Enabled by WiSpry’s tunable RF technology, the WS3001 SVLTE filter then activates on demand when simultaneous voice and data transmissions from the device itself threaten to interfere with the device’s own duplexers and transceivers. In this manner, the WS3001 allows voice and LTE data activities to continue side by side and unabated.
“WiSpry’s on-demand filters will be indispensable to mobile operators looking for differentiators in a network environment where higher speed data and video traffic are of growing value,” said Jeff Hilbert, president and founder of WiSpry. “It’s essential that voice and data radios are able to coexist in a single handset, both to enhance the user experience and to drive carrier revenue. Ultimately these products bring the industry one step closer to WiSpry’s vision of ‘One World, One Radio.’”
MIPI Alliance, an industry-leading mobile interface standards organization, will feature 18 member companies in its MWC installation, all of which represent the mobile device ecosystem. In addition to WiSpry, other participating companies include Agilent Technologies, Analogix, Cadence, HDL Design House, Infineon Technologies AG, LeCroy, Mixel, Nujira, Quantance, Renesas Electronics Corp., Sequans Communications, Silicon Line GmbH, ST-Ericsson, Synopsys, Texas Instruments, Toshiba and VLSI Plus.
Freescale Airfast RF power solutions deliver unprecedented power, efficiency and bandwidth for multi-standard base stations
Mobile World Congress 2012, BARCELONA, SPAIN: To meet the growing demand for cost-effective RF power solutions capable of supporting skyrocketing data rates, multiple wireless standards and increasing network complexity, Freescale Semiconductor (NYSE: FSL) introduces the first two products from its advanced Airfast RF power portfolio. The offerings are engineered to deliver industry-leading power density, signal bandwidth, linear efficiency and gain in cost-effective, small form-factor configurations.
“As the world’s wireless networks have grown more complex, so too have the requirements of the RF power market,” said Ritu Favre, VP and GM of Freescale’s RF Division. “Multiple modulation formats, expanding bandwidth and shrinking form factors call for a more comprehensive, system-level approach to RF power technology. Our newest Airfast products are designed with these paradigm shifts in mind.”
The new AFT09VP350N product is the industry’s first 48V LDMOS transistor designed exclusively for multi-carrier GSM and multi-standard macro cell applications operating in the 720 – 960 MHz frequency band. When used in a Doherty configuration, the device delivers 57 dBm (500W) of peak power using only a single transistor package, nearly doubling the power capability of other LDMOS solutions with a similar footprint. By comparison, many of today’s average 40W-60W power transmitters typically use two or three individually packaged devices to achieve this level of peak power.
In a Doherty circuit designed for the 920 – 960 MHz band, the AFT09VP350N achieves 50 percent efficiency at an average output power of 50 dBm (100W) with over 19dB gain, while meeting stringent multi-carrier GSM corrected linearity specifications. This efficiency is further enhanced by Freescale’s cost-effective, over-molded plastic OMNI packaging featuring ultra-low thermal resistance. The AFT09VP350N also demonstrates instantaneous signal bandwidth capability of up to 100 MHz, enabled by a 50 percent reduction in device drain-source capacitance measured on a per-watt basis.
On the opposite end of the power and frequency spectrum of the new Airfast family products is the 28V AFT26HW050GS LDMOS transistor. The product is designed specifically for wide instantaneous bandwidth micro/metro cell LTE applications between 2500–2700 MHz. Similar to the AFT09VP350N, the AFT26HW050GS contains two independently matched transistors within a single package in a Doherty-compatible configuration.
In a Doherty circuit designed for the 2620-2690 MHz band, AFT26HW050GS delivers 47 dBm (50W) of peak power, more than 15.5 dB Doherty gain and 48 percent efficiency at 39 dBm (8W) average power. Under these conditions, the device demonstrates DPD correction to -54 dBc using a 20 MHz LTE test signal. Targeted for 5W-7W transmitters, this represents seven points efficiency improvement relative to previous Freescale LDMOS solutions and is the highest reported silicon Doherty efficiency in the industry at this frequency.
Complementing the high gain and efficiency, the AFT26HW050GS also supports instantaneous signal bandwidth of over 100 MHz. Additionally, the device is housed in a manufacturing-friendly, surface-mount air-cavity package enabling devices to be mounted on embedded coins or simple via arrays for thermal and electrical grounding.
“As the world’s wireless networks have grown more complex, so too have the requirements of the RF power market,” said Ritu Favre, VP and GM of Freescale’s RF Division. “Multiple modulation formats, expanding bandwidth and shrinking form factors call for a more comprehensive, system-level approach to RF power technology. Our newest Airfast products are designed with these paradigm shifts in mind.”
The new AFT09VP350N product is the industry’s first 48V LDMOS transistor designed exclusively for multi-carrier GSM and multi-standard macro cell applications operating in the 720 – 960 MHz frequency band. When used in a Doherty configuration, the device delivers 57 dBm (500W) of peak power using only a single transistor package, nearly doubling the power capability of other LDMOS solutions with a similar footprint. By comparison, many of today’s average 40W-60W power transmitters typically use two or three individually packaged devices to achieve this level of peak power.
In a Doherty circuit designed for the 920 – 960 MHz band, the AFT09VP350N achieves 50 percent efficiency at an average output power of 50 dBm (100W) with over 19dB gain, while meeting stringent multi-carrier GSM corrected linearity specifications. This efficiency is further enhanced by Freescale’s cost-effective, over-molded plastic OMNI packaging featuring ultra-low thermal resistance. The AFT09VP350N also demonstrates instantaneous signal bandwidth capability of up to 100 MHz, enabled by a 50 percent reduction in device drain-source capacitance measured on a per-watt basis.
On the opposite end of the power and frequency spectrum of the new Airfast family products is the 28V AFT26HW050GS LDMOS transistor. The product is designed specifically for wide instantaneous bandwidth micro/metro cell LTE applications between 2500–2700 MHz. Similar to the AFT09VP350N, the AFT26HW050GS contains two independently matched transistors within a single package in a Doherty-compatible configuration.
In a Doherty circuit designed for the 2620-2690 MHz band, AFT26HW050GS delivers 47 dBm (50W) of peak power, more than 15.5 dB Doherty gain and 48 percent efficiency at 39 dBm (8W) average power. Under these conditions, the device demonstrates DPD correction to -54 dBc using a 20 MHz LTE test signal. Targeted for 5W-7W transmitters, this represents seven points efficiency improvement relative to previous Freescale LDMOS solutions and is the highest reported silicon Doherty efficiency in the industry at this frequency.
Complementing the high gain and efficiency, the AFT26HW050GS also supports instantaneous signal bandwidth of over 100 MHz. Additionally, the device is housed in a manufacturing-friendly, surface-mount air-cavity package enabling devices to be mounted on embedded coins or simple via arrays for thermal and electrical grounding.
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