MOUNTAIN VIEW, USA: Synopsys Inc. announced the endorsement of Proteus lithography rule check (LRC) at Nanya Technology Corp., a member of the Formosa Plastics Group and a global leader in advanced memory semiconductors focusing on research and development, design, manufacturing and sales of DRAM products.
Industry-leading accuracy is achieved through the combined use of production-proven Proteus compact models and the integrated Sentaurus Lithography rigorous simulation engine. Proteus LRC provides production tapeout departments at integrated circuit (IC) manufacturers with full-chip lithography verification that identifies yield-limiting hotspots prior to manufacturing, thus minimizing the risk of costly re-spins and improving time to market.
"The competitive DRAM market requires efficient processing to meet aggressive product delivery schedules," said Chiang-Lin Shih, deputy director of the Advanced Technology Development Division at Nanya Technology. "The dependable accuracy and consolidated hotspot reporting provided by Proteus LRC enable us to efficiently identify and resolve issues while improving our time to market."
Proteus LRC delivers a highly accurate and comprehensive lithography verification solution through an extensive set of standardized checks as well as specialized checks designed to address the latest double patterning technology (DPT) processing challenges. For easy deployment and dependable accuracy, all check functions use the same industry-proven compact models utilized by Proteus optical proximity correction (OPC).
In situations where borderline hotspots require the added insight of resist profile and topography effects, Proteus LRC utilizes the embedded Sentaurus Lithography simulator providing full check capabilities with first principle physics-based models. The balance of compact and rigorous models combined with comprehensive check functionality offers unmatched accuracy without compromising turnaround time (TAT).
Proteus LRC is built on the Proteus engine and is integrated into Synopsys' Proteus Pipeline Technology, enabling a single flow solution from design tapeout to mask fracture. The Pipeline Technology delivers the best TAT by utilizing concurrent processing at all stages of the mask synthesis and fracture flow to improve efficiency of I/O handling and CPU utilization. The Proteus engine provides an industry-proven platform that is highly scalable to hundreds, even thousands of standard x86 CPUs, enabling fast TAT while maintaining the lowest cost of ownership.
"Semiconductor companies like Nanya require a predictable and accurate verification solution they can trust to identify potential issues early in their flow," said Howard Ko, senior VP and GM of the Silicon Engineering Group at Synopsys. "Proteus LRC delivers industry-leading accuracy while maintaining a low cost of ownership and highly competitive turnaround time."