Casio cuts design cycle time, improves quality using Cadence front-end technologies

SAN JOSE, USA: Cadence Design Systems Inc. announced that Japanese giant Casio Computer Co. has adopted Cadence front-end system, design, and verification technologies to develop a system LSI for digital cameras.

Casio reported reduced design cycle time and improved design quality for this chip. The Casio success highlights the type of technology needed to close the “productivity gap” faced by most development teams.

“This project was very important for us, and we relied heavily on Cadence products to succeed,” said Masateru Nishimoto, lead engineer, QV Digital Camera Division of Casio. “Using a broad array of Cadence tools, we achieved our goal of developing a top-quality design within a tight timeframe. We had high expectations for the Cadence technology, and they were exceeded.”

Casio deployed a broad range of leading Cadence front-end and verification technologies, including high-level synthesis and functional verification, part of the TLM-to-GDS flow. According to Casio, RTL generated by Cadence C-to-Silicon Compiler from SystemC was higher quality than RTL manually created, and it met all target specs.

Casio applied Incisive Enterprise Simulator to improve SoC verification productivity, and Incisive Enterprise Manager to improve predictability through coverage-driven methodology.

The company also stated that engineers were able to cut hundreds of thousands of gates and significantly reduce leakage power with Encounter RTL Compiler, while avoiding routing congestion problems at the back-end.

Encounter Conformal Equivalent Checker was used to complete equivalency checking in a short period of time, and Casio also cited time reduction and improved quality by using Conformal ECO Designer to implement and verify late-stage functional engineering change orders (ECOs).

“Casio creates advanced products, and we are proud to have played a role in the development of the complex graphics processor used in the next generation of digital cameras,” said Michał Siwiński, group director of product management at Cadence. “By using a wide range of Cadence front-end methodologies and technologies, Casio has demonstrated the benefits customers can expect for effective System, SoC, and Silicon realization.”