Cadence, ARM to create an ARM-optimized system realization solution

SAN JOSE, USA: Cadence Design Systems Inc. announced a broadening of its existing collaboration with ARM to develop an optimized System Realization solution for ARM processors that will enable an end-to-end flow including a full set of interoperable tools, ARM processor and physical IP, services and methodology from embedded Linux to GDSII.

To accelerate adoption of this solution, Cadence will provide a full complement of tutorials and education materials including two methodology reference books and extend their ecosystem of service, methodology and training providers.

“As software complexity continues to escalate driving system costs up, industry leaders need to join forces to provide proven and cost effective end-to-end design solutions,” said Mike Muller, ARM, CTO.

“Only a comprehensive approach from application software through silicon can successfully address the challenges facing our design community. This collaboration with Cadence will not only address the rapidly rising cost of integrated hardware and software system development, but will also accelerate time-to-market for next-generation consumer products.”

To deliver this solution, Cadence will take the following actions:
* Support embedded software optimized for ARM processor-based devices in the company’s recently announced IP stacks.
* Enhance the interoperability of ARM tools and IP including ARM DS-5 and RealView Development Suite, Fast Models, and VSTREAM transactor with Cadence Virtualization technologies.
* Expand its existing collaboration on AMBA IP-VIP pairs and interconnect fabric, and reference methodologies for design, verification, and implementation.

“As our business is expanding into the mobile market segment, ARM processor-based designs are becoming a larger part of our development,” said Narendra Konda, director, Hardware Engineering at NVIDIA. “The Cadence/ARM collaboration provides the right approach for the industry by addressing application-driven flow. This integrated flow will help us to improve our system validation process which is one of the most critical components for our success.”

Beyond its work with ARM, Cadence is extending the System Realization ecosystem through new collaborations with service, methodology and training providers that will help accelerate customers’ deployments of system-level solutions.

The new companies include Australian Semiconductor Technology Co. (ASTC), Chubu Toshiba Engineering Corp, CircuitSutra, CM Engineering Co. Ltd., HDLAB Inc., NIPPON SYSTEMWARE CO. LTD., and Toshiba Information Systems (Japan).

“Cadence continues to build our System Realization solution through collaboration with others and delivery of new methodologies,” said John Bruggeman, chief marketing officer, Cadence. “The Cadence and ARM solution will combine industry leading IP to help break down the cost and development barriers that are preventing consumer devices from achieving breakaway market success. ARM IP is prevalent in current and future consumer devices, and the jointly developed solution will unleash new, compelling innovation.”

To further help customers achieve efficient, cost-effective adoption of System Realization aspects, Cadence has developed the industry’s first transaction-level modeling (TLM) design and verification methodology, available to the industry in its newly published book titled, “TLM-driven Design and Verification Methodology.”

To accelerate SoC integration and verification based on the recently standardized Universal Verification Methodology (UVM), Cadence also has released another new book titled, “A Practical Guide to Adopting the Universal Verification Methodology (UVM).” Together, they provide a pragmatic set of best practices to help accelerate solution deployments.