NORWOOD, USA: Analog Devices Inc. has collaborated with industry leading programmable-logic vendor Xilinx Inc. to introduce a radio architecture development platform that helps multi-carrier cellular base station manufacturers reduce engineering resources and improve time to market.
ADI’s MS-DPD (mixed-signal, digital pre-distortion) development platform simplifies the wireless infrastructure design process by allowing OEMs to quickly assess and reprogram the radio to remove non-linearities from the transmit paths and enhance radio power efficiency.
ADI's MS-DPD platform incorporates a high-performance RF and mixed-signal transmit and observation receiver chain supporting 2G, 3G and emerging 4G wireless protocols. Xilinx’s Virtex-6 FPGA ML605 (field-programmable gate array) Evaluation Kit connects to the MS-DPD board through an industry-standard VITA-57 FMC connector. Using this system, the FPGA can be used to implement required radio algorithms leveraging the ADI signal chain available on the MS-DPD.
With the highest dynamic performance in its class, the multi-carrier MS-DPD development platform simplifies component selection and board layout to make it easier for designers of multi-carrier GSM and multi-standard SDR (software-defined radio) base stations to develop FPGA-based DPD algorithms.
FPGAs also provide the flexibility to optimize the solution that competing fixed-function ASICs (application-specific integrated circuits) cannot, while providing a highly integrated, low cost, low power and high reliability solution to present day base station needs.
"In collaborating with Analog Devices, we have been able to create a more modular approach to radio development, leveraging the new industry-standard FMC connectors," said Manuel Uhm, director, Wireless Communications Business, Xilinx.
"Customers are able to rapidly evaluate Xilinx’s crest factor reduction (CFR) and DPD algorithms in conjunction with ADI’s high-performance transmitter solutions, saving considerable engineering time. Furthermore, customers can leverage the Virtex-6 ML605 FPGA Evaluation Kit and MS-DPD to develop and evaluate their own IP."
Tuesday, July 27, 2010
Subscribe to:
Post Comments (Atom)
No comments:
Post a Comment
Note: Only a member of this blog may post a comment.