Global Technology Conference, WILSONVILLE, USA: Mentor Graphics Corp. announced new capabilities in its design to silicon solutions that support GLOBALFOUNDRIES’ third generation of signoff-ready design enablement for leading edge IC manufacturing.
New technologies support GLOBALFOUNDRIES’ manufacturing analysis and scoring (MAS) methodology, which is implemented using the Calibre platform’s critical feature analysis (CFA), and can be used to optimize IP blocks and SoCs at all layers to help reduce the manufacturing variability of SoC products.
The Calibre platform also supports GLOBALFOUNDRIES’ DRC+ pattern-based design rule checking technology, which identifies potential yield-limiting litho patterns while maintaining significant performance improvement over full litho simulation approaches. Other advances included in the third-generation DFM offering are new Calibre LFD kits for 28nm and 20nm, improved CMP models for 28nm, and improved interaction with place and route tools (such as the Mentor Olympus-SoC tool) and other design flows to prevent late-stage signoff violations.
“The beauty of the Mentor solution is that it provides a single, consistent environment for managing the interface between designers and the fab throughout the life cycle of a manufacturing process node,” said Andy Brotman, VP, Design Infrastructure, GLOBALFOUNDRIES.
“Foundries use Calibre early in technology development to validate new process design rules, and to determine the specific patterns that require tighter design rule constraints. In the case of GLOBALFOUNDRIES, these rules and patterns are then transferred to our mutual customers in the form of DRC+ decks that integrate rules and patterns into a consistent, high performance verification environment.
“GLOBALFOUNDRIES MAS scoring methodology, based on Calibre CFA, in conjunction with the rest of the Calibre DFM platform, assures that third-party IP certified by GLOBALFOUNDRIES is resistant to manufacturing variability. Likewise, the same platform allows customers to evaluate the IP they develop themselves for their designs, reducing the risk of late stage problems that can lead to late products or slower than expected yield ramps.”
“There are many innovations needed in the design-to-fab interface to maintain the momentum of IC scaling,” said Michael Buehler-Garcia, director of Calibre Design Solutions Marketing. “We’ve been working with the GLOBALFOUNDRIES ecosystem, including AMD, since the first Calibre product was introduced, and this collaboration continues to be stronger than ever. Today, we’re working not only to improve the precision of existing design, DFM, and verification tools as we move from one node to the next, but also to provide a seamless solution that can support customers from early stage technology evaluation through mature production as many designs are brought to market at a given node.”
Beyond just the design flow, Mentor and GLOBALFOUNDRIES are innovating to make data captured in the test process more useful to product engineers and designers as they debug existing designs and introduce new designs in the same process node. These changes have the potential to accelerate the pace at which a given node can be brought to maturity, and to help ensure overall yield and profitability.
Mentor and GLOBALFOUNDRIES will be demonstrating and speaking about the next-generation DFM joint offering at the Global Technology Conference being held at the Santa Clara Convention Center on August 30, 2011.
Friday, August 26, 2011
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